Changeset 100833 in vbox
- Timestamp:
- Aug 9, 2023 2:40:15 PM (16 months ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h
r100832 r100833 4616 4616 * iemOp_Grp1_Ev_Ib. 4617 4617 */ 4618 #define IEMOP_BODY_BINARY_Ev_Ib (a_fnNormalU16, a_fnNormalU32, a_fnNormalU64, a_fRW) \4618 #define IEMOP_BODY_BINARY_Ev_Ib_RW(a_fnNormalU16, a_fnNormalU32, a_fnNormalU64) \ 4619 4619 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 4620 4620 { \ … … 4653 4653 IEM_MC_REF_EFLAGS(pEFlags); \ 4654 4654 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4655 if ((a_fRW) != IEM_ACCESS_DATA_R) \ 4656 IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); \ 4655 IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); \ 4657 4656 \ 4658 4657 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4692 4691 case IEMMODE_16BIT: \ 4693 4692 { \ 4694 IEM_MC_BEGIN(3, 2); \4693 IEM_MC_BEGIN(3, 3); \ 4695 4694 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 4696 4695 IEM_MC_ARG(uint16_t, u16Src, 1); \ 4697 4696 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4698 4697 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4698 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4699 4699 \ 4700 4700 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4702 4702 IEM_MC_ASSIGN(u16Src, (int8_t)u8Imm); \ 4703 4703 IEMOP_HLP_DONE_DECODING(); \ 4704 IEM_MC_MEM_MAP (pu16Dst, a_fRW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4704 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4705 4705 IEM_MC_FETCH_EFLAGS(EFlags); \ 4706 4706 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4707 4707 \ 4708 IEM_MC_MEM_COMMIT_AND_UNMAP (pu16Dst, a_fRW); \4708 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu16Dst, bUnmapInfo); \ 4709 4709 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4710 4710 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4715 4715 case IEMMODE_32BIT: \ 4716 4716 { \ 4717 IEM_MC_BEGIN(3, 2); \4717 IEM_MC_BEGIN(3, 3); \ 4718 4718 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 4719 4719 IEM_MC_ARG(uint32_t, u32Src, 1); \ 4720 4720 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4721 4721 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4722 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4722 4723 \ 4723 4724 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4725 4726 IEM_MC_ASSIGN(u32Src, (int8_t)u8Imm); \ 4726 4727 IEMOP_HLP_DONE_DECODING(); \ 4727 IEM_MC_MEM_MAP (pu32Dst, a_fRW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4728 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4728 4729 IEM_MC_FETCH_EFLAGS(EFlags); \ 4729 4730 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4730 4731 \ 4731 IEM_MC_MEM_COMMIT_AND_UNMAP (pu32Dst, a_fRW); \4732 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu32Dst, bUnmapInfo); \ 4732 4733 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4733 4734 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4738 4739 case IEMMODE_64BIT: \ 4739 4740 { \ 4740 IEM_MC_BEGIN(3, 2); \4741 IEM_MC_BEGIN(3, 3); \ 4741 4742 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 4742 4743 IEM_MC_ARG(uint64_t, u64Src, 1); \ 4743 4744 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4744 4745 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4746 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4745 4747 \ 4746 4748 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4748 4750 IEM_MC_ASSIGN(u64Src, (int8_t)u8Imm); \ 4749 4751 IEMOP_HLP_DONE_DECODING(); \ 4750 IEM_MC_MEM_MAP (pu64Dst, a_fRW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4752 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4751 4753 IEM_MC_FETCH_EFLAGS(EFlags); \ 4752 4754 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4753 4755 \ 4754 IEM_MC_MEM_COMMIT_AND_UNMAP (pu64Dst, a_fRW); \4756 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu64Dst, bUnmapInfo); \ 4755 4757 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4756 4758 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4765 4767 { \ 4766 4768 (void)0 4767 4768 #define IEMOP_BODY_BINARY_Ev_Ib_NO_LOCK() \ 4769 IEMOP_HLP_DONE_DECODING(); \ 4770 IEMOP_RAISE_INVALID_LOCK_PREFIX_RET(); \ 4771 } \ 4772 } \ 4773 (void)0 4774 4769 /* Separate macro to work around parsing issue in IEMAllInstPython.py */ 4775 4770 #define IEMOP_BODY_BINARY_Ev_Ib_LOCKED(a_fnLockedU16, a_fnLockedU32, a_fnLockedU64) \ 4776 4771 switch (pVCpu->iem.s.enmEffOpSize) \ … … 4778 4773 case IEMMODE_16BIT: \ 4779 4774 { \ 4780 IEM_MC_BEGIN(3, 2); \4775 IEM_MC_BEGIN(3, 3); \ 4781 4776 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 4782 4777 IEM_MC_ARG(uint16_t, u16Src, 1); \ 4783 4778 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4784 4779 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4780 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4785 4781 \ 4786 4782 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4788 4784 IEM_MC_ASSIGN(u16Src, (int8_t)u8Imm); \ 4789 4785 IEMOP_HLP_DONE_DECODING(); \ 4790 IEM_MC_MEM_MAP (pu16Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4786 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4791 4787 IEM_MC_FETCH_EFLAGS(EFlags); \ 4792 4788 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 4793 4789 \ 4794 IEM_MC_MEM_COMMIT_AND_UNMAP (pu16Dst, IEM_ACCESS_DATA_RW); \4790 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu16Dst, bUnmapInfo); \ 4795 4791 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4796 4792 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4801 4797 case IEMMODE_32BIT: \ 4802 4798 { \ 4803 IEM_MC_BEGIN(3, 2); \4799 IEM_MC_BEGIN(3, 3); \ 4804 4800 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 4805 4801 IEM_MC_ARG(uint32_t, u32Src, 1); \ 4806 4802 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4807 4803 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4804 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4808 4805 \ 4809 4806 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4811 4808 IEM_MC_ASSIGN(u32Src, (int8_t)u8Imm); \ 4812 4809 IEMOP_HLP_DONE_DECODING(); \ 4813 IEM_MC_MEM_MAP (pu32Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4810 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4814 4811 IEM_MC_FETCH_EFLAGS(EFlags); \ 4815 4812 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 4816 4813 \ 4817 IEM_MC_MEM_COMMIT_AND_UNMAP (pu32Dst, IEM_ACCESS_DATA_RW); \4814 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu32Dst, bUnmapInfo); \ 4818 4815 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4819 4816 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4824 4821 case IEMMODE_64BIT: \ 4825 4822 { \ 4826 IEM_MC_BEGIN(3, 2); \4823 IEM_MC_BEGIN(3, 3); \ 4827 4824 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 4828 4825 IEM_MC_ARG(uint64_t, u64Src, 1); \ 4829 4826 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4830 4827 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4828 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4831 4829 \ 4832 4830 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ … … 4834 4832 IEM_MC_ASSIGN(u64Src, (int8_t)u8Imm); \ 4835 4833 IEMOP_HLP_DONE_DECODING(); \ 4836 IEM_MC_MEM_MAP (pu64Dst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \4834 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4837 4835 IEM_MC_FETCH_EFLAGS(EFlags); \ 4838 4836 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 4839 4837 \ 4840 IEM_MC_MEM_COMMIT_AND_UNMAP (pu64Dst, IEM_ACCESS_DATA_RW); \4838 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu64Dst, bUnmapInfo); \ 4841 4839 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4842 4840 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4851 4849 (void)0 4852 4850 4851 /* read-only variant */ 4852 #define IEMOP_BODY_BINARY_Ev_Ib_RO(a_fnNormalU16, a_fnNormalU32, a_fnNormalU64) \ 4853 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 4854 { \ 4855 /* \ 4856 * Register target \ 4857 */ \ 4858 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 4859 switch (pVCpu->iem.s.enmEffOpSize) \ 4860 { \ 4861 case IEMMODE_16BIT: \ 4862 { \ 4863 IEM_MC_BEGIN(3, 0); \ 4864 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 4865 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 4866 IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ (int8_t)u8Imm,1); \ 4867 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 4868 \ 4869 IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 4870 IEM_MC_REF_EFLAGS(pEFlags); \ 4871 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4872 \ 4873 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4874 IEM_MC_END(); \ 4875 break; \ 4876 } \ 4877 \ 4878 case IEMMODE_32BIT: \ 4879 { \ 4880 IEM_MC_BEGIN(3, 0); \ 4881 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 4882 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 4883 IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ (int8_t)u8Imm,1); \ 4884 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 4885 \ 4886 IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 4887 IEM_MC_REF_EFLAGS(pEFlags); \ 4888 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4889 \ 4890 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4891 IEM_MC_END(); \ 4892 break; \ 4893 } \ 4894 \ 4895 case IEMMODE_64BIT: \ 4896 { \ 4897 IEM_MC_BEGIN(3, 0); \ 4898 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \ 4899 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 4900 IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ (int8_t)u8Imm,1); \ 4901 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 4902 \ 4903 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 4904 IEM_MC_REF_EFLAGS(pEFlags); \ 4905 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4906 \ 4907 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4908 IEM_MC_END(); \ 4909 break; \ 4910 } \ 4911 \ 4912 IEM_NOT_REACHED_DEFAULT_CASE_RET(); \ 4913 } \ 4914 } \ 4915 else \ 4916 { \ 4917 /* \ 4918 * Memory target. \ 4919 */ \ 4920 if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \ 4921 { \ 4922 switch (pVCpu->iem.s.enmEffOpSize) \ 4923 { \ 4924 case IEMMODE_16BIT: \ 4925 { \ 4926 IEM_MC_BEGIN(3, 3); \ 4927 IEM_MC_ARG(uint16_t const *, pu16Dst, 0); \ 4928 IEM_MC_ARG(uint16_t, u16Src, 1); \ 4929 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4930 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4931 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4932 \ 4933 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 4934 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 4935 IEM_MC_ASSIGN(u16Src, (int8_t)u8Imm); \ 4936 IEMOP_HLP_DONE_DECODING(); \ 4937 IEM_MC_MEM_MAP_U16_RO(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4938 IEM_MC_FETCH_EFLAGS(EFlags); \ 4939 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4940 \ 4941 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu16Dst, bUnmapInfo); \ 4942 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4943 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4944 IEM_MC_END(); \ 4945 break; \ 4946 } \ 4947 \ 4948 case IEMMODE_32BIT: \ 4949 { \ 4950 IEM_MC_BEGIN(3, 3); \ 4951 IEM_MC_ARG(uint32_t const *, pu32Dst, 0); \ 4952 IEM_MC_ARG(uint32_t, u32Src, 1); \ 4953 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4954 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4955 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4956 \ 4957 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 4958 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 4959 IEM_MC_ASSIGN(u32Src, (int8_t)u8Imm); \ 4960 IEMOP_HLP_DONE_DECODING(); \ 4961 IEM_MC_MEM_MAP_U32_RO(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4962 IEM_MC_FETCH_EFLAGS(EFlags); \ 4963 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4964 \ 4965 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu32Dst, bUnmapInfo); \ 4966 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4967 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4968 IEM_MC_END(); \ 4969 break; \ 4970 } \ 4971 \ 4972 case IEMMODE_64BIT: \ 4973 { \ 4974 IEM_MC_BEGIN(3, 3); \ 4975 IEM_MC_ARG(uint64_t const *, pu64Dst, 0); \ 4976 IEM_MC_ARG(uint64_t, u64Src, 1); \ 4977 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 4978 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 4979 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 4980 \ 4981 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 4982 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \ 4983 IEM_MC_ASSIGN(u64Src, (int8_t)u8Imm); \ 4984 IEMOP_HLP_DONE_DECODING(); \ 4985 IEM_MC_MEM_MAP_U64_RO(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 4986 IEM_MC_FETCH_EFLAGS(EFlags); \ 4987 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4988 \ 4989 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu64Dst, bUnmapInfo); \ 4990 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4991 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ 4992 IEM_MC_END(); \ 4993 break; \ 4994 } \ 4995 \ 4996 IEM_NOT_REACHED_DEFAULT_CASE_RET(); \ 4997 } \ 4998 } \ 4999 else \ 5000 { \ 5001 IEMOP_HLP_DONE_DECODING(); \ 5002 IEMOP_RAISE_INVALID_LOCK_PREFIX_RET(); \ 5003 } \ 5004 } \ 5005 (void)0 5006 4853 5007 /** 4854 5008 * @opmaps grp1_83 … … 4858 5012 { 4859 5013 IEMOP_MNEMONIC(add_Ev_Ib, "add Ev,Ib"); 4860 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_add_u16, iemAImpl_add_u32, iemAImpl_add_u64, IEM_ACCESS_DATA_RW);5014 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_add_u16, iemAImpl_add_u32, iemAImpl_add_u64); 4861 5015 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_add_u16_locked, iemAImpl_add_u32_locked, iemAImpl_add_u64_locked); 4862 5016 } … … 4870 5024 { 4871 5025 IEMOP_MNEMONIC(or_Ev_Ib, "or Ev,Ib"); 4872 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_or_u16, iemAImpl_or_u32, iemAImpl_or_u64, IEM_ACCESS_DATA_RW);5026 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_or_u16, iemAImpl_or_u32, iemAImpl_or_u64); 4873 5027 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_or_u16_locked, iemAImpl_or_u32_locked, iemAImpl_or_u64_locked); 4874 5028 } … … 4882 5036 { 4883 5037 IEMOP_MNEMONIC(adc_Ev_Ib, "adc Ev,Ib"); 4884 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_adc_u16, iemAImpl_adc_u32, iemAImpl_adc_u64, IEM_ACCESS_DATA_RW);5038 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_adc_u16, iemAImpl_adc_u32, iemAImpl_adc_u64); 4885 5039 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_adc_u16_locked, iemAImpl_adc_u32_locked, iemAImpl_adc_u64_locked); 4886 5040 } … … 4894 5048 { 4895 5049 IEMOP_MNEMONIC(sbb_Ev_Ib, "sbb Ev,Ib"); 4896 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_sbb_u16, iemAImpl_sbb_u32, iemAImpl_sbb_u64, IEM_ACCESS_DATA_RW);5050 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_sbb_u16, iemAImpl_sbb_u32, iemAImpl_sbb_u64); 4897 5051 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_sbb_u16_locked, iemAImpl_sbb_u32_locked, iemAImpl_sbb_u64_locked); 4898 5052 } … … 4906 5060 { 4907 5061 IEMOP_MNEMONIC(and_Ev_Ib, "and Ev,Ib"); 4908 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_and_u16, iemAImpl_and_u32, iemAImpl_and_u64, IEM_ACCESS_DATA_RW);5062 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_and_u16, iemAImpl_and_u32, iemAImpl_and_u64); 4909 5063 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_and_u16_locked, iemAImpl_and_u32_locked, iemAImpl_and_u64_locked); 4910 5064 } … … 4918 5072 { 4919 5073 IEMOP_MNEMONIC(sub_Ev_Ib, "sub Ev,Ib"); 4920 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_sub_u16, iemAImpl_sub_u32, iemAImpl_sub_u64, IEM_ACCESS_DATA_RW);5074 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_sub_u16, iemAImpl_sub_u32, iemAImpl_sub_u64); 4921 5075 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_sub_u16_locked, iemAImpl_sub_u32_locked, iemAImpl_sub_u64_locked); 4922 5076 } … … 4930 5084 { 4931 5085 IEMOP_MNEMONIC(xor_Ev_Ib, "xor Ev,Ib"); 4932 IEMOP_BODY_BINARY_Ev_Ib ( iemAImpl_xor_u16, iemAImpl_xor_u32, iemAImpl_xor_u64, IEM_ACCESS_DATA_RW);5086 IEMOP_BODY_BINARY_Ev_Ib_RW( iemAImpl_xor_u16, iemAImpl_xor_u32, iemAImpl_xor_u64); 4933 5087 IEMOP_BODY_BINARY_Ev_Ib_LOCKED(iemAImpl_xor_u16_locked, iemAImpl_xor_u32_locked, iemAImpl_xor_u64_locked); 4934 5088 } … … 4942 5096 { 4943 5097 IEMOP_MNEMONIC(cmp_Ev_Ib, "cmp Ev,Ib"); 4944 IEMOP_BODY_BINARY_Ev_Ib( iemAImpl_cmp_u16, iemAImpl_cmp_u32, iemAImpl_cmp_u64, IEM_ACCESS_DATA_R); 4945 IEMOP_BODY_BINARY_Ev_Ib_NO_LOCK(); 5098 IEMOP_BODY_BINARY_Ev_Ib_RO(iemAImpl_cmp_u16, iemAImpl_cmp_u32, iemAImpl_cmp_u64); 4946 5099 } 4947 5100
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