VirtualBox

Changeset 101084 in vbox


Ignore:
Timestamp:
Sep 11, 2023 4:51:12 PM (20 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
159047
Message:

include/VBox/vmm/cpum-armv8.h: Add exploded feature info for CPUMFEATURES, bugref:10525

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/cpum-armv8.h

    r100940 r101084  
    183183    uint8_t         cMaxLinearAddrWidth;
    184184
     185    /** @name pre-2020 Architecture Extensions.
     186     * @{ */
     187    /** Supports Advanced SIMD Extension (FEAT_AdvSIMD). */
     188    uint32_t        fAdvSimd : 1;
     189    /** Supports Advanced SIMD AES instructions (FEAT_AES). */
     190    uint32_t        fAes : 1;
     191    /** Supports Advanced SIMD PMULL instructions (FEAT_PMULL). */
     192    uint32_t        fPmull : 1;
     193    /** Supports CP15Disable2 (FEAT_CP15DISABLE2). */
     194    uint32_t        fCp15Disable2 : 1;
     195    /** Supports Cache Speculation Variant 2 (FEAT_CSV2). */
     196    uint32_t        fCsv2 : 1;
     197    /** Supports Cache Speculation Variant 2, version 1.1 (FEAT_CSV2_1p1). */
     198    uint32_t        fCsv21p1 : 1;
     199    /** Supports Cache Speculation Variant 2, version 1.2 (FEAT_CSV2_1p2). */
     200    uint32_t        fCsv21p2 : 1;
     201    /** Supports Cache Speculation Variant 3 (FEAT_CSV3). */
     202    uint32_t        fCsv3 : 1;
     203    /** Supports Data Gahtering Hint (FEAT_DGH). */
     204    uint32_t        fDgh : 1;
     205    /** Supports Double Lock (FEAT_DoubleLock). */
     206    uint32_t        fDoubleLock : 1;
     207    /** Supports Enhanced Translation Synchronization (FEAT_ETS2). */
     208    uint32_t        fEts2 : 1;
     209    /** Supports Floating Point Extensions (FEAT_FP). */
     210    uint32_t        fFp : 1;
     211    /** Supports IVIPT Extensions (FEAT_IVIPT). */
     212    uint32_t        fIvipt : 1;
     213    /** Supports PC Sample-based Profiling Extension (FEAT_PCSRv8). */
     214    uint32_t        fPcsrV8 : 1;
     215    /** Supports Speculation Restrictions instructions (FEAT_SPECRES). */
     216    uint32_t        fSpecres : 1;
     217    /** Supports Reliability, Availability, and Serviceability (RAS) Extension (FEAT_RAS). */
     218    uint32_t        fRas : 1;
     219    /** Supports Speculation Barrier (FEAT_SB). */
     220    uint32_t        fSb : 1;
     221    /** Supports Advanced SIMD SHA1 instructions (FEAT_SHA1). */
     222    uint32_t        fSha1 : 1;
     223    /** Supports Advanced SIMD SHA256 instructions (FEAT_SHA256). */
     224    uint32_t        fSha256 : 1;
     225    /** Supports Speculation Store Bypass Safe (FEAT_SSBS). */
     226    uint32_t        fSsbs : 1;
     227    /** Supports MRS and MSR instructions for Speculation Store Bypass Safe version 2 (FEAT_SSBS2). */
     228    uint32_t        fSsbs2 : 1;
     229    /** Supports CRC32 instructions (FEAT_CRC32). */
     230    uint32_t        fCrc32 : 1;
     231    /** Supports Intermediate chacing of trnslation table walks (FEAT_nTLBPA). */
     232    uint32_t        fNTlbpa : 1;
     233    /** Supports debug with VHE (FEAT_Debugv8p1). */
     234    uint32_t        fDebugV8p1 : 1;
     235    /** Supports Hierarchical permission disables in translation tables (FEAT_HPDS). */
     236    uint32_t        fHpds : 1;
     237    /** Supports Limited ordering regions (FEAT_LOR). */
     238    uint32_t        fLor : 1;
     239    /** Supports Lare Systems Extensons (FEAT_LSE). */
     240    uint32_t        fLse : 1;
     241    /** Supports Privileged access never (FEAT_PAN). */
     242    uint32_t        fPan : 1;
     243    /** Supports Armv8.1 PMU extensions (FEAT_PMUv3p1). */
     244    uint32_t        fPmuV3p1 : 1;
     245    /** Supports Advanced SIMD rouding double multiply accumulate instructions (FEAT_RDM). */
     246    uint32_t        fRdm : 1;
     247    /** Supports hardware management of the Access flag and dirty state (FEAT_HAFDBS). */
     248    uint32_t        fHafdbs : 1;
     249    /** Supports Virtualization Host Extensions (FEAT_VHE). */
     250    uint32_t        fVhe : 1;
     251    /** Supports 16-bit VMID (FEAT_VMID16). */
     252    uint32_t        fVmid16 : 1;
     253    /** Supports AArch32 BFloat16 instructions (FEAT_AA32BF16). */
     254    uint32_t        fAa32Bf16 : 1;
     255    /** Supports AArch32 Hierarchical permission disables (FEAT_AA32HPD). */
     256    uint32_t        fAa32Hpd : 1;
     257    /** Supports AArch32 Int8 matrix multiplication instructions (FEAT_AA32I8MM). */
     258    uint32_t        fAa32I8mm : 1;
     259    /** Supports AT S1E1R and AT S1E1W instruction variants affected by PSTATE.PAN (FEAT_PAN2). */
     260    uint32_t        fPan2 : 1;
     261    /** Supports AArch64 BFloat16 instructions (FEAT_BF16). */
     262    uint32_t        fBf16 : 1;
     263    /** Supports DC CVADP instruction (FEAT_DPB2). */
     264    uint32_t        fDpb2 : 1;
     265    /** Supports DC VAP instruction (FEAT_DPB). */
     266    uint32_t        fDpb : 1;
     267    /** Supports Debug v8.2 (FEAT_Debugv8p2). */
     268    uint32_t        fDebugV8p2 : 1;
     269    /** Supports Advanced SIMD dot product instructions (FEAT_DotProd). */
     270    uint32_t        fDotProd : 1;
     271    /** Supports Enhanced Virtualization Traps (FEAT_EVT). */
     272    uint32_t        fEvt : 1;
     273    /** Supports Single precision Matrix Multiplication (FEAT_F32MM). */
     274    uint32_t        fF32mm : 1;
     275    /** Supports Double precision Matrix Multiplication (FEAT_F64MM). */
     276    uint32_t        fF64mm : 1;
     277    /** Supports Floating-point half precision multiplication instructions (FEAT_FHM). */
     278    uint32_t        fFhm : 1;
     279    /** Supports Half-precision floating point data processing (FEAT_FP16). */
     280    uint32_t        fFp16 : 1;
     281    /** Supports AArch64 Int8 matrix multiplication instructions (FEAT_I8MM). */
     282    uint32_t        fI8mm : 1;
     283    /** Supports Implicit Error Synchronization event (FEAT_IESB). */
     284    uint32_t        fIesb : 1;
     285    /** Supports Large PA and IPA support (FEAT_LPA). */
     286    uint32_t        fLpa : 1;
     287    /** Supports AArch32 Load/Store Multiple instructions atomicity and ordering controls (FEAT_LSMAOC). */
     288    uint32_t        fLsmaoc : 1;
     289    /** Supports Large VA support (FEAT_LVA). */
     290    uint32_t        fLva : 1;
     291    /** Supports Memory Partitioning and Monitoring Extension (FEAT_MPAM). */
     292    uint32_t        fMpam : 1;
     293    /** Supports PC Sample-based Profiling Extension, version 8.2 (FEAT_PCSRv8p2). */
     294    uint32_t        fPcsrV8p2 : 1;
     295    /** Supports Advanced SIMD SHA3 instructions (FEAT_SHA3). */
     296    uint32_t        fSha3 : 1;
     297    /** Supports Advanced SIMD SHA512 instructions (FEAT_SHA512). */
     298    uint32_t        fSha512 : 1;
     299    /** Supports Advanced SIMD SM3 instructions (FEAT_SM3). */
     300    uint32_t        fSm3 : 1;
     301    /** Supports Advanced SIMD SM4 instructions (FEAT_SM4). */
     302    uint32_t        fSm4 : 1;
     303    /** Supports Statistical Profiling Extension (FEAT_SPE). */
     304    uint32_t        fSpe : 1;
     305    /** Supports Scalable Vector Extension (FEAT_SVE). */
     306    uint32_t        fSve : 1;
     307    /** Supports Translation Table Common not private translations (FEAT_TTCNP). */
     308    uint32_t        fTtcnp : 1;
     309    /** Supports Hierarchical permission disables, version 2 (FEAT_HPDS2). */
     310    uint32_t        fHpds2 : 1;
     311    /** Supports Translation table stage 2 Unprivileged Execute-never (FEAT_XNX). */
     312    uint32_t        fXnx : 1;
     313    /** Supports Unprivileged Access Override control (FEAT_UAO). */
     314    uint32_t        fUao : 1;
     315    /** Supports VMID-aware PIPT instruction cache (FEAT_VPIPT). */
     316    uint32_t        fVpipt : 1;
     317    /** Supports Extended cache index (FEAT_CCIDX). */
     318    uint32_t        fCcidx : 1;
     319    /** Supports Floating-point complex number instructions (FEAT_FCMA). */
     320    uint32_t        fFcma : 1;
     321    /** Supports Debug over Powerdown (FEAT_DoPD). */
     322    uint32_t        fDopd : 1;
     323    /** Supports Enhanced pointer authentication (FEAT_EPAC). */
     324    uint32_t        fEpac : 1;
     325    /** Supports Faulting on AUT* instructions (FEAT_FPAC). */
     326    uint32_t        fFpac : 1;
     327    /** Supports Faulting on combined pointer euthentication instructions (FEAT_FPACCOMBINE). */
     328    uint32_t        fFpacCombine : 1;
     329    /** Supports JavaScript conversion instructions (FEAT_JSCVT). */
     330    uint32_t        fJscvt : 1;
     331    /** Supports Load-Acquire RCpc instructions (FEAT_LRCPC). */
     332    uint32_t        fLrcpc : 1;
     333    /** Supports Nexted Virtualization (FEAT_NV). */
     334    uint32_t        fNv : 1;
     335    /** Supports QARMA5 pointer authentication algorithm (FEAT_PACQARMA5). */
     336    uint32_t        fPacQarma5 : 1;
     337    /** Supports implementation defined pointer authentication algorithm (FEAT_PACIMP). */
     338    uint32_t        fPacImp : 1;
     339    /** Supports Pointer authentication (FEAT_PAuth). */
     340    uint32_t        fPAuth : 1;
     341    /** Supports Enhancements to pointer authentication (FEAT_PAuth2). */
     342    uint32_t        fPAuth2 : 1;
     343    /** Supports Statistical Profiling Extensions version 1.1 (FEAT_SPEv1p1). */
     344    uint32_t        fSpeV1p1 : 1;
     345    /** Supports Activity Monitor Extension, version 1 (FEAT_AMUv1). */
     346    uint32_t        fAmuV1 : 1;
     347    /** Supports Generic Counter Scaling (FEAT_CNTSC). */
     348    uint32_t        fCntsc : 1;
     349    /** Supports Debug v8.4 (FEAT_Debugv8p4). */
     350    uint32_t        fDebugV8p4 : 1;
     351    /** Supports Double Fault Extension (FEAT_DoubleFault). */
     352    uint32_t        fDoubleFault : 1;
     353    /** Supports Data Independent Timing instructions (FEAT_DIT). */
     354    uint32_t        fDit : 1;
     355    /** Supports Condition flag manipulation isntructions (FEAT_FlagM). */
     356    uint32_t        fFlagM : 1;
     357    /** Supports ID space trap handling (FEAT_IDST). */
     358    uint32_t        fIdst : 1;
     359    /** Supports Load-Acquire RCpc instructions version 2 (FEAT_LRCPC2). */
     360    uint32_t        fLrcpc2 : 1;
     361    /** Supports Large Sytem Extensions version 2 (FEAT_LSE2). */
     362    uint32_t        fLse2 : 1;
     363    /** Supports Enhanced nested virtualization support (FEAT_NV2). */
     364    uint32_t        fNv2 : 1;
     365    /** Supports Armv8.4 PMU Extensions (FEAT_PMUv3p4). */
     366    uint32_t        fPmuV3p4 : 1;
     367    /** Supports RAS Extension v1.1 (FEAT_RASv1p1). */
     368    uint32_t        fRasV1p1 : 1;
     369    /** Supports RAS Extension v1.1 System Architecture (FEAT_RASSAv1p1). */
     370    uint32_t        fRassaV1p1 : 1;
     371    /** Supports Stage 2 forced Write-Back (FEAT_S2FWB). */
     372    uint32_t        fS2Fwb : 1;
     373    /** Supports Secure El2 (FEAT_SEL2). */
     374    uint32_t        fSecEl2 : 1;
     375    /** Supports TLB invalidate instructions on Outer Shareable domain (FEAT_TLBIOS). */
     376    uint32_t        fTlbios : 1;
     377    /** Supports TLB invalidate range instructions (FEAT_TLBIRANGE). */
     378    uint32_t        fTlbirange : 1;
     379    /** Supports Self-hosted Trace Extensions (FEAT_TRF). */
     380    uint32_t        fTrf : 1;
     381    /** Supports Translation Table Level (FEAT_TTL). */
     382    uint32_t        fTtl : 1;
     383    /** Supports Translation table break-before-make levels (FEAT_BBM). */
     384    uint32_t        fBbm : 1;
     385    /** Supports Small translation tables (FEAT_TTST). */
     386    uint32_t        fTtst : 1;
     387    /** Supports Branch Target Identification (FEAT_BTI). */
     388    uint32_t        fBti : 1;
     389    /** Supports Enhancements to flag manipulation instructions (FEAT_FlagM2). */
     390    uint32_t        fFlagM2 : 1;
     391    /** Supports Context synchronization and exception handling (FEAT_ExS). */
     392    uint32_t        fExs : 1;
     393    /** Supports Preenting EL0 access to halves of address maps (FEAT_E0PD). */
     394    uint32_t        fE0Pd : 1;
     395    /** Supports Floating-point to integer instructions (FEAT_FRINTTS). */
     396    uint32_t        fFrintts : 1;
     397    /** Supports Guest translation granule size (FEAT_GTG). */
     398    uint32_t        fGtg : 1;
     399    /** Supports Instruction-only Memory Tagging Extension (FEAT_MTE). */
     400    uint32_t        fMte : 1;
     401    /** Supports memory Tagging Extension version 2 (FEAT_MTE2). */
     402    uint32_t        fMte2 : 1;
     403    /** Supports Armv8.5 PMU Extensions (FEAT_PMUv3p5). */
     404    uint32_t        fPmuV3p5 : 1;
     405    /** Supports Random number generator (FEAT_RNG). */
     406    uint32_t        fRng : 1;
     407    /** Supports AMU Extensions version 1.1 (FEAT_AMUv1p1). */
     408    uint32_t        fAmuV1p1 : 1;
     409    /** Supports Enhanced Counter Virtualization (FEAT_ECV). */
     410    uint32_t        fEcv : 1;
     411    /** Supports Fine Grain Traps (FEAT_FGT). */
     412    uint32_t        fFgt : 1;
     413    /** Supports Memory Partitioning and Monitoring version 0.1 (FEAT_MPAMv0p1). */
     414    uint32_t        fMpamV0p1 : 1;
     415    /** Supports Memory Partitioning and Monitoring version 1.1 (FEAT_MPAMv1p1). */
     416    uint32_t        fMpamV1p1 : 1;
     417    /** Supports Multi-threaded PMU Extensions (FEAT_MTPMU). */
     418    uint32_t        fMtPmu : 1;
     419    /** Supports Delayed Trapping of WFE (FEAT_TWED). */
     420    uint32_t        fTwed : 1;
     421    /** Supports Embbedded Trace Macrocell version 4 (FEAT_ETMv4). */
     422    uint32_t        fEtmV4 : 1;
     423    /** Supports Embbedded Trace Macrocell version 4.1 (FEAT_ETMv4p1). */
     424    uint32_t        fEtmV4p1 : 1;
     425    /** Supports Embbedded Trace Macrocell version 4.2 (FEAT_ETMv4p2). */
     426    uint32_t        fEtmV4p2 : 1;
     427    /** Supports Embbedded Trace Macrocell version 4.3 (FEAT_ETMv4p3). */
     428    uint32_t        fEtmV4p3 : 1;
     429    /** Supports Embbedded Trace Macrocell version 4.4 (FEAT_ETMv4p4). */
     430    uint32_t        fEtmV4p4 : 1;
     431    /** Supports Embbedded Trace Macrocell version 4.5 (FEAT_ETMv4p5). */
     432    uint32_t        fEtmV4p5 : 1;
     433    /** Supports Embbedded Trace Macrocell version 4.6 (FEAT_ETMv4p6). */
     434    uint32_t        fEtmV4p6 : 1;
     435    /** Supports Generic Interrupt Controller version 3 (FEAT_GICv3). */
     436    uint32_t        fGicV3 : 1;
     437    /** Supports Generic Interrupt Controller version 3.1 (FEAT_GICv3p1). */
     438    uint32_t        fGicV3p1 : 1;
     439    /** Supports Trapping Non-secure EL1 writes to ICV_DIR (FEAT_GICv3_TDIR). */
     440    uint32_t        fGicV3Tdir : 1;
     441    /** Supports Generic Interrupt Controller version 4 (FEAT_GICv4). */
     442    uint32_t        fGicV4 : 1;
     443    /** Supports Generic Interrupt Controller version 4.1 (FEAT_GICv4p1). */
     444    uint32_t        fGicV4p1 : 1;
     445    /** Supports PMU extension, version 3 (FEAT_PMUv3). */
     446    uint32_t        fPmuv3 : 1;
     447    /** Supports Embedded Trace Extension (FEAT_ETE). */
     448    uint32_t        fEte : 1;
     449    /** Supports Embedded Trace Extension, version 1.1 (FEAT_ETEv1p1). */
     450    uint32_t        fEteV1p1 : 1;
     451    /** Supports Embedded Trace Extension, version 1.2 (FEAT_ETEv1p2). */
     452    uint32_t        fEteV1p2 : 1;
     453    /** Supports Scalable Vector Extension version 2 (FEAT_SVE2). */
     454    uint32_t        fSve2 : 1;
     455    /** Supports Scalable Vector AES instructions (FEAT_SVE_AES). */
     456    uint32_t        fSveAes : 1;
     457    /** Supports Scalable Vector PMULL instructions (FEAT_SVE_PMULL128). */
     458    uint32_t        fSvePmull128 : 1;
     459    /** Supports Scalable Vector Bit Permutes instructions (FEAT_SVE_BitPerm). */
     460    uint32_t        fSveBitPerm : 1;
     461    /** Supports Scalable Vector SHA3 instructions (FEAT_SVE_SHA3). */
     462    uint32_t        fSveSha3 : 1;
     463    /** Supports Scalable Vector SM4 instructions (FEAT_SVE_SM4). */
     464    uint32_t        fSveSm4 : 1;
     465    /** Supports Transactional Memory Extension (FEAT_TME). */
     466    uint32_t        fTme : 1;
     467    /** Supports Trace Buffer Extension (FEAT_TRBE). */
     468    uint32_t        fTrbe : 1;
     469    /** Supports Scalable Matrix Extension (FEAT_SME). */
     470    uint32_t        fSme : 1;
     471    /** @} */
     472
     473    /** @name 2020 Architecture Extensions.
     474     * @{ */
     475    /** Supports Alternate floating-point behavior (FEAT_AFP). */
     476    uint32_t        fAfp : 1;
     477    /** Supports HCRX_EL2 register (FEAT_HCX). */
     478    uint32_t        fHcx : 1;
     479    /** Supports Larger phsical address for 4KiB and 16KiB translation granules (FEAT_LPA2). */
     480    uint32_t        fLpa2 : 1;
     481    /** Supports 64 byte loads and stores without return (FEAT_LS64). */
     482    uint32_t        fLs64 : 1;
     483    /** Supports 64 byte stores with return (FEAT_LS64_V). */
     484    uint32_t        fLs64V : 1;
     485    /** Supports 64 byte EL0 stores with return (FEAT_LS64_ACCDATA). */
     486    uint32_t        fLs64Accdata : 1;
     487    /** Supports MTE Asymmetric Fault Handling (FEAT_MTE3). */
     488    uint32_t        fMte3 : 1;
     489    /** Supports SCTLR_ELx.EPAN (FEAT_PAN3). */
     490    uint32_t        fPan3 : 1;
     491    /** Supports Armv8.7 PMU extensions (FEAT_PMUv3p7). */
     492    uint32_t        fPmuV3p7 : 1;
     493    /** Supports Increased precision of Reciprocal Extimate and Reciprocal Square Root Estimate (FEAT_RPRES). */
     494    uint32_t        fRpres : 1;
     495    /** Supports Realm Management Extension (FEAT_RME). */
     496    uint32_t        fRme : 1;
     497    /** Supports Full A64 instruction set support in Streaming SVE mode (FEAT_SME_FA64). */
     498    uint32_t        fSmeFA64 : 1;
     499    /** Supports Double-precision floating-point outer product instructions (FEAT_SME_F64F64). */
     500    uint32_t        fSmeF64F64 : 1;
     501    /** Supports 16-bit to 64-bit integer widening outer product instructions (FEAT_SME_I16I64). */
     502    uint32_t        fSmeI16I64 : 1;
     503    /** Supports Statistical Profiling Extensions version 1.2 (FEAT_SPEv1p2). */
     504    uint32_t        fSpeV1p2 : 1;
     505    /** Supports WFE and WFI instructions with timeout (FEAT_WFxT). */
     506    uint32_t        fWfxt : 1;
     507    /** Supports XS attribute (FEAT_XS). */
     508    uint32_t        fXs : 1;
     509    /** Supports branch Record Buffer Extension (FEAT_BRBE). */
     510    uint32_t        fBrbe : 1;
     511    /** @} */
     512
     513    /** @name 2021 Architecture Extensions.
     514     * @{ */
     515    /** Supports Control for cache maintenance permission (FEAT_CMOW). */
     516    uint32_t        fCmow : 1;
     517    /** Supports PAC algorithm enhancement (FEAT_CONSTPACFIELD). */
     518    uint32_t        fConstPacField : 1;
     519    /** Supports Debug v8.8 (FEAT_Debugv8p8). */
     520    uint32_t        fDebugV8p8 : 1;
     521    /** Supports Hinted conditional branches (FEAT_HBC). */
     522    uint32_t        fHbc : 1;
     523    /** Supports Setting of MDCR_EL2.HPMN to zero (FEAT_HPMN0). */
     524    uint32_t        fHpmn0 : 1;
     525    /** Supports Non-Maskable Interrupts (FEAT_NMI). */
     526    uint32_t        fNmi : 1;
     527    /** Supports GIC Non-Maskable Interrupts (FEAT_GICv3_NMI). */
     528    uint32_t        fGicV3Nmi : 1;
     529    /** Supports Standardization of memory operations (FEAT_MOPS). */
     530    uint32_t        fMops : 1;
     531    /** Supports Pointer authentication - QARMA3 algorithm (FEAT_PACQARMA3). */
     532    uint32_t        fPacQarma3 : 1;
     533    /** Supports Event counting threshold (FEAT_PMUv3_TH). */
     534    uint32_t        fPmuV3Th : 1;
     535    /** Supports Armv8.8 PMU extensions (FEAT_PMUv3p8). */
     536    uint32_t        fPmuV3p8 : 1;
     537    /** Supports 64-bit external interface to the Performance Monitors (FEAT_PMUv3_EXT64). */
     538    uint32_t        fPmuV3Ext64 : 1;
     539    /** Supports 32-bit external interface to the Performance Monitors (FEAT_PMUv3_EXT32). */
     540    uint32_t        fPmuV3Ext32 : 1;
     541    /** Supports External interface to the Performance Monitors (FEAT_PMUv3_EXT). */
     542    uint32_t        fPmuV3Ext : 1;
     543    /** Supports Trapping support for RNDR/RNDRRS (FEAT_RNG_TRAP). */
     544    uint32_t        fRngTrap : 1;
     545    /** Supports Statistical Profiling Extension version 1.3 (FEAT_SPEv1p3). */
     546    uint32_t        fSpeV1p3 : 1;
     547    /** Supports EL0 use of IMPLEMENTATION DEFINEd functionality (FEAT_TIDCP1). */
     548    uint32_t        fTidcp1 : 1;
     549    /** Supports Branch Record Buffer Extension version 1.1 (FEAT_BRBEv1p1). */
     550    uint32_t        fBrbeV1p1 : 1;
     551    /** @} */
     552
     553    /** @name 2022 Architecture Extensions.
     554     * @{ */
     555    /** Supports Address Breakpoint Linking Extenions (FEAT_ABLE). */
     556    uint32_t        fAble : 1;
     557    /** Supports Asynchronous Device error exceptions (FEAT_ADERR). */
     558    uint32_t        fAderr : 1;
     559    /** Supports Memory Attribute Index Enhancement (FEAT_AIE). */
     560    uint32_t        fAie : 1;
     561    /** Supports Asynchronous Normal error exception (FEAT_ANERR). */
     562    uint32_t        fAnerr : 1;
     563    /** Supports Breakpoint Mismatch and Range Extension (FEAT_BWE). */
     564    uint32_t        fBwe : 1;
     565    /** Supports Clear Branch History instruction (FEAT_CLRBHB). */
     566    uint32_t        fClrBhb : 1;
     567    /** Supports Check Feature Status (FEAT_CHK). */
     568    uint32_t        fChk : 1;
     569    /** Supports Common Short Sequence Compression instructions (FEAT_CSSC). */
     570    uint32_t        fCssc : 1;
     571    /** Supports Cache Speculation Variant 2 version 3 (FEAT_CSV2_3). */
     572    uint32_t        fCsv2v3 : 1;
     573    /** Supports 128-bit Translation Tables, 56 bit PA (FEAT_D128). */
     574    uint32_t        fD128 : 1;
     575    /** Supports Debug v8.9 (FEAT_Debugv8p9). */
     576    uint32_t        fDebugV8p9 : 1;
     577    /** Supports Enhancements to the Double Fault Extension (FEAT_DoubleFault2). */
     578    uint32_t        fDoubleFault2 : 1;
     579    /** Supports Exception based Event Profiling (FEAT_EBEP). */
     580    uint32_t        fEbep : 1;
     581    /** Supports Exploitative control using branch history information (FEAT_ECBHB). */
     582    uint32_t        fEcBhb : 1;
     583    /** Supports for EDHSR (FEAT_EDHSR). */
     584    uint32_t        fEdhsr : 1;
     585    /** Supports Embedded Trace Extension version 1.3 (FEAT_ETEv1p3). */
     586    uint32_t        fEteV1p3 : 1;
     587    /** Supports Fine-grained traps 2 (FEAT_FGT2). */
     588    uint32_t        fFgt2 : 1;
     589    /** Supports Guarded Control Stack Extension (FEAT_GCS). */
     590    uint32_t        fGcs : 1;
     591    /** Supports Hardware managed Access Flag for Table descriptors (FEAT_HAFT). */
     592    uint32_t        fHaft : 1;
     593    /** Supports Instrumentation Extension (FEAT_ITE). */
     594    uint32_t        fIte : 1;
     595    /** Supports Load-Acquire RCpc instructions version 3 (FEAT_LRCPC3). */
     596    uint32_t        fLrcpc3 : 1;
     597    /** Supports 128-bit atomics (FEAT_LSE128). */
     598    uint32_t        fLse128 : 1;
     599    /** Supports 56-bit VA (FEAT_LVA3). */
     600    uint32_t        fLva3 : 1;
     601    /** Supports Memory Encryption Contexts (FEAT_MEC). */
     602    uint32_t        fMec : 1;
     603    /** Supports Enhanced Memory Tagging Extension (FEAT_MTE4). */
     604    uint32_t        fMte4 : 1;
     605    /** Supports Canoncial Tag checking for untagged memory (FEAT_MTE_CANONCIAL_TAGS). */
     606    uint32_t        fMteCanonicalTags : 1;
     607    /** Supports FAR_ELx on a Tag Check Fault (FEAT_MTE_TAGGED_FAR). */
     608    uint32_t        fMteTaggedFar : 1;
     609    /** Supports Store only Tag checking (FEAT_MTE_STORE_ONLY). */
     610    uint32_t        fMteStoreOnly : 1;
     611    /** Supports Memory tagging with Address tagging disabled (FEAT_MTE_NO_ADDRESS_TAGS). */
     612    uint32_t        fMteNoAddressTags : 1;
     613    /** Supports Memory tagging asymmetric faults (FEAT_MTE_ASYM_FAULT). */
     614    uint32_t        fMteAsymFault : 1;
     615    /** Supports Memory Tagging asynchronous faulting (FEAT_MTE_ASYNC). */
     616    uint32_t        fMteAsync : 1;
     617    /** Supports Allocation tag access permission (FEAT_MTE_PERM_S1). */
     618    uint32_t        fMtePermS1 : 1;
     619    /** Supports Armv8.9 PC Sample-based Profiling Extension (FEAT_PCSRv8p9). */
     620    uint32_t        fPcsrV8p9 : 1;
     621    /** Supports Permission model enhancements (FEAT_S1PIE). */
     622    uint32_t        fS1Pie : 1;
     623    /** Supports Permission model enhancements (FEAT_S2PIE). */
     624    uint32_t        fS2Pie : 1;
     625    /** Supports Permission model enhancements (FEAT_S1POE). */
     626    uint32_t        fS1Poe : 1;
     627    /** Supports Permission model enhancements (FEAT_S2POE). */
     628    uint32_t        fS2Poe : 1;
     629    /** Supports Physical Fault Address Registers (FEAT_PFAR). */
     630    uint32_t        fPfar : 1;
     631    /** Supports Armv8.9 PMU extensions (FEAT_PMUv3p9). */
     632    uint32_t        fPmuV3p9 : 1;
     633    /** Supports PMU event edge detection (FEAT_PMUv3_EDGE). */
     634    uint32_t        fPmuV3Edge : 1;
     635    /** Supports Fixed-function instruction counter (FEAT_PMUv3_ICNTR). */
     636    uint32_t        fPmuV3Icntr : 1;
     637    /** Supports PMU Snapshot Extension (FEAT_PMUv3_SS). */
     638    uint32_t        fPmuV3Ss : 1;
     639    /** Supports SLC traget for PRFM instructions (FEAT_PRFMSLC). */
     640    uint32_t        fPrfmSlc : 1;
     641    /** Supports RAS version 2 (FEAT_RASv2). */
     642    uint32_t        fRasV2 : 1;
     643    /** Supports RAS version 2 System Architecture (FEAT_RASSAv2). */
     644    uint32_t        fRasSaV2 : 1;
     645    /** Supports for Range Prefetch Memory instruction (FEAT_RPFRM). */
     646    uint32_t        fRprfm : 1;
     647    /** Supports extensions to SCTLR_ELx (FEAT_SCTLR2). */
     648    uint32_t        fSctlr2 : 1;
     649    /** Supports Synchronous Exception-based Event Profiling (FEAT_SEBEP). */
     650    uint32_t        fSebep : 1;
     651    /** Supports non-widening half-precision FP16 to FP16 arithmetic for SME2.1 (FEAT_SME_F16F16). */
     652    uint32_t        fSmeF16F16 : 1;
     653    /** Supports Scalable Matrix Extension version 2 (FEAT_SME2). */
     654    uint32_t        fSme2 : 1;
     655    /** Supports Scalable Matrix Extension version 2.1 (FEAT_SME2p1). */
     656    uint32_t        fSme2p1 : 1;
     657    /** Supports Enhanced speculation restriction instructions (FEAT_SPECRES2). */
     658    uint32_t        fSpecres2 : 1;
     659    /** Supports System Performance Monitors Extension (FEAT_SPMU). */
     660    uint32_t        fSpmu : 1;
     661    /** Supports Statistical profiling Extension version 1.4 (FEAT_SPEv1p4). */
     662    uint32_t        fSpeV1p4 : 1;
     663    /** Supports Call Return Branch Records (FEAT_SPE_CRR). */
     664    uint32_t        fSpeCrr : 1;
     665    /** Supports Data Source Filtering (FEAT_SPE_FDS). */
     666    uint32_t        fSpeFds : 1;
     667    /** Supports Scalable Vector Extension version SVE2.1 (FEAT_SVE2p1). */
     668    uint32_t        fSve2p1 : 1;
     669    /** Supports Non-widening BFloat16 to BFloat16 arithmetic for SVE (FEAT_SVE_B16B16). */
     670    uint32_t        fSveB16B16 : 1;
     671    /** Supports 128-bit System instructions (FEAT_SYSINSTR128). */
     672    uint32_t        fSysInstr128 : 1;
     673    /** Supports 128-bit System registers (FEAT_SYSREG128). */
     674    uint32_t        fSysReg128 : 1;
     675    /** Supports Extension to TCR_ELx (FEAT_TCR2). */
     676    uint32_t        fTcr2 : 1;
     677    /** Supports Translation Hardening Extension (FEAT_THE). */
     678    uint32_t        fThe : 1;
     679    /** Supports Trace Buffer external mode (FEAT_TRBE_EXT). */
     680    uint32_t        fTrbeExt : 1;
     681    /** Supports Trace Buffer MPAM extension (FEAT_TRBE_MPAM). */
     682    uint32_t        fTrbeMpam : 1;
     683    /** @} */
     684
    185685    /** Padding to the required size to match CPUMFEATURES for x86/amd64. */
    186     uint8_t         abPadding[48 - 10];
     686    uint8_t         abPadding[6];
    187687} CPUMFEATURES;
    188688#ifndef VBOX_FOR_DTRACE_LIB
    … …  
    251751
    252752
     753/**
     754 * CPU ID registers.
     755 */
     756typedef struct CPUMIDREGS
     757{
     758    /** Content of the ID_AA64PFR0_EL1 register. */
     759    uint64_t        u64RegIdAa64Pfr0El1;
     760    /** Content of the ID_AA64PFR1_EL1 register. */
     761    uint64_t        u64RegIdAa64Pfr1El1;
     762    /** Content of the ID_AA64DFR0_EL1 register. */
     763    uint64_t        u64RegIdAa64Dfr0El1;
     764    /** Content of the ID_AA64DFR1_EL1 register. */
     765    uint64_t        u64RegIdAa64Dfr1El1;
     766    /** Content of the ID_AA64AFR0_EL1 register. */
     767    uint64_t        u64RegIdAa64Afr0El1;
     768    /** Content of the ID_AA64AFR1_EL1 register. */
     769    uint64_t        u64RegIdAa64Afr1El1;
     770    /** Content of the ID_AA64ISAR0_EL1 register. */
     771    uint64_t        u64RegIdAa64Isar0El1;
     772    /** Content of the ID_AA64ISAR1_EL1 register. */
     773    uint64_t        u64RegIdAa64Isar1El1;
     774    /** Content of the ID_AA64MMFR0_EL1 register. */
     775    uint64_t        u64RegIdAa64Mmfr0El1;
     776    /** Content of the ID_AA64MMFR1_EL1 register. */
     777    uint64_t        u64RegIdAa64Mmfr1El1;
     778    /** Content of the ID_AA64MMFR2_EL1 register. */
     779    uint64_t        u64RegIdAa64Mmfr2El1;
     780    /** Content of the CLIDR_EL1 register. */
     781    uint64_t        u64RegClidrEl1;
     782    /** Content of the CTR_EL0 register. */
     783    uint64_t        u64RegCtrEl0;
     784    /** Content of the DCZID_EL0 register. */
     785    uint64_t        u64RegDczidEl0;
     786} CPUMIDREGS;
     787/** Pointer to CPU ID registers. */
     788typedef CPUMIDREGS *PCPUMIDREGS;
     789/** Pointer to a const CPU ID registers structure. */
     790typedef CPUMIDREGS const *PCCPUMIDREGS;
     791
     792
    253793/** @name Changed flags.
    254794 * These flags are used to keep track of which important register that
    … …  
    292832
    293833VMMR3DECL(int)          CPUMR3SysRegRangesInsert(PVM pVM, PCCPUMSYSREGRANGE pNewRange);
     834VMMR3DECL(int)          CPUMR3PopulateFeaturesByIdRegisters(PVM pVM, PCCPUMIDREGS pIdRegs);
    294835
    295836/** @} */
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