Changeset 101682 in vbox

Timestamp:

Oct 31, 2023 12:18:44 PM (15 months ago)

Author:

vboxsync

Message:

VMM/IEM,VBox/err.h: Refactored the native recompiler code to throw/longjmp on errors rather than returning UINT32_MAX/UINT8_MAX. This should make it easier to pinpoint why recompilation fails (we've got an RC) and get rid of hundreds of AssertReturn statements that clutters up the code and introduces lots of unnecessary branches. bugref:10371

Location:

trunk

Files:

• include/VBox/err.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp (modified) (118 diffs)
• src/VBox/VMM/include/IEMInternal.h (modified) (2 diffs)
• src/VBox/VMM/include/IEMN8veRecompiler.h (modified) (152 diffs)

trunk/include/VBox/err.h

@@ -2508 +2508 @@
 /** Recompiler: Translation block allocation failed. */
 #define VERR_IEM_TB_ALLOC_FAILED                    (-5312)
+/** Recompiler: Too deeply nested conditionals. */
+#define VERR_IEM_COND_TOO_DEEPLY_NESTED             (-5313)
+/** Recompiler: Failed to reconcile the register/variable state on endif. */
+#define VERR_IEM_COND_ENDIF_RECONCILIATION_FAILED   (-5314)
+/** Recompiler: Failed to allocate more memory for debug info. */
+#define VERR_IEM_DBGINFO_OUT_OF_MEMORY              (-5315)
+/** Recompiler: Debug info internal processing error \#1. */
+#define VERR_IEM_DBGINFO_IPE_1                      (-5316)
+/** Recompiler: Debug info internal processing error \#2. */
+#define VERR_IEM_DBGINFO_IPE_2                      (-5317)
+/** Recompiler: Fixup internal processing error \#1. */
+#define VERR_IEM_FIXUP_IPE_1                        (-5318)
+/** Recompiler: Too many fixups. */
+#define VERR_IEM_FIXUP_TOO_MANY                     (-5319)
+/** Recompiler: Out of memory. */
+#define VERR_IEM_FIXUP_OUT_OF_MEMORY                (-5320)
+/** Recompiler: Hit instruction buffer size limit. */
+#define VERR_IEM_INSTR_BUF_TOO_LARGE                (-5321)
+/** Recompiler: Out of memory for the instruction buffer (regular heap). */
+#define VERR_IEM_INSTR_BUF_OUT_OF_MEMORY            (-5322)
+/** Recompiler: Too many labels. */
+#define VERR_IEM_LABEL_TOO_MANY                     (-5323)
+/** Recompiler: Out of memory for labels.   */
+#define VERR_IEM_LABEL_OUT_OF_MEMORY                (-5324)
+/** Recompiler: Label internal processing error \#1. */
+#define VERR_IEM_LABEL_IPE_1                        (-5325)
+/** Recompiler: Label internal processing error \#2. */
+#define VERR_IEM_LABEL_IPE_2                        (-5326)
+/** Recompiler: Label internal processing error \#3. */
+#define VERR_IEM_LABEL_IPE_3                        (-5327)
+/** Recompiler: Label internal processing error \#4. */
+#define VERR_IEM_LABEL_IPE_4                        (-5328)
+/** Recompiler: Label internal processing error \#5. */
+#define VERR_IEM_LABEL_IPE_5                        (-5329)
+/** Recompiler: Label internal processing error \#6. */
+#define VERR_IEM_LABEL_IPE_6                        (-5330)
+/** Recompiler: Label internal processing error \#7. */
+#define VERR_IEM_LABEL_IPE_7                        (-5331)
+
+/** Recompiler: Out of host register. */
+#define VERR_IEM_REG_OUT_OF_REGISTERS               (-5340)
+/** Recompiler: No temporary host register available. */
+#define VERR_IEM_REG_ALLOCATOR_NO_FREE_TMP          (-5341)
+/** Recompiler: Register allocator internal processing error \#1. */
+#define VERR_IEM_REG_IPE_1                          (-5342)
+/** Recompiler: Register allocator internal processing error \#2. */
+#define VERR_IEM_REG_IPE_2                          (-5343)
+/** Recompiler: Register allocator internal processing error \#3. */
+#define VERR_IEM_REG_IPE_3                          (-5344)
+/** Recompiler: Register allocator internal processing error \#4. */
+#define VERR_IEM_REG_IPE_4                          (-5345)
+/** Recompiler: Register allocator internal processing error \#5. */
+#define VERR_IEM_REG_IPE_5                          (-5346)
+/** Recompiler: Register allocator internal processing error \#6. */
+#define VERR_IEM_REG_IPE_6                          (-5347)
+/** Recompiler: Register allocator internal processing error \#7. */
+#define VERR_IEM_REG_IPE_7                          (-5348)
+/** Recompiler: Register allocator internal processing error \#8. */
+#define VERR_IEM_REG_IPE_8                          (-5349)
+
+/** Recompiler: Unimplemented case. */
+#define VERR_IEM_EMIT_CASE_NOT_IMPLEMENTED_1        (-5360)
 
 /** Restart the current instruction. For testing only. */

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

@@ -129 +129 @@
 #ifdef VBOX_STRICT
 static uint32_t iemNativeEmitGuestRegValueCheck(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                uint8_t idxReg, IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT;
+                                                uint8_t idxReg, IEMNATIVEGSTREG enmGstReg);
 #endif
 #ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
-static bool iemNativeDbgInfoAddNativeOffset(PIEMRECOMPILERSTATE pReNative, uint32_t off) RT_NOEXCEPT;
-static bool iemNativeDbgInfoAddLabel(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType, uint16_t uData) RT_NOEXCEPT;
+static void iemNativeDbgInfoAddNativeOffset(PIEMRECOMPILERSTATE pReNative, uint32_t off);
+static void iemNativeDbgInfoAddLabel(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType, uint16_t uData);
 #endif
 
@@ -1713 +1713 @@
  * call iemNativeLabelDefine() later to set it.
  *
- * @returns Label ID.
+ * @returns Label ID. Throws VBox status code on failure, so no need to check
+ *          the return value.
  * @param   pReNative   The native recompile state.
  * @param   enmType     The label type.
@@ -1721 +1722 @@
  *                      certain type of labels. Default is zero.
  */
-DECLHIDDEN(uint32_t) iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
-                                          uint32_t offWhere /*= UINT32_MAX*/, uint16_t uData /*= 0*/) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
+                     uint32_t offWhere /*= UINT32_MAX*/, uint16_t uData /*= 0*/)
 {
     /*
@@ -1746 +1748 @@
             {
 #ifdef VBOX_STRICT
-                AssertReturn(uData == 0, UINT32_MAX);
-                AssertReturn(offWhere == UINT32_MAX, UINT32_MAX);
-#endif
-                AssertReturn(paLabels[i].off == UINT32_MAX, UINT32_MAX);
+                AssertStmt(uData == 0, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_1));
+                AssertStmt(offWhere == UINT32_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_1));
+#endif
+                AssertStmt(paLabels[i].off == UINT32_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_2));
                 return i;
             }
@@ -1762 +1764 @@
     {
         uint32_t cNew = pReNative->cLabelsAlloc;
-        AssertReturn(cNew, UINT32_MAX);
-        AssertReturn(cLabels == cNew, UINT32_MAX);
+        AssertStmt(cNew, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_3));
+        AssertStmt(cLabels == cNew, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_3));
         cNew *= 2;
-        AssertReturn(cNew <= _64K, UINT32_MAX); /* IEMNATIVEFIXUP::idxLabel type restrict this */
+        AssertStmt(cNew <= _64K, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_TOO_MANY)); /* IEMNATIVEFIXUP::idxLabel type restrict this */
         paLabels = (PIEMNATIVELABEL)RTMemRealloc(paLabels, cNew * sizeof(paLabels[0]));
-        AssertReturn(paLabels, UINT32_MAX);
+        AssertStmt(paLabels, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_OUT_OF_MEMORY));
         pReNative->paLabels     = paLabels;
         pReNative->cLabelsAlloc = cNew;
@@ -1801 +1803 @@
  * @param   offWhere    The position.
  */
-DECLHIDDEN(void) iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere) RT_NOEXCEPT
-{
-    AssertReturnVoid(idxLabel < pReNative->cLabels);
+DECL_HIDDEN_THROW(void) iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere)
+{
+    AssertStmt(idxLabel < pReNative->cLabels, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_4));
     PIEMNATIVELABEL const pLabel = &pReNative->paLabels[idxLabel];
-    AssertReturnVoid(pLabel->off == UINT32_MAX);
+    AssertStmt(pLabel->off == UINT32_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_5));
     pLabel->off = offWhere;
 #ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
@@ -1839 +1841 @@
 
 
-
 /**
  * Adds a fixup.
  *
- * @returns Success indicator.
+ * @throws  VBox status code (int) on failure.
  * @param   pReNative   The native recompile state.
  * @param   offWhere    The instruction offset of the fixup location.
@@ -1850 +1851 @@
  * @param   offAddend   Fixup addend if applicable to the type. Default is 0.
  */
-DECLHIDDEN(bool) iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
-                                   IEMNATIVEFIXUPTYPE enmType, int8_t offAddend /*= 0*/) RT_NOEXCEPT
+DECL_HIDDEN_THROW(void)
+iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
+                  IEMNATIVEFIXUPTYPE enmType, int8_t offAddend /*= 0*/)
 {
     Assert(idxLabel <= UINT16_MAX);
@@ -1866 +1868 @@
     {
         uint32_t cNew = pReNative->cFixupsAlloc;
-        AssertReturn(cNew, false);
-        AssertReturn(cFixups == cNew, false);
+        AssertStmt(cNew, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_FIXUP_IPE_1));
+        AssertStmt(cFixups == cNew, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_FIXUP_IPE_1));
         cNew *= 2;
-        AssertReturn(cNew <= _128K, false);
+        AssertStmt(cNew <= _128K, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_FIXUP_TOO_MANY));
         paFixups = (PIEMNATIVEFIXUP)RTMemRealloc(paFixups, cNew * sizeof(paFixups[0]));
-        AssertReturn(paFixups, false);
+        AssertStmt(paFixups, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_FIXUP_OUT_OF_MEMORY));
         pReNative->paFixups     = paFixups;
         pReNative->cFixupsAlloc = cNew;
@@ -1884 +1886 @@
     paFixups[cFixups].offAddend = offAddend;
     pReNative->cFixups = cFixups + 1;
-    return true;
-}
+}
+
 
 /**
  * Slow code path for iemNativeInstrBufEnsure.
  */
-DECLHIDDEN(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                        uint32_t cInstrReq) RT_NOEXCEPT
+DECL_HIDDEN_THROW(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq)
 {
     /* Double the buffer size till we meet the request. */
@@ -1902 +1903 @@
     uint32_t const cbNew = cNew * sizeof(IEMNATIVEINSTR);
 #ifdef RT_ARCH_ARM64
-    AssertReturn(cbNew <= _1M, NULL); /* Limited by the branch instruction range (18+2 bits). */
+    uint32_t const cbMaxInstrBuf = _1M; /* Limited by the branch instruction range (18+2 bits). */
 #else
-    AssertReturn(cbNew <= _2M, NULL);
-#endif
+    uint32_t const cbMaxInstrBuf = _2M;
+#endif
+    AssertStmt(cbNew <= cbMaxInstrBuf, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_INSTR_BUF_TOO_LARGE));
 
     void *pvNew = RTMemRealloc(pReNative->pInstrBuf, cbNew);
-    AssertReturn(pvNew, NULL);
+    AssertStmt(pvNew, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_INSTR_BUF_OUT_OF_MEMORY));
 
     pReNative->cInstrBufAlloc   = cNew;
@@ -1918 +1920 @@
 /**
  * Grows the static debug info array used during recompilation.
- * @returns Pointer to the new debug info block, NULL on failure.
- */
-DECL_NO_INLINE(static, PIEMTBDBG) iemNativeDbgInfoGrow(PIEMRECOMPILERSTATE pReNative, PIEMTBDBG pDbgInfo) RT_NOEXCEPT
+ *
+ * @returns Pointer to the new debug info block; throws VBox status code on
+ *          failure, so no need to check the return value.
+ */
+DECL_NO_INLINE(static, PIEMTBDBG) iemNativeDbgInfoGrow(PIEMRECOMPILERSTATE pReNative, PIEMTBDBG pDbgInfo)
 {
     uint32_t cNew = pReNative->cDbgInfoAlloc * 2;
-    AssertReturn(cNew < _1M && cNew != 0, NULL);
+    AssertStmt(cNew < _1M && cNew != 0, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_DBGINFO_IPE_1));
     pDbgInfo = (PIEMTBDBG)RTMemRealloc(pDbgInfo, RT_UOFFSETOF_DYN(IEMTBDBG, aEntries[cNew]));
-    AssertReturn(pDbgInfo, NULL);
+    AssertStmt(pDbgInfo, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_DBGINFO_OUT_OF_MEMORY));
     pReNative->pDbgInfo      = pDbgInfo;
     pReNative->cDbgInfoAlloc = cNew;
@@ -1935 +1939 @@
  * Adds a new debug info uninitialized entry, returning the pointer to it.
  */
-DECLINLINE(PIEMTBDBGENTRY) iemNativeDbgInfoAddNewEntry(PIEMRECOMPILERSTATE pReNative, PIEMTBDBG pDbgInfo)
+DECL_INLINE_THROW(PIEMTBDBGENTRY) iemNativeDbgInfoAddNewEntry(PIEMRECOMPILERSTATE pReNative, PIEMTBDBG pDbgInfo)
 {
     if (RT_LIKELY(pDbgInfo->cEntries < pReNative->cDbgInfoAlloc))
     { /* likely */ }
     else
-    {
         pDbgInfo = iemNativeDbgInfoGrow(pReNative, pDbgInfo);
-        AssertReturn(pDbgInfo, NULL);
-    }
     return &pDbgInfo->aEntries[pDbgInfo->cEntries++];
 }
@@ -1951 +1952 @@
  * Debug Info: Adds a native offset record, if necessary.
  */
-static bool iemNativeDbgInfoAddNativeOffset(PIEMRECOMPILERSTATE pReNative, uint32_t off) RT_NOEXCEPT
+static void iemNativeDbgInfoAddNativeOffset(PIEMRECOMPILERSTATE pReNative, uint32_t off)
 {
     PIEMTBDBG pDbgInfo = pReNative->pDbgInfo;
@@ -1964 +1965 @@
         {
             if (pDbgInfo->aEntries[idx].NativeOffset.offNative == off)
-                return true;
-            AssertReturn(pDbgInfo->aEntries[idx].NativeOffset.offNative < off, false);
+                return;
+            AssertStmt(pDbgInfo->aEntries[idx].NativeOffset.offNative < off,
+                       IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_DBGINFO_IPE_2));
             break;
         }
@@ -1973 +1975 @@
      */
     PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pDbgInfo);
-    AssertReturn(pEntry, false);
     pEntry->NativeOffset.uType     = kIemTbDbgEntryType_NativeOffset;
     pEntry->NativeOffset.offNative = off;
-
-    return true;
 }
 
@@ -1984 +1983 @@
  * Debug Info: Record info about a label.
  */
-static bool iemNativeDbgInfoAddLabel(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType, uint16_t uData) RT_NOEXCEPT
+static void iemNativeDbgInfoAddLabel(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType, uint16_t uData)
 {
     PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pReNative->pDbgInfo);
-    AssertReturn(pEntry, false);
-
     pEntry->Label.uType    = kIemTbDbgEntryType_Label;
     pEntry->Label.uUnused  = 0;
     pEntry->Label.enmLabel = (uint8_t)enmType;
     pEntry->Label.uData    = uData;
-
-    return true;
 }
 
@@ -2001 +1996 @@
  * Debug Info: Record info about a threaded call.
  */
-static bool iemNativeDbgInfoAddThreadedCall(PIEMRECOMPILERSTATE pReNative, IEMTHREADEDFUNCS enmCall, bool fRecompiled) RT_NOEXCEPT
+static void iemNativeDbgInfoAddThreadedCall(PIEMRECOMPILERSTATE pReNative, IEMTHREADEDFUNCS enmCall, bool fRecompiled)
 {
     PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pReNative->pDbgInfo);
-    AssertReturn(pEntry, false);
-
     pEntry->ThreadedCall.uType       = kIemTbDbgEntryType_ThreadedCall;
     pEntry->ThreadedCall.fRecompiled = fRecompiled;
     pEntry->ThreadedCall.uUnused     = 0;
     pEntry->ThreadedCall.enmCall     = (uint16_t)enmCall;
-
-    return true;
 }
 
@@ -2018 +2009 @@
  * Debug Info: Record info about a new guest instruction.
  */
-static bool iemNativeDbgInfoAddGuestInstruction(PIEMRECOMPILERSTATE pReNative, uint32_t fExec) RT_NOEXCEPT
+static void iemNativeDbgInfoAddGuestInstruction(PIEMRECOMPILERSTATE pReNative, uint32_t fExec)
 {
     PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pReNative->pDbgInfo);
-    AssertReturn(pEntry, false);
-
     pEntry->GuestInstruction.uType   = kIemTbDbgEntryType_GuestInstruction;
     pEntry->GuestInstruction.uUnused = 0;
     pEntry->GuestInstruction.fExec   = fExec;
-
-    return true;
 }
 
@@ -2034 +2021 @@
  * Debug Info: Record info about guest register shadowing.
  */
-static bool iemNativeDbgInfoAddGuestRegShadowing(PIEMRECOMPILERSTATE pReNative, IEMNATIVEGSTREG enmGstReg,
-                                                 uint8_t idxHstReg = UINT8_MAX, uint8_t idxHstRegPrev = UINT8_MAX) RT_NOEXCEPT
+static void iemNativeDbgInfoAddGuestRegShadowing(PIEMRECOMPILERSTATE pReNative, IEMNATIVEGSTREG enmGstReg,
+                                                 uint8_t idxHstReg = UINT8_MAX, uint8_t idxHstRegPrev = UINT8_MAX)
 {
     PIEMTBDBGENTRY const pEntry = iemNativeDbgInfoAddNewEntry(pReNative, pReNative->pDbgInfo);
-    AssertReturn(pEntry, false);
-
     pEntry->GuestRegShadowing.uType         = kIemTbDbgEntryType_GuestRegShadowing;
     pEntry->GuestRegShadowing.uUnused       = 0;
@@ -2045 +2030 @@
     pEntry->GuestRegShadowing.idxHstReg     = idxHstReg;
     pEntry->GuestRegShadowing.idxHstRegPrev = idxHstRegPrev;
-
-    return true;
 }
 
@@ -2203 +2186 @@
  * This ASSUMES the caller has done the minimal/optimal allocation checks and
  * failed.
- */
-static uint8_t iemNativeRegAllocFindFree(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fAllowVolatile) RT_NOEXCEPT
+ *
+ * @returns Host register number on success; throws VBox status code on failure, so no
+ *          need to check the return value.
+ */
+static uint8_t iemNativeRegAllocFindFree(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fAllowVolatile)
 {
     uint32_t fRegMask = fAllowVolatile
@@ -2257 +2243 @@
                 if (pReNative->Core.aVars[idxVar].enmKind == kIemNativeVarKind_Stack)
                 {
-                    AssertReturn(pReNative->Core.aVars[idxVar].idxStackSlot != UINT8_MAX, UINT8_MAX);
-                    uint32_t off = *poff;
-                    *poff = off = iemNativeEmitStoreGprByBp(pReNative, off,
-                                                              pReNative->Core.aVars[idxVar].idxStackSlot * sizeof(uint64_t)
-                                                            - IEMNATIVE_FP_OFF_STACK_VARS,
-                                                            idxReg);
-                    AssertReturn(off != UINT32_MAX, UINT8_MAX);
+                    AssertStmt(pReNative->Core.aVars[idxVar].idxStackSlot != UINT8_MAX,
+                               IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_8));
+                    *poff = iemNativeEmitStoreGprByBp(pReNative, *poff,
+                                                        pReNative->Core.aVars[idxVar].idxStackSlot * sizeof(uint64_t)
+                                                      - IEMNATIVE_FP_OFF_STACK_VARS,
+                                                      idxReg);
                 }
 
@@ -2276 +2261 @@
     }
 
-    AssertFailedReturn(UINT8_MAX);
+    AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_OUT_OF_REGISTERS));
 }
 
@@ -2352 +2337 @@
     else
     {
-        AssertReturn(pReNative->Core.aVars[idxVar].idxStackSlot != UINT8_MAX, UINT32_MAX);
+        AssertStmt(pReNative->Core.aVars[idxVar].idxStackSlot != UINT8_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_7));
         off = iemNativeEmitStoreGprByBp(pReNative, off,
                                           pReNative->Core.aVars[idxVar].idxStackSlot * sizeof(uint64_t)
                                         - IEMNATIVE_FP_OFF_STACK_VARS,
                                         idxRegOld);
-        AssertReturn(off != UINT32_MAX, UINT32_MAX);
 
         pReNative->Core.bmHstRegsWithGstShadow &= ~RT_BIT_32(idxRegOld);
@@ -2375 +2359 @@
  * up a register.
  *
- * @returns The host register number, UINT8_MAX on failure.
+ * @returns The host register number; throws VBox status code on failure,
+ *          so no need to check the return value.
  * @param   pReNative       The native recompile state.
  * @param   poff            Pointer to the variable with the code buffer position.
@@ -2384 +2369 @@
  *                          (@c false, for iemNativeRegAllocTmpForGuestReg()).
  */
-DECLHIDDEN(uint8_t) iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                         bool fPreferVolatile /*= true*/) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fPreferVolatile /*= true*/)
 {
     /*
@@ -2408 +2392 @@
     {
         idxReg = iemNativeRegAllocFindFree(pReNative, poff, true /*fAllowVolatile*/);
-        AssertReturn(idxReg != UINT8_MAX, UINT8_MAX);
+        AssertStmt(idxReg != UINT8_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_ALLOCATOR_NO_FREE_TMP));
     }
     return iemNativeRegMarkAllocated(pReNative, idxReg, kIemNativeWhat_Tmp);
@@ -2423 +2407 @@
  * read-only.  Free using iemNativeRegFreeTmpImm.
  *
- * @returns The host register number, UINT8_MAX on failure.
+ * @returns The host register number; throws VBox status code on failure, so no
+ *          need to check the return value.
  * @param   pReNative       The native recompile state.
  * @param   poff            Pointer to the variable with the code buffer position.
@@ -2434 +2419 @@
  * @note    Reusing immediate values has not been implemented yet.
  */
-DECLHIDDEN(uint8_t) iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm,
-                                            bool fPreferVolatile /*= true*/) RT_NOEXCEPT
-{
-    uint8_t idxReg = iemNativeRegAllocTmp(pReNative, poff, fPreferVolatile);
-    if (idxReg < RT_ELEMENTS(pReNative->Core.aHstRegs))
-    {
-        uint32_t off = *poff;
-        *poff = off = iemNativeEmitLoadGprImm64(pReNative, off, idxReg, uImm);
-        AssertReturnStmt(off != UINT32_MAX, iemNativeRegFreeTmp(pReNative, idxReg), UINT8_MAX);
-    }
+DECL_HIDDEN_THROW(uint8_t)
+iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm, bool fPreferVolatile /*= true*/)
+{
+    uint8_t const idxReg = iemNativeRegAllocTmp(pReNative, poff, fPreferVolatile);
+    *poff = iemNativeEmitLoadGprImm64(pReNative, *poff, idxReg, uImm);
     return idxReg;
 }
@@ -2542 +2522 @@
  * be emitted if we have to free up a register to satify the request.
  *
- * @returns The host register number, UINT8_MAX on failure.
+ * @returns The host register number; throws VBox status code on failure, so no
+ *          need to check the return value.
  * @param   pReNative       The native recompile state.
  * @param   poff            Pointer to the variable with the code buffer
@@ -2552 +2533 @@
  * @sa      iemNativeRegAllocTmpForGuestRegIfAlreadyPresent
  */
-DECLHIDDEN(uint8_t) iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                                    IEMNATIVEGSTREG enmGstReg, IEMNATIVEGSTREGUSE enmIntendedUse) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint8_t)
+iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
+                                IEMNATIVEGSTREG enmGstReg, IEMNATIVEGSTREGUSE enmIntendedUse)
 {
     Assert(enmGstReg < kIemNativeGstReg_End && g_aGstShadowInfo[enmGstReg].cb != 0);
@@ -2584 +2566 @@
             {
                 uint8_t const idxRegNew = iemNativeRegAllocTmp(pReNative, poff);
-                Assert(idxRegNew < RT_ELEMENTS(pReNative->Core.aHstRegs));
-
-                uint32_t off = *poff;
-                *poff = off = iemNativeEmitLoadGprFromGpr(pReNative, off, idxRegNew, idxReg);
-                AssertReturn(off != UINT32_MAX, UINT8_MAX);
+
+                *poff = iemNativeEmitLoadGprFromGpr(pReNative, *poff, idxRegNew, idxReg);
 
                 Log12(("iemNativeRegAllocTmpForGuestReg: Duplicated %s for guest %s into %s for destructive calc\n",
@@ -2622 +2601 @@
             /** @todo share register for readonly access. */
             uint8_t const idxRegNew = iemNativeRegAllocTmp(pReNative, poff, enmIntendedUse == kIemNativeGstRegUse_Calculation);
-            AssertReturn(idxRegNew < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT8_MAX);
-
-            uint32_t off = *poff;
-            *poff = off = iemNativeEmitLoadGprFromGpr(pReNative, off, idxRegNew, idxReg);
-            AssertReturn(off != UINT32_MAX, UINT8_MAX);
+
+            *poff = iemNativeEmitLoadGprFromGpr(pReNative, *poff, idxRegNew, idxReg);
 
             if (enmIntendedUse != kIemNativeGstRegUse_ForUpdate)
@@ -2644 +2620 @@
 #ifdef VBOX_STRICT
         /* Strict builds: Check that the value is correct. */
-        uint32_t off = *poff;
-        *poff = off = iemNativeEmitGuestRegValueCheck(pReNative, off, idxReg, enmGstReg);
-        AssertReturn(off != UINT32_MAX, UINT8_MAX);
+        *poff = iemNativeEmitGuestRegValueCheck(pReNative, *poff, idxReg, enmGstReg);
 #endif
 
@@ -2656 +2630 @@
      */
     uint8_t const idxRegNew = iemNativeRegAllocTmp(pReNative, poff, enmIntendedUse == kIemNativeGstRegUse_Calculation);
-    AssertReturn(idxRegNew < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT8_MAX);
-
-    uint32_t off = *poff;
-    *poff = off = iemNativeEmitLoadGprWithGstShadowReg(pReNative, off, idxRegNew, enmGstReg);
-    AssertReturn(off != UINT32_MAX, UINT8_MAX);
+
+    *poff = iemNativeEmitLoadGprWithGstShadowReg(pReNative, *poff, idxRegNew, enmGstReg);
 
     if (enmIntendedUse != kIemNativeGstRegUse_Calculation)
-        iemNativeRegMarkAsGstRegShadow(pReNative, idxRegNew, enmGstReg, off);
+        iemNativeRegMarkAsGstRegShadow(pReNative, idxRegNew, enmGstReg, *poff);
     Log12(("iemNativeRegAllocTmpForGuestReg: Allocated %s for guest %s %s\n",
            g_apszIemNativeHstRegNames[idxRegNew], g_aGstShadowInfo[enmGstReg].pszName, s_pszIntendedUse[enmIntendedUse]));
@@ -2682 +2653 @@
  * The intended use can only be readonly!
  *
- * @returns The host register number, UINT8_MAX on failure.
+ * @returns The host register number, UINT8_MAX if not present.
  * @param   pReNative       The native recompile state.
  * @param   poff            Pointer to the instruction buffer offset.
@@ -2688 +2659 @@
  *                          found.
  * @param   enmGstReg       The guest register that will is to be updated.
+ * @note    In strict builds, this may throw instruction buffer growth failures.
+ *          Non-strict builds will not throw anything.
  * @sa iemNativeRegAllocTmpForGuestReg
  */
-DECLHIDDEN(uint8_t) iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                                                    IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint8_t)
+iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, IEMNATIVEGSTREG enmGstReg)
 {
     Assert(enmGstReg < kIemNativeGstReg_End && g_aGstShadowInfo[enmGstReg].cb != 0);
@@ -2719 +2692 @@
 #ifdef VBOX_STRICT
             /* Strict builds: Check that the value is correct. */
-            uint32_t off = *poff;
-            *poff = off = iemNativeEmitGuestRegValueCheck(pReNative, off, idxReg, enmGstReg);
-            AssertReturn(off != UINT32_MAX, UINT8_MAX);
+            *poff = iemNativeEmitGuestRegValueCheck(pReNative, *poff, idxReg, enmGstReg);
 #else
             RT_NOREF(poff);
@@ -2733 +2704 @@
 
 
-DECLHIDDEN(uint8_t)         iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar) RT_NOEXCEPT;
+DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar);
 
 
@@ -2739 +2710 @@
  * Allocates argument registers for a function call.
  *
- * @returns New code buffer offset on success, UINT32_MAX on failure.
+ * @returns New code buffer offset on success; throws VBox status code on failure, so no
+ *          need to check the return value.
  * @param   pReNative   The native recompile state.
  * @param   off         The current code buffer offset.
  * @param   cArgs       The number of arguments the function call takes.
  */
-DECLHIDDEN(uint32_t) iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs) RT_NOEXCEPT
-{
-    AssertReturn(cArgs <= IEMNATIVE_CALL_ARG_GREG_COUNT + IEMNATIVE_FRAME_STACK_ARG_COUNT, false);
+DECL_HIDDEN_THROW(uint32_t) iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs)
+{
+    AssertStmt(cArgs <= IEMNATIVE_CALL_ARG_GREG_COUNT + IEMNATIVE_FRAME_STACK_ARG_COUNT,
+               IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_4));
     Assert(RT_ELEMENTS(g_aidxIemNativeCallRegs) == IEMNATIVE_CALL_ARG_GREG_COUNT);
     Assert(RT_ELEMENTS(g_afIemNativeCallRegs) == IEMNATIVE_CALL_ARG_GREG_COUNT);
@@ -2780 +2753 @@
                     {
                         uint8_t const idxVar = pReNative->Core.aHstRegs[idxReg].idxVar;
-                        AssertReturn(idxVar < RT_ELEMENTS(pReNative->Core.aVars), false);
+                        AssertStmt(idxVar < RT_ELEMENTS(pReNative->Core.aVars),
+                                   IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_5));
                         Assert(pReNative->Core.aVars[idxVar].idxReg == idxReg);
                         Assert(pReNative->Core.bmVars & RT_BIT_32(idxVar));
@@ -2789 +2763 @@
                         {
                             off = iemNativeRegMoveOrSpillStackVar(pReNative, off, idxVar);
-                            AssertReturn(off != UINT32_MAX, false);
                             Assert(!(pReNative->Core.bmHstRegsWithGstShadow & RT_BIT_32(idxReg)));
                         }
@@ -2798 +2771 @@
                     case kIemNativeWhat_Arg:
                     case kIemNativeWhat_rc:
-                        AssertFailedReturn(false);
+                        AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_5));
                     default:
-                        AssertFailedReturn(false);
+                        AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_6));
                 }
 
@@ -2822 +2795 @@
 
 
-DECLHIDDEN(uint8_t)         iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg);
 
 
@@ -2903 +2876 @@
  * @param   fFreeArgVars    Whether to free argument variables for the call.
  */
-DECLHIDDEN(uint32_t) iemNativeRegMoveAndFreeAndFlushAtCall(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                           uint8_t cArgs, bool fFreeArgVars) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeRegMoveAndFreeAndFlushAtCall(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs, bool fFreeArgVars)
 {
     /*
      * Free argument variables first (simplified).
      */
-    AssertReturn(cArgs <= RT_ELEMENTS(pReNative->Core.aidxArgVars), UINT32_MAX);
+    AssertStmt(cArgs <= RT_ELEMENTS(pReNative->Core.aidxArgVars), IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_6));
     if (fFreeArgVars && cArgs > 0)
     {
@@ -2957 +2930 @@
                         pReNative->Core.aVars[idxVar].idxReg = UINT8_MAX;
                     else
-                    {
                         off = iemNativeRegMoveOrSpillStackVar(pReNative, off, idxVar);
-                        AssertReturn(off != UINT32_MAX, UINT32_MAX);
-                    }
                     continue;
                 }
@@ -2979 +2949 @@
                 case kIemNativeWhat_Invalid:
                 case kIemNativeWhat_End:
-                    AssertFailedReturn(UINT32_MAX);
+                    AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_1));
             }
-            AssertFailedReturn(UINT32_MAX);
+            AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_REG_IPE_2));
         }
 
@@ -3079 +3049 @@
  * RIP updates, since these are the most common ones.
  */
-DECLHIDDEN(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off)
 {
     RT_NOREF(pReNative, off);
@@ -3103 +3073 @@
  *       that is something the caller needs to do if applicable.
  */
-DECLHIDDEN(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                          uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg)
 {
     Assert((unsigned)enmGstReg < RT_ELEMENTS(g_aGstShadowInfo));
@@ -3122 +3092 @@
 #endif
         default:
-            AssertFailedReturn(UINT32_MAX);
+            AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IPE_NOT_REACHED_DEFAULT_CASE));
     }
 }
@@ -3136 +3106 @@
  *       Trashes EFLAGS on AMD64.
  */
-static uint32_t iemNativeEmitGuestRegValueCheck(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                uint8_t idxReg, IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT
+static uint32_t
+iemNativeEmitGuestRegValueCheck(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxReg, IEMNATIVEGSTREG enmGstReg)
 {
 # ifdef RT_ARCH_AMD64
-    uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 32);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
+    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 32);
 
     /* cmp reg, [mem] */
@@ -3159 +3128 @@
                 pbCodeBuf[off++] = X86_OP_PRF_SIZE_OP;
             else
-                AssertReturn(g_aGstShadowInfo[enmGstReg].cb == sizeof(uint32_t), UINT32_MAX);
+                AssertStmt(g_aGstShadowInfo[enmGstReg].cb == sizeof(uint32_t),
+                           IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_LABEL_IPE_7));
             if (idxReg >= 8)
                 pbCodeBuf[off++] = X86_OP_REX_R;
@@ -3230 +3200 @@
     off = iemNativeEmitLoadGprWithGstShadowReg(pReNative, off, IEMNATIVE_REG_FIXED_TMP0, enmGstReg);
 
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
     /* sub tmp0, tmp0, idxReg */
     pu32CodeBuf[off++] = Armv8A64MkInstrAddSubReg(true /*fSub*/, IEMNATIVE_REG_FIXED_TMP0, IEMNATIVE_REG_FIXED_TMP0, idxReg);
@@ -3253 +3222 @@
  * from the code if either are non-zero.
  */
-DECLHIDDEN(uint32_t) iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                        uint8_t idxInstr) RT_NOEXCEPT
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr)
 {
 #ifdef RT_ARCH_AMD64
@@ -3269 +3238 @@
     /* edx = eax | rcPassUp */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = 0x0b;                    /* or edx, eax */
     pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, X86_GREG_xDX, X86_GREG_xAX);
@@ -3287 +3255 @@
 
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
 
     pu32CodeBuf[off++] = Armv8A64MkInstrOrr(ARMV8_A64_REG_X4, ARMV8_A64_REG_X3, ARMV8_A64_REG_X0, false /*f64Bit*/);
 
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, kIemNativeLabelType_NonZeroRetOrPassUp);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
-    AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5), UINT32_MAX);
+    iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5);
     pu32CodeBuf[off++] = Armv8A64MkInstrCbzCbnz(true /*fJmpIfNotZero*/, ARMV8_A64_REG_X4, false /*f64Bit*/);
 
@@ -3314 +3280 @@
  * @param   idxInstr        The current instruction.
  */
-DECLHIDDEN(uint32_t) iemNativeEmitCheckGprCanonicalMaybeRaiseGp0(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                 uint8_t idxAddrReg, uint8_t idxInstr)
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeEmitCheckGprCanonicalMaybeRaiseGp0(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxAddrReg, uint8_t idxInstr)
 {
     RT_NOREF(idxInstr);
@@ -3332 +3298 @@
      */
     uint8_t const iTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-    AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
     off = iemNativeEmitLoadGprFromGpr(pReNative, off, iTmpReg, idxAddrReg);
@@ -3368 +3333 @@
      */
     uint8_t const iTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-    AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
     off = iemNativeEmitLoadGprImm64(pReNative, off, iTmpReg, UINT64_C(0x800000000000));
@@ -3406 +3370 @@
  * @param   idxInstr        The current instruction.
  */
-DECLHIDDEN(uint32_t) iemNativeEmitCheckGpr32AgainstSegLimitMaybeRaiseGp0(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                         uint8_t idxAddrReg, uint8_t idxSegReg, uint8_t idxInstr)
+DECL_HIDDEN_THROW(uint32_t)
+iemNativeEmitCheckGpr32AgainstSegLimitMaybeRaiseGp0(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                    uint8_t idxAddrReg, uint8_t idxSegReg, uint8_t idxInstr)
 {
     /*
@@ -3416 +3381 @@
 
     /** @todo implement expand down/whatnot checking */
-    AssertReturn(idxSegReg == X86_SREG_CS, UINT32_MAX);
+    AssertStmt(idxSegReg == X86_SREG_CS, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_EMIT_CASE_NOT_IMPLEMENTED_1));
 
     uint8_t const iTmpLimReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                (IEMNATIVEGSTREG)(kIemNativeGstReg_SegLimitFirst + idxSegReg),
                                                                kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(iTmpLimReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
     off = iemNativeEmitCmpGpr32WithGpr(pReNative, off, idxAddrReg, iTmpLimReg);
@@ -3481 +3445 @@
 # endif
 #endif
-    AssertReturn(off != UINT32_MAX, off);
 
     /*
@@ -3568 +3531 @@
      */
     off = iemNativeEmitCheckCallRetAndPassUp(pReNative, off, pCallEntry->idxInstr);
-    AssertReturn(off != UINT32_MAX, off);
 
     return off;
@@ -3673 +3635 @@
      */
     off = iemNativeEmitGprZero(pReNative,off, IEMNATIVE_CALL_RET_GREG);
-    AssertReturn(off != UINT32_MAX, UINT32_MAX);
 
     /*
@@ -3679 +3640 @@
      */
     uint32_t const idxReturn = iemNativeLabelCreate(pReNative, kIemNativeLabelType_Return, off);
-    AssertReturn(idxReturn != UINT32_MAX, UINT32_MAX);
     *pidxReturnLabel = idxReturn;
 
@@ -3686 +3646 @@
      */
 #ifdef RT_ARCH_AMD64
-    uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 20);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
+    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 20);
 
     /* Reposition esp at the r15 restore point. */
@@ -3714 +3673 @@
 
 #elif RT_ARCH_ARM64
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 10);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 10);
 
     /* ldp x19, x20, [sp #IEMNATIVE_FRAME_VAR_SIZE]! ; Unallocate the variable space and restore x19+x20. */
@@ -3771 +3729 @@
      * unwind description for all the code.
      */
-    uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 32);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
+    uint8_t *const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 32);
     pbCodeBuf[off++] = 0x50 + X86_GREG_xBP;     /* push rbp */
     pbCodeBuf[off++] = X86_OP_REX_W;            /* mov rbp, rsp */
@@ -3814 +3771 @@
      * return address our selves here.  We save all non-volatile registers.
      */
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 10);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 10);
 
 # ifdef RT_OS_DARWIN /** @todo This seems to be requirement by libunwind for JIT FDEs. Investigate further as been unable
@@ -3888 +3844 @@
     return iemNativeEmitCImplCall1(pReNative, off, pCallEntry->idxInstr, (uintptr_t)a_pfnCImpl, a_cbInstr, a0)
 
-DECLINLINE(uint32_t) iemNativeEmitCImplCall1(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
-                                             uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitCImplCall1(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
+                                                    uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0)
 {
     return iemNativeEmitCImplCall(pReNative, off, idxInstr, pfnCImpl, cbInstr, 1, uArg0, 0, 0);
@@ -3898 +3854 @@
     return iemNativeEmitCImplCall2(pReNative, off, pCallEntry->idxInstr, (uintptr_t)a_pfnCImpl, a_cbInstr, a0, a1)
 
-DECLINLINE(uint32_t) iemNativeEmitCImplCall2(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
-                                             uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0, uint64_t uArg1)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitCImplCall2(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
+                                                    uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0, uint64_t uArg1)
 {
     return iemNativeEmitCImplCall(pReNative, off, idxInstr, pfnCImpl, cbInstr, 2, uArg0, uArg1, 0);
@@ -3908 +3864 @@
     return iemNativeEmitCImplCall3(pReNative, off, pCallEntry->idxInstr, (uintptr_t)a_pfnCImpl, a_cbInstr, a0, a1, a2)
 
-DECLINLINE(uint32_t) iemNativeEmitCImplCall3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
-                                             uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0, uint64_t uArg1, uint64_t uArg2)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitCImplCall3(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr,
+                                                    uintptr_t pfnCImpl, uint8_t cbInstr, uint64_t uArg0, uint64_t uArg1,
+                                                    uint64_t uArg2)
 {
     return iemNativeEmitCImplCall(pReNative, off, idxInstr, pfnCImpl, cbInstr, 3, uArg0, uArg1, uArg2);
@@ -3920 +3877 @@
 
 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr) \
-    off = iemNativeEmitAddToRip64AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitAddToRip64AndFinishingNoFlags(pReNative, off, (a_cbInstr))
 
 /** Same as iemRegAddToRip64AndFinishingNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitAddToRip64AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddToRip64AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
 {
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition and store the result. */
@@ -3942 +3898 @@
 
 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr) \
-    off = iemNativeEmitAddToEip32AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitAddToEip32AndFinishingNoFlags(pReNative, off, (a_cbInstr))
 
 /** Same as iemRegAddToEip32AndFinishingNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitAddToEip32AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddToEip32AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
 {
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition and store the result. */
@@ -3964 +3919 @@
 
 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr) \
-    off = iemNativeEmitAddToIp16AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitAddToIp16AndFinishingNoFlags(pReNative, off, (a_cbInstr))
 
 /** Same as iemRegAddToIp16AndFinishingNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitAddToIp16AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddToIp16AndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr)
 {
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition and store the result. */
@@ -3992 +3946 @@
 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize) \
     off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \
-                                                            (a_enmEffOpSize), pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                            (a_enmEffOpSize), pCallEntry->idxInstr)
 
 
 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr) \
     off =  iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \
-                                                             IEMMODE_16BIT, pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                             IEMMODE_16BIT, pCallEntry->idxInstr)
 
 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr) \
     off =  iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \
-                                                             IEMMODE_64BIT, pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                             IEMMODE_64BIT, pCallEntry->idxInstr)
 
 /** Same as iemRegRip64RelativeJumpS8AndFinishNoFlags,
  *  iemRegRip64RelativeJumpS16AndFinishNoFlags and
  *  iemRegRip64RelativeJumpS32AndFinishNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                       uint8_t cbInstr, int32_t offDisp, IEMMODE enmEffOpSize,
-                                                                       uint8_t idxInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr,
+                                                  int32_t offDisp, IEMMODE enmEffOpSize, uint8_t idxInstr)
 {
     Assert(enmEffOpSize == IEMMODE_64BIT || enmEffOpSize == IEMMODE_16BIT);
@@ -4020 +3971 @@
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition. */
@@ -4047 +3997 @@
 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize) \
     off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \
-                                                            (a_enmEffOpSize), pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                            (a_enmEffOpSize), pCallEntry->idxInstr)
 
 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr) \
     off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \
-                                                            IEMMODE_16BIT, pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                            IEMMODE_16BIT, pCallEntry->idxInstr)
 
 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr) \
     off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \
-                                                            IEMMODE_32BIT, pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+                                                            IEMMODE_32BIT, pCallEntry->idxInstr)
 
 /** Same as iemRegEip32RelativeJumpS8AndFinishNoFlags,
  *  iemRegEip32RelativeJumpS16AndFinishNoFlags and
  *  iemRegEip32RelativeJumpS32AndFinishNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                       uint8_t cbInstr, int32_t offDisp, IEMMODE enmEffOpSize,
-                                                                       uint8_t idxInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cbInstr,
+                                                  int32_t offDisp, IEMMODE enmEffOpSize, uint8_t idxInstr)
 {
     Assert(enmEffOpSize == IEMMODE_32BIT || enmEffOpSize == IEMMODE_16BIT);
@@ -4074 +4021 @@
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition. */
@@ -4096 +4042 @@
 
 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr) \
-    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), pCallEntry->idxInstr)
 
 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) \
-    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), pCallEntry->idxInstr)
 
 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr) \
-    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), pCallEntry->idxInstr); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), pCallEntry->idxInstr)
 
 /** Same as iemRegIp16RelativeJumpS8AndFinishNoFlags. */
-DECLINLINE(uint32_t) iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                      uint8_t cbInstr, int32_t offDisp, uint8_t idxInstr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                 uint8_t cbInstr, int32_t offDisp, uint8_t idxInstr)
 {
     /* We speculatively modify PC and may raise #GP(0), so make sure the right value is in CPUMCTX. */
@@ -4116 +4060 @@
     /* Allocate a temporary PC register. */
     uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
 
     /* Perform the addition, clamp the result, check limit (may #GP(0) + exit TB) and store the result. */
@@ -4141 +4084 @@
  *          (too many nestings)
  */
-DECLINLINE(PIEMNATIVECOND) iemNativeCondPushIf(PIEMRECOMPILERSTATE pReNative)
+DECL_INLINE_THROW(PIEMNATIVECOND) iemNativeCondPushIf(PIEMRECOMPILERSTATE pReNative)
 {
     uint32_t const idxStack = pReNative->cCondDepth;
-    AssertReturn(idxStack < RT_ELEMENTS(pReNative->aCondStack), NULL);
+    AssertStmt(idxStack < RT_ELEMENTS(pReNative->aCondStack), IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_COND_TOO_DEEPLY_NESTED));
 
     PIEMNATIVECOND const pEntry = &pReNative->aCondStack[idxStack];
@@ -4152 +4095 @@
     pEntry->fInElse       = false;
     pEntry->idxLabelElse  = iemNativeLabelCreate(pReNative, kIemNativeLabelType_Else, UINT32_MAX /*offWhere*/, uCondSeqNo);
-    AssertReturn(pEntry->idxLabelElse != UINT32_MAX, NULL);
     pEntry->idxLabelEndIf = iemNativeLabelCreate(pReNative, kIemNativeLabelType_Endif, UINT32_MAX /*offWhere*/, uCondSeqNo);
-    AssertReturn(pEntry->idxLabelEndIf != UINT32_MAX, NULL);
 
     return pEntry;
@@ -4163 +4104 @@
  * Start of the if-block, snapshotting the register and variable state.
  */
-DECLINLINE(void) iemNativeCondStartIfBlock(PIEMRECOMPILERSTATE pReNative, uint32_t offIfBlock, uint32_t idxLabelIf = UINT32_MAX)
+DECL_INLINE_THROW(void)
+iemNativeCondStartIfBlock(PIEMRECOMPILERSTATE pReNative, uint32_t offIfBlock, uint32_t idxLabelIf = UINT32_MAX)
 {
     Assert(offIfBlock != UINT32_MAX);
@@ -4187 +4129 @@
 #define IEM_MC_ELSE() } while (0); \
         off = iemNativeEmitElse(pReNative, off); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX); \
         do {
 
 /** Emits code related to IEM_MC_ELSE. */
-DECLINLINE(uint32_t) iemNativeEmitElse(PIEMRECOMPILERSTATE pReNative, uint32_t off)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitElse(PIEMRECOMPILERSTATE pReNative, uint32_t off)
 {
     /* Check sanity and get the conditional stack entry. */
@@ -4216 +4157 @@
 
 #define IEM_MC_ENDIF() } while (0); \
-        off = iemNativeEmitEndIf(pReNative, off); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX)
+        off = iemNativeEmitEndIf(pReNative, off)
 
 /** Emits code related to IEM_MC_ENDIF. */
-DECLINLINE(uint32_t) iemNativeEmitEndIf(PIEMRECOMPILERSTATE pReNative, uint32_t off)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitEndIf(PIEMRECOMPILERSTATE pReNative, uint32_t off)
 {
     /* Check sanity and get the conditional stack entry. */
@@ -4308 +4248 @@
 
         /* Finally, check that the host register allocations matches. */
-        AssertMsgReturn(pReNative->Core.bmHstRegs == pOther->bmHstRegs,
-                        ("Core.bmHstRegs=%#x pOther->bmHstRegs=%#x - %#x\n",
-                         pReNative->Core.bmHstRegs, pOther->bmHstRegs, pReNative->Core.bmHstRegs ^ pOther->bmHstRegs),
-                        UINT32_MAX);
+        AssertMsgStmt(pReNative->Core.bmHstRegs == pOther->bmHstRegs,
+                      ("Core.bmHstRegs=%#x pOther->bmHstRegs=%#x - %#x\n",
+                       pReNative->Core.bmHstRegs, pOther->bmHstRegs, pReNative->Core.bmHstRegs ^ pOther->bmHstRegs),
+                      IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_COND_ENDIF_RECONCILIATION_FAILED));
     }
 
@@ -4332 +4272 @@
 #define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \
         off = iemNativeEmitIfEflagAnysBitsSet(pReNative, off, (a_fBits)); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX); \
         do {
 
 /** Emits code for IEM_MC_IF_EFL_ANY_BITS_SET. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagAnysBitsSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitsInEfl)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfEflagAnysBitsSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitsInEfl)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     /* Test and jump. */
@@ -4361 +4298 @@
 #define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \
         off = iemNativeEmitIfEflagNoBitsSet(pReNative, off, (a_fBits)); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX); \
         do {
 
 /** Emits code for IEM_MC_IF_EFL_NO_BITS_SET. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagNoBitsSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitsInEfl)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfEflagNoBitsSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitsInEfl)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     /* Test and jump. */
@@ -4390 +4324 @@
 #define IEM_MC_IF_EFL_BIT_SET(a_fBit) \
         off = iemNativeEmitIfEflagsBitSet(pReNative, off, (a_fBit)); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX); \
         do {
 
 /** Emits code for IEM_MC_IF_EFL_BIT_SET. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagsBitSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfEflagsBitSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     unsigned const iBitNo = ASMBitFirstSetU32(fBitInEfl) - 1;
@@ -4422 +4353 @@
 #define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) \
         off = iemNativeEmitIfEflagsBitNotSet(pReNative, off, (a_fBit)); \
-        AssertReturn(off != UINT32_MAX, UINT32_MAX); \
         do {
 
 /** Emits code for IEM_MC_IF_EFL_BIT_NOT_SET. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagsBitNotSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfEflagsBitNotSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     unsigned const iBitNo = ASMBitFirstSetU32(fBitInEfl) - 1;
@@ -4454 +4382 @@
 #define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2)         \
     off = iemNativeEmitIfEflagsTwoBitsEqual(pReNative, off, a_fBit1, a_fBit2, false /*fInverted*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2)         \
     off = iemNativeEmitIfEflagsTwoBitsEqual(pReNative, off, a_fBit1, a_fBit2, true /*fInverted*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 /** Emits code for IEM_MC_IF_EFL_BITS_EQ and IEM_MC_IF_EFL_BITS_NE. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagsTwoBitsEqual(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                       uint32_t fBit1InEfl, uint32_t fBit2InEfl, bool fInverted)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitIfEflagsTwoBitsEqual(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                  uint32_t fBit1InEfl, uint32_t fBit2InEfl, bool fInverted)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     unsigned const iBitNo1 = ASMBitFirstSetU32(fBit1InEfl) - 1;
@@ -4483 +4408 @@
 #ifdef RT_ARCH_AMD64
     uint8_t const idxTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, fBit1InEfl);
-    AssertReturn(idxTmpReg != UINT8_MAX, UINT32_MAX);
 
     off = iemNativeEmitAndGpr32ByGpr32(pReNative, off, idxTmpReg, idxEflReg);
@@ -4493 +4417 @@
 
 #elif defined(RT_ARCH_ARM64)
-    uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-    AssertReturn(idxTmpReg != UINT8_MAX, UINT32_MAX);
-
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint8_t const    idxTmpReg   = iemNativeRegAllocTmp(pReNative, &off);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
 
     /* and tmpreg, eflreg, #1<<iBitNo1 */
@@ -4533 +4454 @@
 #define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
     off = iemNativeEmitIfEflagsBitNotSetAndTwoBitsEqual(pReNative, off, a_fBit, a_fBit1, a_fBit2, false /*fInverted*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
     off = iemNativeEmitIfEflagsBitNotSetAndTwoBitsEqual(pReNative, off, a_fBit, a_fBit1, a_fBit2, true /*fInverted*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 /** Emits code for IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ and
  *  IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE. */
-DECLINLINE(uint32_t) iemNativeEmitIfEflagsBitNotSetAndTwoBitsEqual(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl,
-                                                                  uint32_t fBit1InEfl, uint32_t fBit2InEfl, bool fInverted)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitIfEflagsBitNotSetAndTwoBitsEqual(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl,
+                                              uint32_t fBit1InEfl, uint32_t fBit2InEfl, bool fInverted)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* We need an if-block label for the non-inverted variant. */
     uint32_t const idxLabelIf = fInverted ? iemNativeLabelCreate(pReNative, kIemNativeLabelType_If, UINT32_MAX,
                                                                  pReNative->paLabels[pEntry->idxLabelElse].uData) : UINT32_MAX;
-    AssertReturn(idxLabelIf != UINT32_MAX || !fInverted, UINT32_MAX);
 
     /* Get the eflags. */
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
 
     /* Translate the flag masks to bit numbers. */
@@ -4577 +4494 @@
     uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off);
 #endif
-    AssertReturn(idxTmpReg != UINT8_MAX, UINT32_MAX);
 
     /* Check for the lone bit first. */
@@ -4595 +4511 @@
 
 #elif defined(RT_ARCH_ARM64)
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
 
     /* and tmpreg, eflreg, #1<<iBitNo1 */
@@ -4632 +4547 @@
 #define IEM_MC_IF_CX_IS_NZ() \
     off = iemNativeEmitIfCxIsNotZero(pReNative, off); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 /** Emits code for IEM_MC_IF_CX_IS_NZ. */
-DECLINLINE(uint32_t) iemNativeEmitIfCxIsNotZero(PIEMRECOMPILERSTATE pReNative, uint32_t off)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfCxIsNotZero(PIEMRECOMPILERSTATE pReNative, uint32_t off)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + X86_GREG_xCX),
                                                                  kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxGstRcxReg != UINT8_MAX, UINT32_MAX);
     off = iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfNoneSet(pReNative, off, idxGstRcxReg, UINT16_MAX, pEntry->idxLabelElse);
     iemNativeRegFreeTmp(pReNative, idxGstRcxReg);
@@ -4655 +4567 @@
 #define IEM_MC_IF_ECX_IS_NZ() \
     off = iemNativeEmitIfRcxEcxIsNotZero(pReNative, off, false /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_RCX_IS_NZ() \
     off = iemNativeEmitIfRcxEcxIsNotZero(pReNative, off, true /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 /** Emits code for IEM_MC_IF_ECX_IS_NZ and IEM_MC_IF_RCX_IS_NZ. */
-DECLINLINE(uint32_t) iemNativeEmitIfRcxEcxIsNotZero(PIEMRECOMPILERSTATE pReNative, uint32_t off, bool f64Bit)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t) iemNativeEmitIfRcxEcxIsNotZero(PIEMRECOMPILERSTATE pReNative, uint32_t off, bool f64Bit)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + X86_GREG_xCX),
                                                                  kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxGstRcxReg != UINT8_MAX, UINT32_MAX);
     off = iemNativeEmitTestIfGprIsZeroAndJmpToLabel(pReNative, off, idxGstRcxReg, f64Bit, pEntry->idxLabelElse);
     iemNativeRegFreeTmp(pReNative, idxGstRcxReg);
@@ -4683 +4591 @@
 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
     off = iemNativeEmitIfCxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
     off = iemNativeEmitIfCxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 /** Emits code for IEM_MC_IF_CX_IS_NZ. */
-DECLINLINE(uint32_t) iemNativeEmitIfCxIsNotZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                 uint32_t fBitInEfl, bool fCheckIfSet)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitIfCxIsNotZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl, bool fCheckIfSet)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* We have to load both RCX and EFLAGS before we can start branching,
@@ -4702 +4607 @@
        register allocator state.
        Doing EFLAGS first as it's more likely to be loaded, right? */
-    uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
-                                                              kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
-
+    uint8_t const idxEflReg    = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
+                                                                 kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + X86_GREG_xCX),
                                                                  kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxGstRcxReg != UINT8_MAX, UINT32_MAX);
 
     /** @todo we could reduce this to a single branch instruction by spending a
@@ -4733 +4635 @@
 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
     off = iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, false /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
     off = iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, false /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET(a_fBit) \
     off = iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, true /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \
     off = iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, true /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX); \
     do {
 
@@ -4755 +4653 @@
  *  IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET and
  *  IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET. */
-DECLINLINE(uint32_t) iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                    uint32_t fBitInEfl, bool fCheckIfSet, bool f64Bit)
-{
-    PIEMNATIVECOND pEntry = iemNativeCondPushIf(pReNative);
-    AssertReturn(pEntry, UINT32_MAX);
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitIfRcxEcxIsNotZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                               uint32_t fBitInEfl, bool fCheckIfSet, bool f64Bit)
+{
+    PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative);
 
     /* We have to load both RCX and EFLAGS before we can start branching,
@@ -4765 +4663 @@
        register allocator state.
        Doing EFLAGS first as it's more likely to be loaded, right? */
-    uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
-                                                              kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
-
+    uint8_t const idxEflReg    = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
+                                                                 kIemNativeGstRegUse_ReadOnly);
     uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + X86_GREG_xCX),
                                                                  kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxGstRcxReg != UINT8_MAX, UINT32_MAX);
 
     /** @todo we could reduce this to a single branch instruction by spending a
@@ -4800 +4695 @@
 
 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8SubtrahendConst) \
-    off = iemNativeEmitSubGregU16(pReNative, off, a_iGReg, a_u8SubtrahendConst); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitSubGregU16(pReNative, off, a_iGReg, a_u8SubtrahendConst)
 
 /** Emits code for IEM_MC_SUB_GREG_U16. */
@@ -4809 +4703 @@
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + iGReg),
                                                                   kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxGstTmpReg != UINT8_MAX, UINT32_MAX);
 
 #ifdef RT_ARCH_AMD64
-    uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
+    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
     pbCodeBuf[off++] = X86_OP_PRF_SIZE_OP;
     if (idxGstTmpReg >= 8)
@@ -4831 +4723 @@
 
 #else
-    uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-    AssertReturn(idxTmpReg != UINT8_MAX, UINT32_MAX);
-
-    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
+    uint8_t const    idxTmpReg   = iemNativeRegAllocTmp(pReNative, &off);
+    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
 
     /* sub tmp, gstgrp, uSubtrahend */
@@ -4856 +4745 @@
 
 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) \
-    off = iemNativeEmitSubGregU32U64(pReNative, off, a_iGReg, a_u8Const, false /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitSubGregU32U64(pReNative, off, a_iGReg, a_u8Const, false /*f64Bit*/)
 
 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) \
-    off = iemNativeEmitSubGregU32U64(pReNative, off, a_iGReg, a_u8Const, true /*f64Bit*/); \
-    AssertReturn(off != UINT32_MAX, UINT32_MAX)
+    off = iemNativeEmitSubGregU32U64(pReNative, off, a_iGReg, a_u8Const, true /*f64Bit*/)
 
 /** Emits code for IEM_MC_SUB_GREG_U32 and IEM_MC_SUB_GREG_U64. */
-DECLINLINE(uint32_t) iemNativeEmitSubGregU32U64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGReg,
-                                                uint8_t uSubtrahend, bool f64Bit)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSubGregU32U64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGReg, uint8_t uSubtrahend, bool f64Bit)
 {
     uint8_t const idxGstTmpReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off,
                                                                  (IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + iGReg),
                                                                   kIemNativeGstRegUse_ForUpdate);
-    AssertReturn(idxGstTmpReg != UINT8_MAX, UINT32_MAX);
 
 #ifdef RT_ARCH_AMD64
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 6);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (f64Bit)
         pbCodeBuf[off++] = X86_OP_REX_W | (idxGstTmpReg >= 8 ? X86_OP_REX_B : 0);
@@ -4904 +4789 @@
     /* sub tmp, gstgrp, uSubtrahend */
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(true /*fSub*/, idxTmpReg, idxGstTmpReg, uSubtrahend, f64Bit);
 
@@ -4945 +4829 @@
 {
     RT_NOREF(pCallEntry);
-//pReNative->pInstrBuf[off++] = 0xcc;
 
     /* It's too convenient to use iemNativeEmitTestBitInGprAndJmpToLabelIfNotSet below
@@ -4951 +4834 @@
     uint32_t const idxLabelVmCheck = iemNativeLabelCreate(pReNative, kIemNativeLabelType_CheckIrq,
                                                           UINT32_MAX, pReNative->uCheckIrqSeqNo++);
-    AssertReturn(idxLabelVmCheck != UINT32_MAX, UINT32_MAX);
 
     uint32_t const idxLabelReturnBreak = iemNativeLabelCreate(pReNative, kIemNativeLabelType_ReturnBreak);
-    AssertReturn(idxLabelReturnBreak != UINT32_MAX, UINT32_MAX);
 
     /* Again, we need to load the extended EFLAGS before we actually need them
@@ -4962 +4843 @@
     uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
                                                               kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxEflReg != UINT8_MAX, UINT32_MAX);
-
-    uint8_t const idxPcReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc,
-                                                             kIemNativeGstRegUse_ReadOnly);
-    AssertReturn(idxPcReg != UINT8_MAX, UINT32_MAX);
+
+    uint8_t const idxPcReg  = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Pc, kIemNativeGstRegUse_ReadOnly);
 
     uint8_t idxTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-    AssertReturn(idxTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
     /*
@@ -5037 +4914 @@
 {
     uint32_t const fExpectedExec = (uint32_t)pCallEntry->auParams[0];
-    uint8_t idxTmpReg = iemNativeRegAllocTmp(pReNative, &off);
-
-    AssertReturn(idxTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
+    uint8_t const  idxTmpReg     = iemNativeRegAllocTmp(pReNative, &off);
+
     off = iemNativeEmitLoadGprFromVCpuU32(pReNative, off, idxTmpReg, RT_UOFFSETOF(VMCPUCC, iem.s.fExec));
     off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxTmpReg, IEMTB_F_KEY_MASK);
@@ -5087 +4963 @@
  * @param   cbBuf   The output buffer size.  At least 32 bytes.
  */
-const char *iemTbFlagsToString(uint32_t fFlags, char *pszBuf, size_t cbBuf)
+DECLHIDDEN(const char *) iemTbFlagsToString(uint32_t fFlags, char *pszBuf, size_t cbBuf) RT_NOEXCEPT
 {
     Assert(cbBuf >= 32);
@@ -5173 +5049 @@
 
 
-void iemNativeDisassembleTb(PCIEMTB pTb, PCDBGFINFOHLP pHlp)
+DECLHIDDEN(void) iemNativeDisassembleTb(PCIEMTB pTb, PCDBGFINFOHLP pHlp) RT_NOEXCEPT
 {
     AssertReturnVoid((pTb->fFlags & IEMTB_F_TYPE_MASK) == IEMTB_F_TYPE_NATIVE);
@@ -5547 +5423 @@
  * @param   pTb     The threaded translation to recompile to native.
  */
-PIEMTB iemNativeRecompile(PVMCPUCC pVCpu, PIEMTB pTb)
+DECLHIDDEN(PIEMTB) iemNativeRecompile(PVMCPUCC pVCpu, PIEMTB pTb) RT_NOEXCEPT
 {
     /*
@@ -5563 +5439 @@
 
     /*
-     * Emit prolog code (fixed).
-     */
-    uint32_t off = iemNativeEmitProlog(pReNative, 0);
-    AssertReturn(off != UINT32_MAX, pTb);
-
-    /*
-     * Convert the calls to native code.
-     */
-#ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
-    int32_t              iGstInstr  = -1;
-    uint32_t             fExec      = pTb->fFlags;
-#endif
-    PCIEMTHRDEDCALLENTRY pCallEntry = pTb->Thrd.paCalls;
-    uint32_t             cCallsLeft = pTb->Thrd.cCalls;
+     * Recompiling and emitting code is done using try/throw/catch or setjmp/longjmp
+     * for aborting if an error happens.
+     */
+    uint32_t        cCallsLeft = pTb->Thrd.cCalls;
 #ifdef LOG_ENABLED
-    uint32_t const       cCallsOrg  = cCallsLeft;
-#endif
-    while (cCallsLeft-- > 0)
-    {
-        PFNIEMNATIVERECOMPFUNC const pfnRecom = g_apfnIemNativeRecompileFunctions[pCallEntry->enmFunction];
-
+    uint32_t const  cCallsOrg  = cCallsLeft;
+#endif
+    uint32_t        off        = 0;
+    int             rc         = VINF_SUCCESS;
+    IEMNATIVE_TRY_SETJMP(pReNative, rc)
+    {
         /*
-         * Debug info and assembly markup.
+         * Emit prolog code (fixed).
+         */
+        off = iemNativeEmitProlog(pReNative, off);
+
+        /*
+         * Convert the calls to native code.
          */
 #ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
-        if (pCallEntry->enmFunction == kIemThreadedFunc_BltIn_CheckMode)
-            fExec = pCallEntry->auParams[0];
-        iemNativeDbgInfoAddNativeOffset(pReNative, off);
-        if (iGstInstr < (int32_t)pCallEntry->idxInstr)
+        int32_t  iGstInstr  = -1;
+        uint32_t fExec      = pTb->fFlags;
+#endif
+        PCIEMTHRDEDCALLENTRY pCallEntry = pTb->Thrd.paCalls;
+        while (cCallsLeft-- > 0)
         {
-            if (iGstInstr < (int32_t)pTb->cInstructions)
-                iemNativeDbgInfoAddGuestInstruction(pReNative, fExec);
+            PFNIEMNATIVERECOMPFUNC const pfnRecom = g_apfnIemNativeRecompileFunctions[pCallEntry->enmFunction];
+
+            /*
+             * Debug info and assembly markup.
+             */
+#ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
+            if (pCallEntry->enmFunction == kIemThreadedFunc_BltIn_CheckMode)
+                fExec = pCallEntry->auParams[0];
+            iemNativeDbgInfoAddNativeOffset(pReNative, off);
+            if (iGstInstr < (int32_t)pCallEntry->idxInstr)
+            {
+                if (iGstInstr < (int32_t)pTb->cInstructions)
+                    iemNativeDbgInfoAddGuestInstruction(pReNative, fExec);
+                else
+                    Assert(iGstInstr == pTb->cInstructions);
+                iGstInstr = pCallEntry->idxInstr;
+            }
+            iemNativeDbgInfoAddThreadedCall(pReNative, (IEMTHREADEDFUNCS)pCallEntry->enmFunction, pfnRecom != NULL);
+#elif defined(VBOX_STRICT)
+            off = iemNativeEmitMarker(pReNative, off,
+                                      RT_MAKE_U32((pTb->Thrd.cCalls - cCallsLeft - 1) | (pfnRecom ? 0x8000 : 0),
+                                                  pCallEntry->enmFunction));
+#endif
+
+            /*
+             * Actual work.
+             */
+            if (pfnRecom) /** @todo stats on this.   */
+            {
+                //STAM_COUNTER_INC()
+                off = pfnRecom(pReNative, off, pCallEntry);
+            }
             else
-                Assert(iGstInstr == pTb->cInstructions);
-            iGstInstr = pCallEntry->idxInstr;
+                off = iemNativeEmitThreadedCall(pReNative, off, pCallEntry);
+            Assert(off <= pReNative->cInstrBufAlloc);
+            Assert(pReNative->cCondDepth == 0);
+
+            /*
+             * Advance.
+             */
+            pCallEntry++;
         }
-        iemNativeDbgInfoAddThreadedCall(pReNative, (IEMTHREADEDFUNCS)pCallEntry->enmFunction, pfnRecom != NULL);
-#elif defined(VBOX_STRICT)
-        off = iemNativeEmitMarker(pReNative, off,
-                                  RT_MAKE_U32((pTb->Thrd.cCalls - cCallsLeft - 1) | (pfnRecom ? 0x8000 : 0),
-                                              pCallEntry->enmFunction));
-        AssertReturn(off != UINT32_MAX, pTb);
-#endif
 
         /*
-         * Actual work.
+         * Emit the epilog code.
          */
-        if (pfnRecom) /** @todo stats on this.   */
-        {
-            //STAM_COUNTER_INC()
-            off = pfnRecom(pReNative, off, pCallEntry);
-        }
-        else
-            off = iemNativeEmitThreadedCall(pReNative, off, pCallEntry);
-        AssertReturn(off != UINT32_MAX, pTb);
-        Assert(pReNative->cCondDepth == 0);
+        uint32_t idxReturnLabel;
+        off = iemNativeEmitEpilog(pReNative, off, &idxReturnLabel);
 
         /*
-         * Advance.
+         * Generate special jump labels.
          */
-        pCallEntry++;
+        if (pReNative->bmLabelTypes & RT_BIT_64(kIemNativeLabelType_ReturnBreak))
+            off = iemNativeEmitReturnBreak(pReNative, off, idxReturnLabel);
+        if (pReNative->bmLabelTypes & RT_BIT_64(kIemNativeLabelType_RaiseGp0))
+            off = iemNativeEmitRaiseGp0(pReNative, off, idxReturnLabel);
     }
-
-    /*
-     * Emit the epilog code.
-     */
-    uint32_t idxReturnLabel;
-    off = iemNativeEmitEpilog(pReNative, off, &idxReturnLabel);
-    AssertReturn(off != UINT32_MAX, pTb);
-
-    /*
-     * Generate special jump labels.
-     */
-    if (pReNative->bmLabelTypes & RT_BIT_64(kIemNativeLabelType_ReturnBreak))
-    {
-        off = iemNativeEmitReturnBreak(pReNative, off, idxReturnLabel);
-        AssertReturn(off != UINT32_MAX, pTb);
+    IEMNATIVE_CATCH_LONGJMP_BEGIN(pReNative, rc);
+    {
+        Log(("iemNativeRecompile: Caught %Rrc while recompiling!\n", rc));
+        return pTb;
     }
-    if (pReNative->bmLabelTypes & RT_BIT_64(kIemNativeLabelType_RaiseGp0))
-    {
-        off = iemNativeEmitRaiseGp0(pReNative, off, idxReturnLabel);
-        AssertReturn(off != UINT32_MAX, pTb);
-    }
+    IEMNATIVE_CATCH_LONGJMP_END(pReNative);
+    Assert(off <= pReNative->cInstrBufAlloc);
 
     /*

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -1845 +1845 @@
 #  define IEM_TRY_SETJMP(a_pVCpu, a_rcTarget) \
         jmp_buf  JmpBuf; \
-        jmp_buf * volatile pSavedJmpBuf = pVCpu->iem.s.CTX_SUFF(pJmpBuf); \
-        pVCpu->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
+        jmp_buf * volatile pSavedJmpBuf = (a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf); \
+        (a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
         if ((rcStrict = setjmp(JmpBuf)) == 0)
 #  define IEM_TRY_SETJMP_AGAIN(a_pVCpu, a_rcTarget) \
-        pSavedJmpBuf = pVCpu->iem.s.CTX_SUFF(pJmpBuf); \
-        pVCpu->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
+        pSavedJmpBuf = (a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf); \
+        (a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
         if ((rcStrict = setjmp(JmpBuf)) == 0)
 #  define IEM_CATCH_LONGJMP_BEGIN(a_pVCpu, a_rcTarget) \
@@ -5590 +5590 @@
 
 /* Native recompiler public bits: */
-PIEMTB iemNativeRecompile(PVMCPUCC pVCpu, PIEMTB pTb);
-int    iemExecMemAllocatorInit(PVMCPU pVCpu, uint64_t cbMax, uint64_t cbInitial, uint32_t cbChunk);
-void   iemExecMemAllocatorFree(PVMCPU pVCpu, void *pv, size_t cb);
+DECLHIDDEN(PIEMTB)  iemNativeRecompile(PVMCPUCC pVCpu, PIEMTB pTb) RT_NOEXCEPT;
+int                 iemExecMemAllocatorInit(PVMCPU pVCpu, uint64_t cbMax, uint64_t cbInitial, uint32_t cbChunk);
+void                iemExecMemAllocatorFree(PVMCPU pVCpu, void *pv, size_t cb);
 
 

trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

@@ -621 +621 @@
     /** The condition nesting stack. */
     IEMNATIVECOND               aCondStack[2];
+
+#ifndef IEM_WITH_THROW_CATCH
+    /** Pointer to the setjmp/longjmp buffer if we're not using C++ exceptions
+     *  for recompilation error handling. */
+    jmp_buf                     JmpBuf;
+#endif
 } IEMRECOMPILERSTATE;
 /** Pointer to a native recompiler state. */
@@ -626 +632 @@
 
 
+/** @def IEMNATIVE_TRY_SETJMP
+ * Wrapper around setjmp / try, hiding all the ugly differences.
+ *
+ * @note Use with extreme care as this is a fragile macro.
+ * @param   a_pReNative The native recompile state.
+ * @param   a_rcTarget  The variable that should receive the status code in case
+ *                      of a longjmp/throw.
+ */
+/** @def IEMNATIVE_CATCH_LONGJMP_BEGIN
+ * Start wrapper for catch / setjmp-else.
+ *
+ * This will set up a scope.
+ *
+ * @note Use with extreme care as this is a fragile macro.
+ * @param   a_pReNative The native recompile state.
+ * @param   a_rcTarget  The variable that should receive the status code in case
+ *                      of a longjmp/throw.
+ */
+/** @def IEMNATIVE_CATCH_LONGJMP_END
+ * End wrapper for catch / setjmp-else.
+ *
+ * This will close the scope set up by IEMNATIVE_CATCH_LONGJMP_BEGIN and clean
+ * up the state.
+ *
+ * @note Use with extreme care as this is a fragile macro.
+ * @param   a_pReNative The native recompile state.
+ */
+/** @def IEMNATIVE_DO_LONGJMP
+ *
+ * Wrapper around longjmp / throw.
+ *
+ * @param   a_pReNative The native recompile state.
+ * @param   a_rc        The status code jump back with / throw.
+ */
+#ifdef IEM_WITH_THROW_CATCH
+# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
+       a_rcTarget = VINF_SUCCESS; \
+       try
+# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
+       catch (int rcThrown) \
+       { \
+           a_rcTarget = rcThrown
+# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
+       } \
+       ((void)0)
+# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc)  throw int(a_rc)
+#else  /* !IEM_WITH_THROW_CATCH */
+# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
+       if ((a_rcTarget = setjmp((a_pReNative)->JmpBuf)) == 0)
+# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
+       else \
+       { \
+           ((void)0)
+# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
+       }
+# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc)  longjmp((a_pReNative)->JmpBuf, (a_rc))
+#endif /* !IEM_WITH_THROW_CATCH */
+
+
 /**
  * Native recompiler worker for a threaded function.
  *
- * @returns New code buffer offset, UINT32_MAX in case of failure.
+ * @returns New code buffer offset; throws VBox status code in case of a failure.
  * @param   pReNative   The native recompiler state.
  * @param   off         The current code buffer offset.
  * @param   pCallEntry  The threaded call entry.
  *
- * @note    This is not allowed to throw anything atm.
- */
-typedef DECLCALLBACKTYPE(uint32_t, FNIEMNATIVERECOMPFUNC,(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                          PCIEMTHRDEDCALLENTRY pCallEntry));
+ * @note    This may throw/longjmp VBox status codes (int) to abort compilation, so no RT_NOEXCEPT!
+ */
+typedef uint32_t (VBOXCALL FNIEMNATIVERECOMPFUNC)(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry);
 /** Pointer to a native recompiler worker for a threaded function. */
 typedef FNIEMNATIVERECOMPFUNC *PFNIEMNATIVERECOMPFUNC;
 
-/** Defines a native recompiler worker for a threaded function. */
+/** Defines a native recompiler worker for a threaded function.
+ * @see FNIEMNATIVERECOMPFUNC  */
 #define IEM_DECL_IEMNATIVERECOMPFUNC_DEF(a_Name) \
-    DECLCALLBACK(uint32_t) a_Name(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry)
-/** Prototypes a native recompiler function for a threaded function. */
+    uint32_t VBOXCALL a_Name(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry)
+
+/** Prototypes a native recompiler function for a threaded function.
+ * @see FNIEMNATIVERECOMPFUNC  */
 #define IEM_DECL_IEMNATIVERECOMPFUNC_PROTO(a_Name) FNIEMNATIVERECOMPFUNC a_Name
 
-DECLHIDDEN(uint32_t)        iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
-                                                 uint32_t offWhere = UINT32_MAX, uint16_t uData = 0) RT_NOEXCEPT;
-DECLHIDDEN(void)            iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere) RT_NOEXCEPT;
-DECLHIDDEN(bool)            iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
-                                              IEMNATIVEFIXUPTYPE enmType, int8_t offAddend = 0) RT_NOEXCEPT;
-DECLHIDDEN(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                        uint32_t cInstrReq) RT_NOEXCEPT;
-
-DECLHIDDEN(uint8_t)         iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                                 bool fPreferVolatile = true) RT_NOEXCEPT;
-DECLHIDDEN(uint8_t)         iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm,
-                                                    bool fPreferVolatile = true) RT_NOEXCEPT;
-DECLHIDDEN(uint8_t)         iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                                            IEMNATIVEGSTREG enmGstReg,
-                                                            IEMNATIVEGSTREGUSE enmIntendedUse) RT_NOEXCEPT;
-DECLHIDDEN(uint8_t)         iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
-                                                                            IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT;
-
-DECLHIDDEN(uint8_t)         iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar) RT_NOEXCEPT;
-DECLHIDDEN(uint32_t)        iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs) RT_NOEXCEPT;
-DECLHIDDEN(uint8_t)         iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
+DECL_HIDDEN_THROW(uint32_t) iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
+                                                 uint32_t offWhere = UINT32_MAX, uint16_t uData = 0);
+DECL_HIDDEN_THROW(void)     iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere);
+DECL_HIDDEN_THROW(void)     iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
+                                              IEMNATIVEFIXUPTYPE enmType, int8_t offAddend = 0);
+DECL_HIDDEN_THROW(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq);
+
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fPreferVolatile = true);
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm,
+                                                    bool fPreferVolatile = true);
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
+                                                            IEMNATIVEGSTREG enmGstReg, IEMNATIVEGSTREGUSE enmIntendedUse);
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
+                                                                            IEMNATIVEGSTREG enmGstReg);
+
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar);
+DECL_HIDDEN_THROW(uint32_t) iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs);
+DECL_HIDDEN_THROW(uint8_t)  iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg);
 DECLHIDDEN(void)            iemNativeRegFree(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
 DECLHIDDEN(void)            iemNativeRegFreeTmp(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
 DECLHIDDEN(void)            iemNativeRegFreeTmpImm(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
 DECLHIDDEN(void)            iemNativeRegFreeAndFlushMask(PIEMRECOMPILERSTATE pReNative, uint32_t fHstRegMask) RT_NOEXCEPT;
-DECLHIDDEN(uint32_t)        iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off) RT_NOEXCEPT;
-
-DECLHIDDEN(uint32_t)        iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                 uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg) RT_NOEXCEPT;
-DECLHIDDEN(uint32_t)        iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                               uint8_t idxInstr) RT_NOEXCEPT;
+DECL_HIDDEN_THROW(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off);
+
+DECL_HIDDEN_THROW(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                                 uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg);
+DECL_HIDDEN_THROW(uint32_t) iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr);
 
 
@@ -688 +751 @@
  *          allocation size.
  *
- * @returns Pointer to the instruction output buffer on success, NULL on
- *          failure.
+ * @returns Pointer to the instruction output buffer on success; throws VBox
+ *          status code on failure, so no need to check it.
  * @param   pReNative   The native recompile state.
  * @param   off         Current instruction offset.  Works safely for UINT32_MAX
@@ -696 +759 @@
  *                      overestimate this a bit.
  */
-DECL_FORCE_INLINE(PIEMNATIVEINSTR) iemNativeInstrBufEnsure(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq)
-{
-    uint64_t const offChecked = off + (uint64_t)cInstrReq;
+DECL_FORCE_INLINE_THROW(PIEMNATIVEINSTR)
+iemNativeInstrBufEnsure(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq)
+{
+    uint64_t const offChecked = off + (uint64_t)cInstrReq; /** @todo may reconsider the need for UINT32_MAX safety... */
     if (RT_LIKELY(offChecked <= pReNative->cInstrBufAlloc))
     {
@@ -721 +785 @@
  * in the disassembly.
  */
-DECLINLINE(uint32_t) iemNativeEmitMarker(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t uInfo)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitMarker(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t uInfo)
 {
 #ifdef RT_ARCH_AMD64
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (uInfo == 0)
     {
@@ -743 +807 @@
     }
 #elif RT_ARCH_ARM64
+    /* nop */
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    /* nop */
     pu32CodeBuf[off++] = 0xd503201f;
 
@@ -764 +827 @@
  * Emits setting a GPR to zero.
  */
-DECLINLINE(uint32_t) iemNativeEmitGprZero(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr)
-{
-#ifdef RT_ARCH_AMD64
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitGprZero(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr)
+{
+#ifdef RT_ARCH_AMD64
+    /* xor gpr32, gpr32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
-    /* xor gpr32, gpr32 */
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R | X86_OP_REX_B;
@@ -776 +839 @@
 
 #elif RT_ARCH_ARM64
+    /* mov gpr, #0x0 */
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    /* mov gpr, #0x0 */
     pu32CodeBuf[off++] = UINT32_C(0xd2800000) | iGpr;
 
@@ -792 +854 @@
  * Emits loading a constant into a 64-bit GPR
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprImm64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint64_t uImm64)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprImm64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint64_t uImm64)
 {
     if (!uImm64)
@@ -802 +865 @@
         /* mov gpr, imm32 */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 6);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         if (iGpr >= 8)
             pbCodeBuf[off++] = X86_OP_REX_B;
@@ -815 +877 @@
         /* mov gpr, imm64 */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 10);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         if (iGpr < 8)
             pbCodeBuf[off++] = X86_OP_REX_W;
@@ -833 +894 @@
 #elif RT_ARCH_ARM64
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
 
     /*
@@ -891 +951 @@
  *       only the ARM64 version does that.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGpr8Imm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint8_t uImm8)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGpr8Imm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint8_t uImm8)
 {
 #ifdef RT_ARCH_AMD64
     /* mov gpr, imm8 */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -907 +967 @@
     /* movz gpr, imm16, lsl #0 */
     uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = UINT32_C(0xd2800000) | (UINT32_C(0) << 21) | ((uint32_t)uImm8 << 5) | iGpr;
 
@@ -922 +981 @@
  * Common bit of iemNativeEmitLoadGprFromVCpuU64 and friends.
  */
-DECL_FORCE_INLINE(uint32_t) iemNativeEmitGprByVCpuDisp(uint8_t *pbCodeBuf, uint32_t off, uint8_t iGprReg, uint32_t offVCpu)
+DECL_FORCE_INLINE(uint32_t)
+iemNativeEmitGprByVCpuDisp(uint8_t *pbCodeBuf, uint32_t off, uint8_t iGprReg, uint32_t offVCpu)
 {
     if (offVCpu < 128)
@@ -943 +1003 @@
  * Common bit of iemNativeEmitLoadGprFromVCpuU64 and friends.
  */
-DECL_FORCE_INLINE(uint32_t) iemNativeEmitGprByVCpuLdSt(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprReg,
-                                                       uint32_t offVCpu, ARMV8A64INSTRLDSTTYPE enmOperation, unsigned cbData)
+DECL_FORCE_INLINE_THROW(uint32_t)
+iemNativeEmitGprByVCpuLdSt(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprReg,
+                           uint32_t offVCpu, ARMV8A64INSTRLDSTTYPE enmOperation, unsigned cbData)
 {
     /*
@@ -955 +1016 @@
         /* Use the unsigned variant of ldr Wt, [<Xn|SP>, #off]. */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRUOff(enmOperation, iGpr, IEMNATIVE_REG_FIXED_PVMCPU, offVCpu / cbData);
     }
@@ -961 +1021 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRUOff(enmOperation, iGpr, IEMNATIVE_REG_FIXED_PCPUMCTX,
                                                       (offVCpu - RT_UOFFSETOF(VMCPU, cpum.GstCtx)) / cbData);
@@ -973 +1032 @@
 
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRegIdx(enmOperation, iGpr, IEMNATIVE_REG_FIXED_PVMCPU, IEMNATIVE_REG_FIXED_TMP);
     }
@@ -985 +1043 @@
  * Emits a 64-bit GPR load of a VCpu value.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprFromVCpuU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprFromVCpuU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov reg64, mem64 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1013 +1071 @@
  * @note Bits 32 thru 63 in the GPR will be zero after the operation.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprFromVCpuU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprFromVCpuU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov reg32, mem32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1039 +1097 @@
  * @note Bits 16 thru 63 in the GPR will be zero after the operation.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprFromVCpuU16(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprFromVCpuU16(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* movzx reg32, mem16 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 8);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1066 +1124 @@
  * @note Bits 8 thru 63 in the GPR will be zero after the operation.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprFromVCpuU8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprFromVCpuU8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* movzx reg32, mem8 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 8);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1092 +1150 @@
  * Emits a store of a GPR value to a 64-bit VCpu field.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreGprToVCpuU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreGprToVCpuU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov mem64, reg64 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1119 +1177 @@
  * Emits a store of a GPR value to a 32-bit VCpu field.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreGprFromVCpuU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreGprFromVCpuU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov mem32, reg32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1144 +1202 @@
  * Emits a store of a GPR value to a 16-bit VCpu field.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreGprFromVCpuU16(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreGprFromVCpuU16(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov mem16, reg16 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 8);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = X86_OP_PRF_SIZE_OP;
     if (iGpr >= 8)
@@ -1170 +1228 @@
  * Emits a store of a GPR value to a 8-bit VCpu field.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreGprFromVCpuU8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreGprFromVCpuU8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGpr, uint32_t offVCpu)
 {
 #ifdef RT_ARCH_AMD64
     /* mov mem8, reg8 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGpr >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1195 +1253 @@
  * Emits a gprdst = gprsrc load.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprFromGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprFromGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
 {
 #ifdef RT_ARCH_AMD64
     /* mov gprdst, gprsrc */
-    uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
+    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
     if ((iGprDst | iGprSrc) >= 8)
         pbCodeBuf[off++] = iGprDst < 8  ? X86_OP_REX_W | X86_OP_REX_B
@@ -1211 +1269 @@
 
 #elif RT_ARCH_ARM64
+    /* mov dst, src;   alias for: orr dst, xzr, src */
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    /* mov dst, src;   alias for: orr dst, xzr, src */
     pu32CodeBuf[off++] = UINT32_C(0xaa000000) | ((uint32_t)iGprSrc << 16) | ((uint32_t)ARMV8_A64_REG_XZR << 5) | iGprDst;
 
@@ -1253 +1310 @@
  * Emits a 64-bit GRP load instruction with an BP relative source address.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
 {
     /* mov gprdst, qword [rbp + offDisp]  */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1272 +1329 @@
  * Emits a 32-bit GRP load instruction with an BP relative source address.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprByBpU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprByBpU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
 {
     /* mov gprdst, dword [rbp + offDisp]  */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1289 +1346 @@
  * Emits a load effective address to a GRP with an BP relative source address.
  */
-DECLINLINE(uint32_t) iemNativeEmitLeaGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLeaGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t offDisp)
 {
     /* lea gprdst, [rbp + offDisp] */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1309 +1366 @@
  * @note May trash IEMNATIVE_REG_FIXED_TMP0.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offDisp, uint8_t iGprSrc)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreGprByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offDisp, uint8_t iGprSrc)
 {
 #ifdef RT_ARCH_AMD64
     /* mov qword [rbp + offDisp], gprdst */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprSrc < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1327 +1384 @@
         /* str w/ unsigned imm12 (scaled) */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRUOff(kArmv8A64InstrLdStType_St_Dword, iGprSrc,
                                                       ARMV8_A64_REG_BP, (uint32_t)offDisp / 8);
@@ -1335 +1391 @@
         /* stur w/ signed imm9 (unscaled) */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrSturLdur(kArmv8A64InstrLdStType_St_Dword, iGprSrc, ARMV8_A64_REG_BP, offDisp);
     }
@@ -1343 +1398 @@
         off = iemNativeEmitLoadGprImm64(pReNative, off, IEMNATIVE_REG_FIXED_TMP0, (uint32_t)offDisp);
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRegIdx(kArmv8A64InstrLdStType_St_Dword, iGprSrc, ARMV8_A64_REG_BP,
                                                        IEMNATIVE_REG_FIXED_TMP0, kArmv8A64InstrLdStExtend_Sxtw);
@@ -1361 +1415 @@
  * @note May trash IEMNATIVE_REG_FIXED_TMP0.
  */
-DECLINLINE(uint32_t) iemNativeEmitStoreImm64ByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offDisp, uint64_t uImm64)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitStoreImm64ByBp(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offDisp, uint64_t uImm64)
 {
 #ifdef RT_ARCH_AMD64
@@ -1367 +1422 @@
     {
         /* mov qword [rbp + offDisp], imm32 - sign extended */
-        uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 11);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
-
+        uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 11);
         pbCodeBuf[off++] = X86_OP_REX_W;
         pbCodeBuf[off++] = 0xc7;
@@ -1404 +1457 @@
  * Common bit of iemNativeEmitLoadGprByGpr and friends.
  */
-DECL_FORCE_INLINE(uint32_t) iemNativeEmitGprByGprDisp(uint8_t *pbCodeBuf, uint32_t off,
-                                                      uint8_t iGprReg, uint8_t iGprBase, int32_t offDisp)
+DECL_FORCE_INLINE(uint32_t)
+iemNativeEmitGprByGprDisp(uint8_t *pbCodeBuf, uint32_t off, uint8_t iGprReg, uint8_t iGprBase, int32_t offDisp)
 {
     if (offDisp == 0 && (iGprBase & 7) != X86_GREG_xBP) /* Can use encoding w/o displacement field. */
@@ -1436 +1489 @@
  * Common bit of iemNativeEmitLoadGprFromVCpuU64 and friends.
  */
-DECL_FORCE_INLINE(uint32_t) iemNativeEmitGprByGprLdSt(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprReg,
-                                                      uint8_t iGprBase, int32_t offDisp,
-                                                      ARMV8A64INSTRLDSTTYPE enmOperation, unsigned cbData)
+DECL_FORCE_INLINE_THROW(uint32_t)
+iemNativeEmitGprByGprLdSt(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprReg,
+                          uint8_t iGprBase, int32_t offDisp, ARMV8A64INSTRLDSTTYPE enmOperation, unsigned cbData)
 {
     /*
@@ -1449 +1502 @@
         /* Use the unsigned variant of ldr Wt, [<Xn|SP>, #off]. */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRUOff(enmOperation, iGprReg, iGprBase, (uint32_t)offDisp / cbData);
     }
@@ -1458 +1510 @@
         /** @todo reduce by offVCpu by >> 3 or >> 2? if it saves instructions? */
         uint8_t const idxTmpReg = iemNativeRegAllocTmpImm(pReNative, off, (uint64)offDisp);
-        AssertReturn(idxTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrStLdRegIdx(enmOperation, iGprReg, iGprBase, idxTmpReg);
 
@@ -1475 +1525 @@
  * Emits a 64-bit GPR load via a GPR base address with a displacement.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                               uint8_t iGprDst, uint8_t iGprBase, int32_t offDisp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprBase, int32_t offDisp)
 {
 #ifdef RT_ARCH_AMD64
     /* mov reg64, mem64 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 8);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = X86_OP_REX_W | (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprBase < 8 ? 0 : X86_OP_REX_B);
     pbCodeBuf[off++] = 0x8b;
@@ -1501 +1550 @@
  * @note Bits 63 thru 32 in @a iGprDst will be cleared.
  */
-DECLINLINE(uint32_t) iemNativeEmitLoadGpr32ByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                 uint8_t iGprDst, uint8_t iGprBase, int32_t offDisp)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitLoadGpr32ByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprBase, int32_t offDisp)
 {
 #ifdef RT_ARCH_AMD64
     /* mov reg32, mem32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 8);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8 || iGprBase >= 8)
         pbCodeBuf[off++] = (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprBase < 8 ? 0 : X86_OP_REX_B);
@@ -1533 +1581 @@
  * Emits a 64-bit GPR subtract with a signed immediate subtrahend.
  */
-DECLINLINE(uint32_t) iemNativeEmitSubGprImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t iSubtrahend)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSubGprImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t iSubtrahend)
 {
     /* sub gprdst, imm8/imm32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst < 8)
         pbCodeBuf[off++] = X86_OP_REX_W;
@@ -1567 +1615 @@
  * @note The AMD64 version sets flags.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAddTwoGprs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprAddend)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddTwoGprs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprAddend)
 {
 #if defined(RT_ARCH_AMD64)
     /* add Gv,Ev */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = (iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_R)
                      | (iGprAddend < 8 ? 0 : X86_OP_REX_B);
@@ -1580 +1628 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrAddSubReg(false /*fSub*/, iGprDst, iGprDst, iGprAddend);
 
@@ -1594 +1641 @@
  * Emits a 64-bit GPR additions with a 8-bit signed immediate.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAddGprImm8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int8_t iImm8)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddGprImm8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int8_t iImm8)
 {
 #if defined(RT_ARCH_AMD64)
+    /* add or inc */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
-    /* add or inc */
     pbCodeBuf[off++] = iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_B;
     if (iImm8 != 1)
@@ -1615 +1662 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     if (iImm8 >= 0)
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(false /*fSub*/, iGprDst, iGprDst, (uint8_t)iImm8);
@@ -1633 +1679 @@
  * @note Bits 32 thru 63 in the GPR will be zero after the operation.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAddGpr32Imm8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int8_t iImm8)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddGpr32Imm8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int8_t iImm8)
 {
 #if defined(RT_ARCH_AMD64)
+    /* add or inc */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
-    /* add or inc */
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -1655 +1701 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     if (iImm8 >= 0)
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(false /*fSub*/, iGprDst, iGprDst, (uint8_t)iImm8, false /*f64Bit*/);
@@ -1672 +1717 @@
  * Emits a 64-bit GPR additions with a 64-bit signed addend.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAddGprImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int64_t iAddend)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddGprImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int64_t iAddend)
 {
 #if defined(RT_ARCH_AMD64)
@@ -1682 +1728 @@
         /* add grp, imm32 */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_B;
         pbCodeBuf[off++] = 0x81;
@@ -1695 +1740 @@
         /* Best to use a temporary register to deal with this in the simplest way: */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, (uint64_t)iAddend);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
         /* add dst, tmpreg  */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = (iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_R)
                          | (iTmpReg < 8 ? 0 : X86_OP_REX_B);
@@ -1712 +1755 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         if (iAddend >= 0)
             pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(false /*fSub*/, iGprDst, iGprDst, (uint32_t)iAddend);
@@ -1722 +1764 @@
         /* Use temporary register for the immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, (uint64_t)iAddend);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
         /* add gprdst, gprdst, tmpreg */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubReg(false /*fSub*/, iGprDst, iGprDst, iTmpReg);
 
@@ -1744 +1784 @@
  * @note Bits 32 thru 63 in the GPR will be zero after the operation.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAddGpr32Imm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t iAddend)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAddGpr32Imm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, int32_t iAddend)
 {
 #if defined(RT_ARCH_AMD64)
@@ -1752 +1793 @@
     /* add grp, imm32 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -1766 +1806 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         if (iAddend >= 0)
             pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(false /*fSub*/, iGprDst, iGprDst, (uint32_t)iAddend, false /*f64Bit*/);
@@ -1776 +1815 @@
         /* Use temporary register for the immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, (uint32_t)iAddend);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
         /* add gprdst, gprdst, tmpreg */
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubReg(false /*fSub*/, iGprDst, iGprDst, iTmpReg, false /*f64Bit*/);
 
@@ -1802 +1839 @@
  * Emits code for clearing bits 16 thru 63 in the GPR.
  */
-DECLINLINE(uint32_t ) iemNativeEmitClear16UpGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitClear16UpGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst)
 {
 #if defined(RT_ARCH_AMD64)
     /* movzx reg32, reg16 */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B | X86_OP_REX_R;
@@ -1816 +1853 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
 # if 1
     pu32CodeBuf[off++] = Armv8A64MkInstrUxth(iGprDst, iGprDst);
@@ -1837 +1873 @@
  *       and ARM64 hosts.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAndGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc,
-                                               bool fSetFlags = false)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAndGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc, bool fSetFlags = false)
 {
 #if defined(RT_ARCH_AMD64)
     /* and Gv, Ev */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = X86_OP_REX_W | (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprSrc < 8 ? 0 : X86_OP_REX_B);
     pbCodeBuf[off++] = 0x23;
@@ -1851 +1886 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     if (!fSetFlags)
         pu32CodeBuf[off++] = Armv8A64MkInstrAnd(iGprDst, iGprDst, iGprSrc);
@@ -1868 +1902 @@
  * Emits code for AND'ing two 32-bit GPRs.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAndGpr32ByGpr32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAndGpr32ByGpr32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
 {
 #if defined(RT_ARCH_AMD64)
     /* and Gv, Ev */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8 || iGprSrc >= 8)
         pbCodeBuf[off++] = (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprSrc < 8 ? 0 : X86_OP_REX_B);
@@ -1881 +1915 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrAnd(iGprDst, iGprDst, iGprSrc, false /*f64Bit*/);
 
@@ -1898 +1931 @@
  *       and ARM64 hosts.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAndGprByImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint64_t uImm,
-                                               bool fSetFlags = false)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAndGprByImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint64_t uImm, bool fSetFlags = false)
 {
 #if defined(RT_ARCH_AMD64)
@@ -1906 +1939 @@
         /* and Ev, imm8 */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprDst < 8 ? 0 : X86_OP_REX_R);
         pbCodeBuf[off++] = 0x83;
@@ -1916 +1948 @@
         /* and Ev, imm32 */
         uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprDst < 8 ? 0 : X86_OP_REX_R);
         pbCodeBuf[off++] = 0x81;
@@ -1929 +1960 @@
         /* Use temporary register for the 64-bit immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
         off = iemNativeEmitAndGprByGpr(pReNative, off, iGprDst, iTmpReg);
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
@@ -1941 +1971 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         if (!fSetFlags)
             pu32CodeBuf[off++] = Armv8A64MkInstrAndImm(iGprDst, iGprDst, uImmNandS, uImmR);
@@ -1951 +1980 @@
         /* Use temporary register for the 64-bit immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
         off = iemNativeEmitAndGprByGpr(pReNative, off, iGprDst, iTmpReg, fSetFlags);
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
@@ -1967 +1995 @@
  * Emits code for AND'ing an 32-bit GPRs with a constant.
  */
-DECLINLINE(uint32_t ) iemNativeEmitAndGpr32ByImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint32_t uImm,
-                                                 bool fSetFlags = false)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitAndGpr32ByImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint32_t uImm, bool fSetFlags = false)
 {
 #if defined(RT_ARCH_AMD64)
     /* and Ev, imm */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_R;
@@ -1999 +2026 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         if (!fSetFlags)
             pu32CodeBuf[off++] = Armv8A64MkInstrAndImm(iGprDst, iGprDst, uImmNandS, uImmR, false /*f64Bit*/);
@@ -2009 +2035 @@
         /* Use temporary register for the 64-bit immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
         if (!fSetFlags)
             off = iemNativeEmitAndGpr32ByGpr32(pReNative, off, iGprDst, iTmpReg);
@@ -2028 +2053 @@
  * Emits code for XOR'ing two 64-bit GPRs.
  */
-DECLINLINE(uint32_t ) iemNativeEmitXorGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitXorGprByGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
 {
 #if defined(RT_ARCH_AMD64)
     /* and Gv, Ev */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = X86_OP_REX_W | (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprSrc < 8 ? 0 : X86_OP_REX_B);
     pbCodeBuf[off++] = 0x33;
@@ -2040 +2065 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrEor(iGprDst, iGprDst, iGprSrc);
 
@@ -2054 +2078 @@
  * Emits code for XOR'ing two 32-bit GPRs.
  */
-DECLINLINE(uint32_t ) iemNativeEmitXorGpr32ByGpr32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitXorGpr32ByGpr32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc)
 {
 #if defined(RT_ARCH_AMD64)
     /* and Gv, Ev */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8 || iGprSrc >= 8)
         pbCodeBuf[off++] = (iGprDst < 8 ? 0 : X86_OP_REX_R) | (iGprSrc < 8 ? 0 : X86_OP_REX_B);
@@ -2067 +2091 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrEor(iGprDst, iGprDst, iGprSrc, false /*f64Bit*/);
 
@@ -2085 +2108 @@
  * Emits code for shifting a GPR a fixed number of bits to the left.
  */
-DECLINLINE(uint32_t ) iemNativeEmitShiftGprLeft(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitShiftGprLeft(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
 {
     Assert(cShift > 0 && cShift < 64);
@@ -2092 +2116 @@
     /* shl dst, cShift */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_B;
     if (cShift != 1)
@@ -2108 +2131 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrLslImm(iGprDst, iGprDst, cShift);
 
@@ -2122 +2144 @@
  * Emits code for shifting a 32-bit GPR a fixed number of bits to the left.
  */
-DECLINLINE(uint32_t ) iemNativeEmitShiftGpr32Left(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitShiftGpr32Left(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
 {
     Assert(cShift > 0 && cShift < 32);
@@ -2129 +2152 @@
     /* shl dst, cShift */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -2146 +2168 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrLslImm(iGprDst, iGprDst, cShift, false /*64Bit*/);
 
@@ -2160 +2181 @@
  * Emits code for (unsigned) shifting a GPR a fixed number of bits to the right.
  */
-DECLINLINE(uint32_t ) iemNativeEmitShiftGprRight(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitShiftGprRight(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
 {
     Assert(cShift > 0 && cShift < 64);
@@ -2167 +2189 @@
     /* shr dst, cShift */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = iGprDst < 8 ? X86_OP_REX_W : X86_OP_REX_W | X86_OP_REX_B;
     if (cShift != 1)
@@ -2183 +2204 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrLsrImm(iGprDst, iGprDst, cShift);
 
@@ -2198 +2218 @@
  * right.
  */
-DECLINLINE(uint32_t ) iemNativeEmitShiftGpr32Right(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitShiftGpr32Right(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t cShift)
 {
     Assert(cShift > 0 && cShift < 32);
@@ -2205 +2226 @@
     /* shr dst, cShift */
     uint8_t *pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprDst >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -2222 +2242 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrLsrImm(iGprDst, iGprDst, cShift, false /*64Bit*/);
 
@@ -2243 +2262 @@
  * Emits an ARM64 compare instruction.
  */
-DECLINLINE(uint32_t) iemNativeEmitCmpArm64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint8_t iGprRight,
-                                           bool f64Bit = true, uint32_t cShift = 0,
-                                           ARMV8A64INSTRSHIFT enmShift = kArmv8A64InstrShift_Lsr)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitCmpArm64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint8_t iGprRight,
+                      bool f64Bit = true, uint32_t cShift = 0, ARMV8A64INSTRSHIFT enmShift = kArmv8A64InstrShift_Lsr)
 {
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrAddSubReg(true /*fSub*/, ARMV8_A64_REG_XZR /*iRegResult*/, iGprLeft, iGprRight,
                                                   f64Bit, true /*fSetFlags*/, cShift, enmShift);
@@ -2261 +2279 @@
  * with conditional instruction.
  */
-DECLINLINE(uint32_t) iemNativeEmitCmpGprWithGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint8_t iGprRight)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitCmpGprWithGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint8_t iGprRight)
 {
 #ifdef RT_ARCH_AMD64
     /* cmp Gv, Ev */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = X86_OP_REX_W | (iGprLeft >= 8 ? X86_OP_REX_R : 0) | (iGprRight >= 8 ? X86_OP_REX_B : 0);
     pbCodeBuf[off++] = 0x3b;
@@ -2286 +2304 @@
  * with conditional instruction.
  */
-DECLINLINE(uint32_t) iemNativeEmitCmpGpr32WithGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                  uint8_t iGprLeft, uint8_t iGprRight)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitCmpGpr32WithGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint8_t iGprRight)
 {
 #ifdef RT_ARCH_AMD64
     /* cmp Gv, Ev */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprLeft >= 8 || iGprRight >= 8)
         pbCodeBuf[off++] = (iGprLeft >= 8 ? X86_OP_REX_R : 0) | (iGprRight >= 8 ? X86_OP_REX_B : 0);
@@ -2313 +2330 @@
  * flags/whatever for use with conditional instruction.
  */
-DECLINLINE(uint32_t) iemNativeEmitCmpGprWithImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint64_t uImm)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitCmpGprWithImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint64_t uImm)
 {
 #ifdef RT_ARCH_AMD64
@@ -2320 +2338 @@
         /* cmp Ev, Ib */
         uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprLeft >= 8 ? X86_OP_REX_B : 0);
         pbCodeBuf[off++] = 0x83;
@@ -2330 +2347 @@
         /* cmp Ev, imm */
         uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprLeft >= 8 ? X86_OP_REX_B : 0);
         pbCodeBuf[off++] = 0x81;
@@ -2343 +2359 @@
     {
         /* Use temporary register for the immediate. */
-        uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
-
+        uint8_t const iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
         off = iemNativeEmitCmpGprWithGpr(pReNative, off, iGprLeft, iTmpReg);
-
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
     }
@@ -2356 +2369 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(true /*fSub*/, ARMV8_A64_REG_XZR, iGprLeft, (uint32_t)uImm,
                                                          true /*64Bit*/, true /*fSetFlags*/);
@@ -2363 +2375 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(true /*fSub*/, ARMV8_A64_REG_XZR, iGprLeft, (uint32_t)uImm,
                                                          true /*64Bit*/, true /*fSetFlags*/, true /*fShift12*/);
@@ -2371 +2382 @@
         /* Use temporary register for the immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
-
         off = iemNativeEmitCmpGprWithGpr(pReNative, off, iGprLeft, iTmpReg);
-
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
     }
@@ -2391 +2399 @@
  * flags/whatever for use with conditional instruction.
  */
-DECLINLINE(uint32_t) iemNativeEmitCmpGpr32WithImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint32_t uImm)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitCmpGpr32WithImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint32_t uImm)
 {
 #ifdef RT_ARCH_AMD64
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iGprLeft >= 8)
         pbCodeBuf[off++] = X86_OP_REX_B;
@@ -2422 +2430 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(true /*fSub*/, ARMV8_A64_REG_XZR, iGprLeft, (uint32_t)uImm,
                                                          false /*64Bit*/, true /*fSetFlags*/);
@@ -2429 +2436 @@
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAddSubUImm12(true /*fSub*/, ARMV8_A64_REG_XZR, iGprLeft, (uint32_t)uImm,
                                                          false /*64Bit*/, true /*fSetFlags*/, true /*fShift12*/);
@@ -2437 +2443 @@
         /* Use temporary register for the immediate. */
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
-
         off = iemNativeEmitCmpGpr32WithGpr(pReNative, off, iGprLeft, iTmpReg);
-
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
     }
@@ -2461 +2464 @@
  * Emits a JMP rel32 / B imm19 to the given label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
 {
     Assert(idxLabel < pReNative->cLabels);
@@ -2467 +2471 @@
 #ifdef RT_ARCH_AMD64
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 6);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (pReNative->paLabels[idxLabel].off != UINT32_MAX)
     {
@@ -2489 +2492 @@
     {
         pbCodeBuf[off++] = 0xe9;                    /* jmp rel32 */
-        AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_Rel32, -4), UINT32_MAX);
+        iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_Rel32, -4);
         pbCodeBuf[off++] = 0xfe;
         pbCodeBuf[off++] = 0xff;
@@ -2499 +2502 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     if (pReNative->paLabels[idxLabel].off != UINT32_MAX)
         pu32CodeBuf[off++] = Armv8A64MkInstrB(pReNative->paLabels[idxReturnLabel].off - off);
     else
     {
-        AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5), UINT32_MAX);
+        iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5);
         pu32CodeBuf[off++] = Armv8A64MkInstrB(-1);
     }
@@ -2519 +2521 @@
  * Emits a JMP rel32 / B imm19 to a new undefined label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitJmpToLabel(pReNative, off, idxLabel);
 }
@@ -2558 +2559 @@
  * Emits a Jcc rel32 / B.cc imm19 to the given label (ASSUMED requiring fixup).
  */
-DECLINLINE(uint32_t) iemNativeEmitJccToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                             uint32_t idxLabel, IEMNATIVEINSTRCOND enmCond)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitJccToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel, IEMNATIVEINSTRCOND enmCond)
 {
     Assert(idxLabel < pReNative->cLabels);
@@ -2566 +2567 @@
     /* jcc rel32 */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 6);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = 0x0f;
     pbCodeBuf[off++] = (uint8_t)enmCond | 0x80;
-    AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_Rel32, -4), UINT32_MAX);
+    iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_Rel32, -4);
     pbCodeBuf[off++] = 0x00;
     pbCodeBuf[off++] = 0x00;
@@ -2577 +2577 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5), UINT32_MAX);
+    iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5);
     pu32CodeBuf[off++] = Armv8A64MkInstrBCond(enmCond, -1);
 
@@ -2592 +2591 @@
  * Emits a Jcc rel32 / B.cc imm19 to a new label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJccToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                IEMNATIVELABELTYPE enmLabelType, uint16_t uData, IEMNATIVEINSTRCOND enmCond)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitJccToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                           IEMNATIVELABELTYPE enmLabelType, uint16_t uData, IEMNATIVEINSTRCOND enmCond)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitJccToLabel(pReNative, off, idxLabel, enmCond);
 }
@@ -2604 +2603 @@
  * Emits a JZ/JE rel32 / B.EQ imm19 to the given label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJzToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJzToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
 {
 #ifdef RT_ARCH_AMD64
@@ -2618 +2617 @@
  * Emits a JZ/JE rel32 / B.EQ imm19 to a new label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJzToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                               IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJzToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                      IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
 #ifdef RT_ARCH_AMD64
@@ -2634 +2633 @@
  * Emits a JNZ/JNE rel32 / B.NE imm19 to the given label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJnzToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJnzToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
 {
 #ifdef RT_ARCH_AMD64
@@ -2648 +2647 @@
  * Emits a JNZ/JNE rel32 / B.NE imm19 to a new label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJnzToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJnzToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                       IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
 #ifdef RT_ARCH_AMD64
@@ -2664 +2663 @@
  * Emits a JBE/JNA rel32 / B.LS imm19 to the given label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJbeToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJbeToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
 {
 #ifdef RT_ARCH_AMD64
@@ -2678 +2677 @@
  * Emits a JBE/JNA rel32 / B.LS imm19 to a new label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJbeToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJbeToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                       IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
 #ifdef RT_ARCH_AMD64
@@ -2694 +2693 @@
  * Emits a JA/JNBE rel32 / B.HI imm19 to the given label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJaToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJaToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t idxLabel)
 {
 #ifdef RT_ARCH_AMD64
@@ -2708 +2707 @@
  * Emits a JA/JNBE rel32 / B.HI imm19 to a new label.
  */
-DECLINLINE(uint32_t) iemNativeEmitJaToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                               IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJaToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                      IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
 #ifdef RT_ARCH_AMD64
@@ -2725 +2724 @@
  * How @a offJmp is applied is are target specific.
  */
-DECLINLINE(uint32_t) iemNativeEmitJccToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                             int32_t offTarget, IEMNATIVEINSTRCOND enmCond)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitJccToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget, IEMNATIVEINSTRCOND enmCond)
 {
 #ifdef RT_ARCH_AMD64
     /* jcc rel32 */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 6);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (offTarget < 128 && offTarget >= -128)
     {
@@ -2749 +2747 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrBCond(enmCond, offTarget);
 
@@ -2764 +2761 @@
  * How @a offJmp is applied is are target specific.
  */
-DECLINLINE(uint32_t) iemNativeEmitJzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
 {
 #ifdef RT_ARCH_AMD64
@@ -2780 +2777 @@
  * How @a offJmp is applied is are target specific.
  */
-DECLINLINE(uint32_t) iemNativeEmitJnzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJnzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
 {
 #ifdef RT_ARCH_AMD64
@@ -2796 +2793 @@
  * How @a offJmp is applied is are target specific.
  */
-DECLINLINE(uint32_t) iemNativeEmitJbeToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJbeToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
 {
 #ifdef RT_ARCH_AMD64
@@ -2812 +2809 @@
  * How @a offJmp is applied is are target specific.
  */
-DECLINLINE(uint32_t) iemNativeEmitJaToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitJaToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
 {
 #ifdef RT_ARCH_AMD64
@@ -2861 +2858 @@
  * Internal helper, don't call directly.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestBitInGprAndJmpToLabelIfCc(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                uint8_t iGprSrc, uint8_t iBitNo, uint32_t idxLabel,
-                                                                bool fJmpIfSet)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestBitInGprAndJmpToLabelIfCc(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc,
+                                           uint8_t iBitNo, uint32_t idxLabel, bool fJmpIfSet)
 {
     Assert(iBitNo < 64);
 #ifdef RT_ARCH_AMD64
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 5);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (iBitNo < 8)
     {
@@ -2896 +2892 @@
     /* Use the TBNZ instruction here. */
     uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm14At5), UINT32_MAX);
+    iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm14At5);
     pu32CodeBuf[off++] = Armv8A64MkInstrTbzTbnz(fJmpIfSet, 0, iGprSrc, iBitNo);
 
@@ -2914 +2909 @@
  * @note On ARM64 the range is only +/-8191 instructions.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestBitInGprAndJmpToLabelIfSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                 uint8_t iGprSrc, uint8_t iBitNo, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitTestBitInGprAndJmpToLabelIfSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                                        uint8_t iGprSrc, uint8_t iBitNo, uint32_t idxLabel)
 {
     return iemNativeEmitTestBitInGprAndJmpToLabelIfCc(pReNative, off, iGprSrc, iBitNo, idxLabel, true /*fJmpIfSet*/);
@@ -2927 +2922 @@
  * @note On ARM64 the range is only +/-8191 instructions.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestBitInGprAndJmpToLabelIfNotSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                    uint8_t iGprSrc, uint8_t iBitNo, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitTestBitInGprAndJmpToLabelIfNotSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                                           uint8_t iGprSrc, uint8_t iBitNo, uint32_t idxLabel)
 {
     return iemNativeEmitTestBitInGprAndJmpToLabelIfCc(pReNative, off, iGprSrc, iBitNo, idxLabel, false /*fJmpIfSet*/);
@@ -2938 +2933 @@
  * flags accordingly.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestAnyBitsInGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint64_t fBits)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestAnyBitsInGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint64_t fBits)
 {
     Assert(fBits != 0);
@@ -2946 +2942 @@
     {
         uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, fBits);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
 
         /* test Ev,Gv */
         uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 5);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprSrc < 8 ? 0 : X86_OP_REX_R) | (iTmpReg < 8 ? 0 : X86_OP_REX_B);
         pbCodeBuf[off++] = 0x85;
@@ -2961 +2955 @@
         /* test Eb, imm8 or test Ev, imm32 */
         uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 7);
-        AssertReturn(pbCodeBuf, UINT32_MAX);
         if (fBits <= UINT8_MAX)
         {
@@ -2984 +2977 @@
     /** @todo implement me. */
     else
-        AssertFailedReturn(UINT32_MAX);
+        AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_EMIT_CASE_NOT_IMPLEMENTED_1));
 
 #elif defined(RT_ARCH_ARM64)
@@ -2994 +2987 @@
     else
     {
-        uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, fBits);
-        AssertReturn(iTmpReg < RT_ELEMENTS(pReNative->Core.aHstRegs), UINT32_MAX);
-
         /* ands Zr, iGprSrc, iTmpReg */
+        uint8_t const iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, fBits);
         uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        AssertReturn(pu32CodeBuf, UINT32_MAX);
         pu32CodeBuf[off++] = Armv8A64MkInstrAnds(ARMV8_A64_REG_XZR, iGprSrc, iTmpReg);
-
         iemNativeRegFreeTmpImm(pReNative, iTmpReg);
     }
@@ -3017 +3006 @@
  * are set in @a iGprSrc.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfAnySet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                        uint8_t iGprSrc, uint64_t fBits, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfAnySet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                   uint8_t iGprSrc, uint64_t fBits, uint32_t idxLabel)
 {
     Assert(fBits); Assert(!RT_IS_POWER_OF_TWO(fBits));
@@ -3033 +3023 @@
  * are set in @a iGprSrc.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfNoneSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                         uint8_t iGprSrc, uint64_t fBits, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfNoneSet(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                    uint8_t iGprSrc, uint64_t fBits, uint32_t idxLabel)
 {
     Assert(fBits); Assert(!RT_IS_POWER_OF_TWO(fBits));
@@ -3050 +3041 @@
  * The operand size is given by @a f64Bit.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprIsZeroAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                               uint8_t iGprSrc, bool f64Bit, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitTestIfGprIsZeroAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                                      uint8_t iGprSrc, bool f64Bit, uint32_t idxLabel)
 {
     Assert(idxLabel < pReNative->cLabels);
@@ -3058 +3049 @@
     /* test reg32,reg32  / test reg64,reg64 */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 3);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     if (f64Bit)
         pbCodeBuf[off++] = X86_OP_REX_W | (iGprSrc < 8 ? 0 : X86_OP_REX_R | X86_OP_REX_B);
@@ -3072 +3062 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
-    AssertReturn(iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5), UINT32_MAX);
+    iemNativeAddFixup(pReNative, off, idxLabel, kIemNativeFixupType_RelImm19At5);
     pu32CodeBuf[off++] = Armv8A64MkInstrCbzCbnz(false /*fJmpIfNotZero*/, 0, f64Bit);
     IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
@@ -3089 +3078 @@
  * The operand size is given by @a f64Bit.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprIsZeroAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc,
-                                                                  bool f64Bit, IEMNATIVELABELTYPE enmLabelType,
-                                                                  uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGprIsZeroAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, bool f64Bit,
+                                             IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitTestIfGprIsZeroAndJmpToLabel(pReNative, off, iGprSrc, f64Bit, idxLabel);
 }
@@ -3103 +3091 @@
  * differs.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprNotEqualGprAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                     uint8_t iGprLeft, uint8_t iGprRight, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGprNotEqualGprAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                               uint8_t iGprLeft, uint8_t iGprRight, uint32_t idxLabel)
 {
     off = iemNativeEmitCmpGprWithGpr(pReNative, off, iGprLeft, iGprRight);
@@ -3115 +3104 @@
  * Emits code that jumps to a new label if @a iGprLeft and @a iGprRight differs.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprNotEqualGprAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                       uint8_t iGprLeft, uint8_t iGprRight,
-                                                                       IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGprNotEqualGprAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                  uint8_t iGprLeft, uint8_t iGprRight,
+                                                  IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitTestIfGprNotEqualGprAndJmpToLabel(pReNative, off, iGprLeft, iGprRight, idxLabel);
 }
@@ -3128 +3117 @@
  * Emits code that jumps to the given label if @a iGprSrc differs from @a uImm.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprNotEqualImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                    uint8_t iGprSrc, uint64_t uImm, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGprNotEqualImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                               uint8_t iGprSrc, uint64_t uImm, uint32_t idxLabel)
 {
     off = iemNativeEmitCmpGprWithImm(pReNative, off, iGprSrc, uImm);
@@ -3140 +3130 @@
  * Emits code that jumps to a new label if @a iGprSrc differs from @a uImm.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGprNotEqualImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                       uint8_t iGprSrc, uint64_t uImm,
-                                                                       IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGprNotEqualImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                  uint8_t iGprSrc, uint64_t uImm,
+                                                  IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitTestIfGprNotEqualImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel);
 }
@@ -3154 +3144 @@
  * @a uImm.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGpr32NotEqualImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                      uint8_t iGprSrc, uint32_t uImm, uint32_t idxLabel)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitTestIfGpr32NotEqualImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                                             uint8_t iGprSrc, uint32_t uImm, uint32_t idxLabel)
 {
     off = iemNativeEmitCmpGpr32WithImm(pReNative, off, iGprSrc, uImm);
@@ -3167 +3157 @@
  * @a uImm.
  */
-DECLINLINE(uint32_t) iemNativeEmitTestIfGpr32NotEqualImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
-                                                                         uint8_t iGprSrc, uint32_t uImm,
-                                                                         IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitTestIfGpr32NotEqualImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off,
+                                                    uint8_t iGprSrc, uint32_t uImm,
+                                                    IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0)
 {
     uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData);
-    AssertReturn(idxLabel != UINT32_MAX, UINT32_MAX);
     return iemNativeEmitTestIfGpr32NotEqualImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel);
 }
@@ -3181 +3171 @@
  * Emits a call to a 64-bit address.
  */
-DECLINLINE(uint32_t) iemNativeEmitCallImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t uPfn)
+DECL_INLINE_THROW(uint32_t) iemNativeEmitCallImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uintptr_t uPfn)
 {
 #ifdef RT_ARCH_AMD64
@@ -3188 +3178 @@
     /* call rax */
     uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 2);
-    AssertReturn(pbCodeBuf, UINT32_MAX);
     pbCodeBuf[off++] = 0xff;
     pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, 2, X86_GREG_xAX);
@@ -3196 +3185 @@
 
     uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    AssertReturn(pu32CodeBuf, UINT32_MAX);
     pu32CodeBuf[off++] = Armv8A64MkInstrBlr(IEMNATIVE_REG_FIXED_TMP0);
+
 #else
 # error "port me"