Changeset 101950 in vbox
- Timestamp:
- Nov 8, 2023 1:57:15 AM (13 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r101911 r101950 1838 1838 1839 1839 class McStmtVar(McStmt): 1840 """ IEM_MC_LOCAL, IEM_MC_LOCAL_ CONST """1841 def __init__(self, sName, asParams, sType, sVarName, s ConstValue = None):1840 """ IEM_MC_LOCAL, IEM_MC_LOCAL_ASSIGN, IEM_MC_LOCAL_CONST """ 1841 def __init__(self, sName, asParams, sType, sVarName, sValue = None): 1842 1842 McStmt.__init__(self, sName, asParams); 1843 1843 self.sType = sType; 1844 1844 self.sVarName = sVarName; 1845 self.s ConstValue = sConstValue; ##< None if not const.1845 self.sValue = sValue; ##< None if no assigned / const value. 1846 1846 1847 1847 class McStmtArg(McStmtVar): … … 2147 2147 2148 2148 @staticmethod 2149 def parseMcLocalAssign(oSelf, sName, asParams): 2150 """ IEM_MC_LOCAL_ASSIGN """ 2151 oSelf.checkStmtParamCount(sName, asParams, 3); 2152 oStmt = McStmtVar(sName, asParams, asParams[0], asParams[1], sValue = asParams[2]); 2153 oSelf.aoLocals.append(oStmt); 2154 return oStmt; 2155 2156 @staticmethod 2149 2157 def parseMcLocalConst(oSelf, sName, asParams): 2150 2158 """ IEM_MC_LOCAL_CONST """ 2151 2159 oSelf.checkStmtParamCount(sName, asParams, 3); 2152 oStmt = McStmtVar(sName, asParams, asParams[0], asParams[1], s ConstValue = asParams[2]);2160 oStmt = McStmtVar(sName, asParams, asParams[0], asParams[1], sValue = asParams[2]); 2153 2161 oSelf.aoLocals.append(oStmt); 2154 2162 return oStmt; … … 2920 2928 'IEM_MC_INT_CLEAR_ZMM_256_UP': (McBlock.parseMcGeneric, True, False, ), 2921 2929 'IEM_MC_LOCAL': (McBlock.parseMcLocal, False, True, ), 2930 'IEM_MC_LOCAL_ASSIGN': (McBlock.parseMcLocalAssign, False, True, ), 2922 2931 'IEM_MC_LOCAL_CONST': (McBlock.parseMcLocalConst, False, True, ), 2923 2932 'IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT': (McBlock.parseMcGeneric, True, False, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
r101850 r101950 1205 1205 /* Ignore operand size here, memory refs are always 16-bit. */ 1206 1206 IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0); 1207 IEM_MC_ARG(uint16_t, iEffSeg, 0); 1208 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1207 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1209 1208 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1210 1209 IEMOP_HLP_DECODED_NL_1(OP_SLDT, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP); 1211 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);1210 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1212 1211 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_sldt_mem, iEffSeg, GCPtrEffDst); 1213 1212 IEM_MC_END(); … … 1231 1230 /* Ignore operand size here, memory refs are always 16-bit. */ 1232 1231 IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0); 1233 IEM_MC_ARG(uint16_t, iEffSeg, 0); 1234 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1232 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1235 1233 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1236 1234 IEMOP_HLP_DECODED_NL_1(OP_STR, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP); 1237 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);1235 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1238 1236 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_str_mem, iEffSeg, GCPtrEffDst); 1239 1237 IEM_MC_END(); … … 1380 1378 IEMOP_HLP_64BIT_OP_SIZE(); 1381 1379 IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_286, 0); 1382 IEM_MC_ARG(uint8_t, iEffSeg, 0); 1383 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1380 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1384 1381 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1385 1382 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1386 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);1383 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1387 1384 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_sgdt, iEffSeg, GCPtrEffSrc); 1388 1385 IEM_MC_END(); … … 1472 1469 IEMOP_HLP_64BIT_OP_SIZE(); 1473 1470 IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_286, 0); 1474 IEM_MC_ARG(uint8_t, iEffSeg, 0); 1475 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1471 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1476 1472 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1477 1473 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1478 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);1474 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1479 1475 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_sidt, iEffSeg, GCPtrEffSrc); 1480 1476 IEM_MC_END(); … … 1506 1502 IEMOP_HLP_64BIT_OP_SIZE(); 1507 1503 IEM_MC_BEGIN(3, 1, 0, 0); 1508 IEM_MC_ARG(uint8_t, iEffSeg, 0); 1509 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1510 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 1504 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1511 1505 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1512 1506 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1513 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 1507 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1508 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 1514 1509 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT, iemCImpl_lgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg); 1515 1510 IEM_MC_END(); … … 1559 1554 IEMMODE enmEffOpSize = IEM_IS_64BIT_CODE(pVCpu) ? IEMMODE_64BIT : pVCpu->iem.s.enmEffOpSize; 1560 1555 IEM_MC_BEGIN(3, 1, 0, 0); 1561 IEM_MC_ARG(uint8_t, iEffSeg, 0); 1562 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1563 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg,/*=*/enmEffOpSize, 2); 1556 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 1564 1557 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1565 1558 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1566 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 1559 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1560 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSizeArg, /*=*/ enmEffOpSize, 2); 1567 1561 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT, iemCImpl_lidt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg); 1568 1562 IEM_MC_END(); … … 1691 1685 /* Ignore operand size here, memory refs are always 16-bit. */ 1692 1686 IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0); 1693 IEM_MC_ARG(uint16_t, iEffSeg, 0); 1694 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1687 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 1695 1688 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 1696 1689 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 1697 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);1690 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 1698 1691 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_smsw_mem, iEffSeg, GCPtrEffDst); 1699 1692 IEM_MC_END(); … … 7134 7127 { 7135 7128 IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); 7136 IEM_MC_ARG(uint8_t, iEffSeg, 0); 7137 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7138 IEM_MC_ARG(uint64_t, u64Enc, 2); 7129 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7139 7130 IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0); 7140 7131 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 7132 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 7133 IEM_MC_ARG(uint64_t, u64Enc, 2); 7141 7134 IEM_MC_FETCH_GREG_U64(u64Enc, IEM_GET_MODRM_REG(pVCpu, bRm)); 7142 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);7143 7135 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, 7144 7136 iemCImpl_vmread_mem_reg64, iEffSeg, GCPtrVal, u64Enc); … … 7148 7140 { 7149 7141 IEM_MC_BEGIN(3, 0, 0, 0); 7150 IEM_MC_ARG(uint8_t, iEffSeg, 0); 7151 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7152 IEM_MC_ARG(uint32_t, u32Enc, 2); 7142 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7153 7143 IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0); 7154 7144 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 7145 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 7146 IEM_MC_ARG(uint32_t, u32Enc, 2); 7155 7147 IEM_MC_FETCH_GREG_U32(u32Enc, IEM_GET_MODRM_REG(pVCpu, bRm)); 7156 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);7157 7148 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, 7158 7149 iemCImpl_vmread_mem_reg32, iEffSeg, GCPtrVal, u32Enc); … … 7216 7207 { 7217 7208 IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); 7218 IEM_MC_ARG(uint8_t, iEffSeg, 0); 7219 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7220 IEM_MC_ARG(uint64_t, u64Enc, 2); 7209 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7221 7210 IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0); 7222 7211 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 7212 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 7213 IEM_MC_ARG(uint64_t, u64Enc, 2); 7223 7214 IEM_MC_FETCH_GREG_U64(u64Enc, IEM_GET_MODRM_REG(pVCpu, bRm)); 7224 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);7225 7215 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, 7226 7216 iemCImpl_vmwrite_mem, iEffSeg, GCPtrVal, u64Enc); … … 7230 7220 { 7231 7221 IEM_MC_BEGIN(3, 0, 0, 0); 7232 IEM_MC_ARG(uint8_t, iEffSeg, 0); 7233 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7234 IEM_MC_ARG(uint32_t, u32Enc, 2); 7222 IEM_MC_ARG(RTGCPTR, GCPtrVal, 1); 7235 7223 IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0); 7236 7224 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 7225 IEM_MC_ARG(uint32_t, u32Enc, 2); 7226 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 7237 7227 IEM_MC_FETCH_GREG_U32(u32Enc, IEM_GET_MODRM_REG(pVCpu, bRm)); 7238 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);7239 7228 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, 7240 7229 iemCImpl_vmwrite_mem, iEffSeg, GCPtrVal, u32Enc); … … 8999 8988 case IEMMODE_16BIT: \ 9000 8989 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9001 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \9002 IEM_MC_ARG(uint16_t, u16Src, 1); \9003 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9004 8990 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9005 IEM_MC_LOCAL(int16_t, i16AddrAdj); \9006 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9007 \9008 8991 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9009 8992 IEMOP_HLP_DONE_DECODING(); \ 8993 \ 8994 IEM_MC_ARG(uint16_t, u16Src, 1); \ 9010 8995 IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9011 IEM_MC_ ASSIGN(i16AddrAdj,u16Src); \8996 IEM_MC_LOCAL_ASSIGN(int16_t, i16AddrAdj, /*=*/ u16Src); \ 9012 8997 IEM_MC_AND_ARG_U16(u16Src, 0x0f); \ 9013 8998 IEM_MC_SAR_LOCAL_S16(i16AddrAdj, 4); \ 9014 8999 IEM_MC_SHL_LOCAL_S16(i16AddrAdj, 1); \ 9015 9000 IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(GCPtrEffDst, i16AddrAdj); \ 9001 \ 9002 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9003 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 9004 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9005 \ 9006 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9016 9007 IEM_MC_FETCH_EFLAGS(EFlags); \ 9008 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 9017 9009 \ 9018 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9019 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \9020 9010 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu16Dst, bUnmapInfo); \ 9021 \9022 9011 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9023 9012 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9027 9016 case IEMMODE_32BIT: \ 9028 9017 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9029 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \9030 IEM_MC_ARG(uint32_t, u32Src, 1); \9031 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9032 9018 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9033 IEM_MC_LOCAL(int32_t, i32AddrAdj); \9034 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9035 \9036 9019 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9037 9020 IEMOP_HLP_DONE_DECODING(); \ 9021 \ 9022 IEM_MC_ARG(uint32_t, u32Src, 1); \ 9038 9023 IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9039 IEM_MC_ ASSIGN(i32AddrAdj,u32Src); \9024 IEM_MC_LOCAL_ASSIGN(int32_t, i32AddrAdj, /*=*/ u32Src); \ 9040 9025 IEM_MC_AND_ARG_U32(u32Src, 0x1f); \ 9041 9026 IEM_MC_SAR_LOCAL_S32(i32AddrAdj, 5); \ 9042 9027 IEM_MC_SHL_LOCAL_S32(i32AddrAdj, 2); \ 9043 9028 IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(GCPtrEffDst, i32AddrAdj); \ 9029 \ 9030 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9031 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 9032 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9033 \ 9034 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9044 9035 IEM_MC_FETCH_EFLAGS(EFlags); \ 9036 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 9045 9037 \ 9046 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9047 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \9048 9038 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu32Dst, bUnmapInfo); \ 9049 \9050 9039 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9051 9040 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9055 9044 case IEMMODE_64BIT: \ 9056 9045 IEM_MC_BEGIN(3, 5, IEM_MC_F_64BIT, 0); \ 9057 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \9058 IEM_MC_ARG(uint64_t, u64Src, 1); \9059 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9060 9046 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9061 IEM_MC_LOCAL(int64_t, i64AddrAdj); \9062 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9063 \9064 9047 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9065 9048 IEMOP_HLP_DONE_DECODING(); \ 9049 \ 9050 IEM_MC_ARG(uint64_t, u64Src, 1); \ 9066 9051 IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9067 IEM_MC_ ASSIGN(i64AddrAdj,u64Src); \9052 IEM_MC_LOCAL_ASSIGN(int64_t, i64AddrAdj, /*=*/ u64Src); \ 9068 9053 IEM_MC_AND_ARG_U64(u64Src, 0x3f); \ 9069 9054 IEM_MC_SAR_LOCAL_S64(i64AddrAdj, 6); \ 9070 9055 IEM_MC_SHL_LOCAL_S64(i64AddrAdj, 3); \ 9071 9056 IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(GCPtrEffDst, i64AddrAdj); \ 9057 \ 9058 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9059 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 9060 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9061 \ 9062 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9072 9063 IEM_MC_FETCH_EFLAGS(EFlags); \ 9064 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 9073 9065 \ 9074 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9075 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \9076 9066 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu64Dst, bUnmapInfo); \ 9077 \9078 9067 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9079 9068 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9093 9082 case IEMMODE_16BIT: \ 9094 9083 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9095 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \9096 IEM_MC_ARG(uint16_t, u16Src, 1); \9097 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9098 9084 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9099 IEM_MC_LOCAL(int16_t, i16AddrAdj); \9100 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9101 \9102 9085 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9103 9086 IEMOP_HLP_DONE_DECODING(); \ 9087 \ 9088 IEM_MC_ARG(uint16_t, u16Src, 1); \ 9104 9089 IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9105 IEM_MC_ ASSIGN(i16AddrAdj,u16Src); \9090 IEM_MC_LOCAL_ASSIGN(int16_t, i16AddrAdj, /*=*/ u16Src); \ 9106 9091 IEM_MC_AND_ARG_U16(u16Src, 0x0f); \ 9107 9092 IEM_MC_SAR_LOCAL_S16(i16AddrAdj, 4); \ 9108 9093 IEM_MC_SHL_LOCAL_S16(i16AddrAdj, 1); \ 9109 9094 IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(GCPtrEffDst, i16AddrAdj); \ 9095 \ 9096 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9097 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 9098 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9099 \ 9100 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9110 9101 IEM_MC_FETCH_EFLAGS(EFlags); \ 9102 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 9111 9103 \ 9112 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9113 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \9114 9104 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu16Dst, bUnmapInfo); \ 9115 \9116 9105 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9117 9106 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9121 9110 case IEMMODE_32BIT: \ 9122 9111 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9123 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \9124 IEM_MC_ARG(uint32_t, u32Src, 1); \9125 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9126 9112 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9127 IEM_MC_LOCAL(int32_t, i32AddrAdj); \9128 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9129 \9130 9113 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9131 9114 IEMOP_HLP_DONE_DECODING(); \ 9115 \ 9116 IEM_MC_ARG(uint32_t, u32Src, 1); \ 9132 9117 IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9133 IEM_MC_ ASSIGN(i32AddrAdj,u32Src); \9118 IEM_MC_LOCAL_ASSIGN(int32_t, i32AddrAdj, /*=*/ u32Src); \ 9134 9119 IEM_MC_AND_ARG_U32(u32Src, 0x1f); \ 9135 9120 IEM_MC_SAR_LOCAL_S32(i32AddrAdj, 5); \ 9136 9121 IEM_MC_SHL_LOCAL_S32(i32AddrAdj, 2); \ 9137 9122 IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(GCPtrEffDst, i32AddrAdj); \ 9123 \ 9124 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9125 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 9126 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9127 \ 9128 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9138 9129 IEM_MC_FETCH_EFLAGS(EFlags); \ 9130 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 9139 9131 \ 9140 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9141 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \9142 9132 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu32Dst, bUnmapInfo); \ 9143 \9144 9133 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9145 9134 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9149 9138 case IEMMODE_64BIT: \ 9150 9139 IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0); \ 9151 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \9152 IEM_MC_ARG(uint64_t, u64Src, 1); \9153 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9154 9140 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9155 IEM_MC_LOCAL(int64_t, i64AddrAdj); \9156 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9157 \9158 9141 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9159 9142 IEMOP_HLP_DONE_DECODING(); \ 9143 \ 9144 IEM_MC_ARG(uint64_t, u64Src, 1); \ 9160 9145 IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9161 IEM_MC_ ASSIGN(i64AddrAdj,u64Src); \9146 IEM_MC_LOCAL_ASSIGN(int64_t, i64AddrAdj, /*=*/ u64Src); \ 9162 9147 IEM_MC_AND_ARG_U64(u64Src, 0x3f); \ 9163 9148 IEM_MC_SAR_LOCAL_S64(i64AddrAdj, 6); \ 9164 9149 IEM_MC_SHL_LOCAL_S64(i64AddrAdj, 3); \ 9165 9150 IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(GCPtrEffDst, i64AddrAdj); \ 9151 \ 9152 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9153 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 9154 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9155 \ 9156 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9166 9157 IEM_MC_FETCH_EFLAGS(EFlags); \ 9158 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 9167 9159 \ 9168 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9169 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \9170 9160 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu64Dst, bUnmapInfo); \ 9171 \9172 9161 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9173 9162 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9255 9244 case IEMMODE_16BIT: \ 9256 9245 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9257 IEM_MC_ARG(uint16_t const *, pu16Dst, 0); \9258 IEM_MC_ARG(uint16_t, u16Src, 1); \9259 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9260 9246 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9261 IEM_MC_LOCAL(int16_t, i16AddrAdj); \9262 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9263 \9264 9247 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9265 9248 IEMOP_HLP_DONE_DECODING(); \ 9249 \ 9250 IEM_MC_ARG(uint16_t, u16Src, 1); \ 9266 9251 IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9267 IEM_MC_ ASSIGN(i16AddrAdj,u16Src); \9252 IEM_MC_LOCAL_ASSIGN(int16_t, i16AddrAdj, /*=*/ u16Src); \ 9268 9253 IEM_MC_AND_ARG_U16(u16Src, 0x0f); \ 9269 9254 IEM_MC_SAR_LOCAL_S16(i16AddrAdj, 4); \ 9270 9255 IEM_MC_SHL_LOCAL_S16(i16AddrAdj, 1); \ 9271 9256 IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(GCPtrEffDst, i16AddrAdj); \ 9257 \ 9258 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9259 IEM_MC_ARG(uint16_t const *, pu16Dst, 0); \ 9260 IEM_MC_MEM_MAP_U16_RO(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9261 \ 9262 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9272 9263 IEM_MC_FETCH_EFLAGS(EFlags); \ 9264 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 9273 9265 \ 9274 IEM_MC_MEM_MAP_U16_RO(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9275 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \9276 9266 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu16Dst, bUnmapInfo); \ 9277 \9278 9267 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9279 9268 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9283 9272 case IEMMODE_32BIT: \ 9284 9273 IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \ 9285 IEM_MC_ARG(uint32_t const *, pu32Dst, 0); \9286 IEM_MC_ARG(uint32_t, u32Src, 1); \9287 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9288 9274 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9289 IEM_MC_LOCAL(int32_t, i32AddrAdj); \9290 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9291 \9292 9275 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9293 9276 IEMOP_HLP_DONE_DECODING(); \ 9277 \ 9278 IEM_MC_ARG(uint32_t, u32Src, 1); \ 9294 9279 IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9295 IEM_MC_ ASSIGN(i32AddrAdj,u32Src); \9280 IEM_MC_LOCAL_ASSIGN(int32_t, i32AddrAdj, /*=*/ u32Src); \ 9296 9281 IEM_MC_AND_ARG_U32(u32Src, 0x1f); \ 9297 9282 IEM_MC_SAR_LOCAL_S32(i32AddrAdj, 5); \ 9298 9283 IEM_MC_SHL_LOCAL_S32(i32AddrAdj, 2); \ 9299 9284 IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(GCPtrEffDst, i32AddrAdj); \ 9285 \ 9286 IEM_MC_ARG(uint32_t const *, pu32Dst, 0); \ 9287 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9288 IEM_MC_MEM_MAP_U32_RO(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9289 \ 9290 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9300 9291 IEM_MC_FETCH_EFLAGS(EFlags); \ 9292 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 9301 9293 \ 9302 IEM_MC_MEM_MAP_U32_RO(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9303 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \9304 9294 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu32Dst, bUnmapInfo); \ 9305 \9306 9295 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9307 9296 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9311 9300 case IEMMODE_64BIT: \ 9312 9301 IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0); \ 9313 IEM_MC_ARG(uint64_t const *, pu64Dst, 0); \ 9302 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 9303 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \ 9304 IEMOP_HLP_DONE_DECODING(); \ 9305 \ 9314 9306 IEM_MC_ARG(uint64_t, u64Src, 1); \ 9315 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \9316 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \9317 IEM_MC_LOCAL(int64_t, i64AddrAdj); \9318 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \9319 \9320 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \9321 IEMOP_HLP_DONE_DECODING(); \9322 9307 IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 9323 IEM_MC_ ASSIGN(i64AddrAdj,u64Src); \9308 IEM_MC_LOCAL_ASSIGN(int64_t, i64AddrAdj, /*=*/ u64Src); \ 9324 9309 IEM_MC_AND_ARG_U64(u64Src, 0x3f); \ 9325 9310 IEM_MC_SAR_LOCAL_S64(i64AddrAdj, 6); \ 9326 9311 IEM_MC_SHL_LOCAL_S64(i64AddrAdj, 3); \ 9327 9312 IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(GCPtrEffDst, i64AddrAdj); \ 9313 \ 9314 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 9315 IEM_MC_ARG(uint64_t const *, pu64Dst, 0); \ 9316 IEM_MC_MEM_MAP_U64_RO(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 9317 \ 9318 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 9328 9319 IEM_MC_FETCH_EFLAGS(EFlags); \ 9320 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 9329 9321 \ 9330 IEM_MC_MEM_MAP_U64_RO(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \9331 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \9332 9322 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(pu64Dst, bUnmapInfo); \ 9333 \9334 9323 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9335 9324 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9433 9422 case IEMMODE_16BIT: 9434 9423 IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); 9424 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 9425 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); 9426 9427 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 9428 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9429 9430 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 9435 9431 IEM_MC_ARG(uint16_t *, pu16Dst, 0); 9432 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 9433 9436 9434 IEM_MC_ARG(uint16_t, u16Src, 1); 9437 IEM_MC_ARG(uint8_t, cShiftArg, 2); 9435 IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_REG(pVCpu, bRm)); 9436 IEM_MC_ARG_CONST(uint8_t, cShiftArg,/*=*/ cShift, 2); 9438 9437 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 3); 9439 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);9440 IEM_MC_LOCAL(uint8_t, bUnmapInfo);9441 9442 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);9443 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);9444 IEM_MC_ASSIGN(cShiftArg, cShift);9445 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();9446 IEM_MC_FETCH_GREG_U16(u16Src, IEM_GET_MODRM_REG(pVCpu, bRm));9447 9438 IEM_MC_FETCH_EFLAGS(EFlags); 9448 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst);9449 9439 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags); 9450 9440 … … 9457 9447 case IEMMODE_32BIT: 9458 9448 IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); 9449 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 9450 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); 9451 9452 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 9453 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9454 9455 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 9459 9456 IEM_MC_ARG(uint32_t *, pu32Dst, 0); 9457 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 9458 9460 9459 IEM_MC_ARG(uint32_t, u32Src, 1); 9461 IEM_MC_ARG(uint8_t, cShiftArg, 2); 9460 IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_REG(pVCpu, bRm)); 9461 IEM_MC_ARG_CONST(uint8_t, cShiftArg,/*=*/ cShift, 2); 9462 9462 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 3); 9463 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);9464 IEM_MC_LOCAL(uint8_t, bUnmapInfo);9465 9466 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);9467 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);9468 IEM_MC_ASSIGN(cShiftArg, cShift);9469 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();9470 IEM_MC_FETCH_GREG_U32(u32Src, IEM_GET_MODRM_REG(pVCpu, bRm));9471 9463 IEM_MC_FETCH_EFLAGS(EFlags); 9472 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst);9473 9464 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags); 9474 9465 … … 9481 9472 case IEMMODE_64BIT: 9482 9473 IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0); 9474 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); 9475 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); 9476 9477 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); 9478 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9479 9480 IEM_MC_LOCAL(uint8_t, bUnmapInfo); 9483 9481 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 9482 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 9483 9484 9484 IEM_MC_ARG(uint64_t, u64Src, 1); 9485 IEM_MC_ARG(uint8_t, cShiftArg, 2); 9485 IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_REG(pVCpu, bRm)); 9486 IEM_MC_ARG_CONST(uint8_t, cShiftArg,/*=*/ cShift, 2); 9486 9487 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 3); 9487 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);9488 IEM_MC_LOCAL(uint8_t, bUnmapInfo);9489 9490 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);9491 uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);9492 IEM_MC_ASSIGN(cShiftArg, cShift);9493 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();9494 IEM_MC_FETCH_GREG_U64(u64Src, IEM_GET_MODRM_REG(pVCpu, bRm));9495 9488 IEM_MC_FETCH_EFLAGS(EFlags); 9496 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); 9489 9497 9490 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags); 9498 9491 … … 9746 9739 9747 9740 IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_PENTIUM_II, 0); 9748 IEM_MC_ARG(uint8_t, iEffSeg, 0); 9749 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9750 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 9741 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9751 9742 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9752 9743 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9753 9744 IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ(); 9754 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 9745 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9746 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/pVCpu->iem.s.enmEffOpSize, 2); 9755 9747 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, iemCImpl_fxsave, iEffSeg, GCPtrEff, enmEffOpSize); 9756 9748 IEM_MC_END(); … … 9766 9758 9767 9759 IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_PENTIUM_II, 0); 9768 IEM_MC_ARG(uint8_t, iEffSeg, 0); 9769 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9770 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 9760 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9771 9761 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9772 9762 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9773 9763 IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE(); 9774 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 9764 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9765 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/pVCpu->iem.s.enmEffOpSize, 2); 9775 9766 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, iemCImpl_fxrstor, iEffSeg, GCPtrEff, enmEffOpSize); 9776 9767 IEM_MC_END(); … … 9804 9795 9805 9796 IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_PENTIUM_II, 0); 9806 IEM_MC_ARG(uint8_t, iEffSeg, 0);9807 9797 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9808 9798 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9809 9799 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9810 9800 IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ(); 9811 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);9801 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9812 9802 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_FPU, iemCImpl_ldmxcsr, iEffSeg, GCPtrEff); 9813 9803 IEM_MC_END(); … … 9840 9830 9841 9831 IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_PENTIUM_II, 0); 9842 IEM_MC_ARG(uint8_t, iEffSeg, 0);9843 9832 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9844 9833 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9845 9834 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9846 9835 IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ(); 9847 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);9836 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9848 9837 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_FPU, iemCImpl_stmxcsr, iEffSeg, GCPtrEff); 9849 9838 IEM_MC_END(); … … 9866 9855 9867 9856 IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_CORE, 0); 9868 IEM_MC_ARG(uint8_t, iEffSeg, 0); 9869 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9870 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 9857 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9871 9858 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9872 9859 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9873 9860 IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ(); 9874 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 9861 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9862 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize, 2); 9875 9863 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, iemCImpl_xsave, iEffSeg, GCPtrEff, enmEffOpSize); 9876 9864 IEM_MC_END(); … … 9893 9881 9894 9882 IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_CORE, 0); 9895 IEM_MC_ARG(uint8_t, iEffSeg, 0); 9896 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9897 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize,/*=*/pVCpu->iem.s.enmEffOpSize, 2); 9883 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9898 9884 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9899 9885 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9900 9886 IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ(); 9901 IEM_MC_ASSIGN(iEffSeg, pVCpu->iem.s.iEffSeg); 9887 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9888 IEM_MC_ARG_CONST(IEMMODE, enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize, 2); 9902 9889 IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, iemCImpl_xrstor, iEffSeg, GCPtrEff, enmEffOpSize); 9903 9890 IEM_MC_END(); … … 9922 9909 9923 9910 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 9924 IEM_MC_ARG(uint8_t, iEffSeg, 0);9925 9911 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9926 9912 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9927 9913 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9928 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);9914 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9929 9915 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_clflush_clflushopt, iEffSeg, GCPtrEff); 9930 9916 IEM_MC_END(); … … 9946 9932 9947 9933 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 9948 IEM_MC_ARG(uint8_t, iEffSeg, 0);9949 9934 IEM_MC_ARG(RTGCPTR, GCPtrEff, 1); 9950 9935 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0); 9951 9936 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9952 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);9937 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 9953 9938 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT, iemCImpl_clflush_clflushopt, iEffSeg, GCPtrEff); 9954 9939 IEM_MC_END(); … … 10790 10775 case IEMMODE_16BIT: \ 10791 10776 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 10792 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \10793 IEM_MC_ARG(uint16_t, u16Src, 1); \10794 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \10795 10777 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10778 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10779 \ 10780 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10781 IEMOP_HLP_DONE_DECODING(); \ 10782 \ 10796 10783 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10784 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 10785 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10797 10786 \ 10798 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10799 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10800 IEM_MC_ASSIGN(u16Src, bImm & 0x0f); \ 10801 IEMOP_HLP_DONE_DECODING(); \ 10787 IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ bImm & 0x0f, 1); \ 10788 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10802 10789 IEM_MC_FETCH_EFLAGS(EFlags); \ 10803 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10804 10790 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 10805 10791 \ … … 10812 10798 case IEMMODE_32BIT: \ 10813 10799 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 10800 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10801 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10802 \ 10803 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10804 IEMOP_HLP_DONE_DECODING(); \ 10805 \ 10806 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10814 10807 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 10815 IEM_MC_ARG(uint32_t, u32Src, 1); \ 10816 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10817 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10818 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10808 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10819 10809 \ 10820 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10821 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10822 IEM_MC_ASSIGN(u32Src, bImm & 0x1f); \ 10823 IEMOP_HLP_DONE_DECODING(); \ 10810 IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ bImm & 0x1f, 1); \ 10811 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10824 10812 IEM_MC_FETCH_EFLAGS(EFlags); \ 10825 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10826 10813 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 10827 10814 \ … … 10834 10821 case IEMMODE_64BIT: \ 10835 10822 IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \ 10836 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \10837 IEM_MC_ARG(uint64_t, u64Src, 1); \10838 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \10839 10823 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10824 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10825 \ 10826 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10827 IEMOP_HLP_DONE_DECODING(); \ 10828 \ 10840 10829 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10830 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 10831 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10841 10832 \ 10842 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10843 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10844 IEM_MC_ASSIGN(u64Src, bImm & 0x3f); \ 10845 IEMOP_HLP_DONE_DECODING(); \ 10833 IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ bImm & 0x3f, 1); \ 10834 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10846 10835 IEM_MC_FETCH_EFLAGS(EFlags); \ 10847 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10848 10836 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 10849 10837 \ … … 10866 10854 case IEMMODE_16BIT: \ 10867 10855 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 10868 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \10869 IEM_MC_ARG(uint16_t, u16Src, 1); \10870 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \10871 10856 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10857 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10858 \ 10859 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10860 IEMOP_HLP_DONE_DECODING(); \ 10861 \ 10862 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \ 10872 10863 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10864 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10873 10865 \ 10874 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10875 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10876 IEM_MC_ASSIGN(u16Src, bImm & 0x0f); \ 10877 IEMOP_HLP_DONE_DECODING(); \ 10866 IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ bImm & 0x0f, 1); \ 10867 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10878 10868 IEM_MC_FETCH_EFLAGS(EFlags); \ 10879 IEM_MC_MEM_MAP_U16_RW(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10880 10869 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 10870 \ 10881 10871 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu16Dst, bUnmapInfo); \ 10882 \10883 10872 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10884 10873 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10888 10877 case IEMMODE_32BIT: \ 10889 10878 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 10890 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \10891 IEM_MC_ARG(uint32_t, u32Src, 1); \10892 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \10893 10879 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10880 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10881 \ 10882 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10883 IEMOP_HLP_DONE_DECODING(); \ 10884 \ 10894 10885 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10886 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \ 10887 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10895 10888 \ 10896 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10897 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10898 IEM_MC_ASSIGN(u32Src, bImm & 0x1f); \ 10899 IEMOP_HLP_DONE_DECODING(); \ 10889 IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ bImm & 0x1f, 1); \ 10890 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10900 10891 IEM_MC_FETCH_EFLAGS(EFlags); \ 10901 IEM_MC_MEM_MAP_U32_RW(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10902 10892 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 10893 \ 10903 10894 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu32Dst, bUnmapInfo); \ 10904 \10905 10895 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10906 10896 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10910 10900 case IEMMODE_64BIT: \ 10911 10901 IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \ 10912 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \10913 IEM_MC_ARG(uint64_t, u64Src, 1); \10914 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \10915 10902 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10903 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10904 \ 10905 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10906 IEMOP_HLP_DONE_DECODING(); \ 10907 \ 10916 10908 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 10909 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \ 10910 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 10917 10911 \ 10918 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 10919 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 10920 IEM_MC_ASSIGN(u64Src, bImm & 0x3f); \ 10921 IEMOP_HLP_DONE_DECODING(); \ 10912 IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ bImm & 0x3f, 1); \ 10913 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 10922 10914 IEM_MC_FETCH_EFLAGS(EFlags); \ 10923 IEM_MC_MEM_MAP_U64_RW(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \10924 10915 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 10916 \ 10925 10917 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu64Dst, bUnmapInfo); \ 10926 \10927 10918 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10928 10919 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11005 10996 case IEMMODE_16BIT: \ 11006 10997 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 11007 IEM_MC_ARG(uint16_t const *, pu16Dst, 0); \11008 IEM_MC_ARG(uint16_t, u16Src, 1); \11009 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \11010 10998 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 10999 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11000 \ 11001 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11002 IEMOP_HLP_DONE_DECODING(); \ 11003 \ 11011 11004 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 11005 IEM_MC_ARG(uint16_t const *, pu16Dst, 0); \ 11006 IEM_MC_MEM_MAP_U16_RO(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11012 11007 \ 11013 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11014 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11015 IEM_MC_ASSIGN(u16Src, bImm & 0x0f); \ 11016 IEMOP_HLP_DONE_DECODING(); \ 11008 IEM_MC_ARG_CONST(uint16_t, u16Src, /*=*/ bImm & 0x0f, 1); \ 11009 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 11017 11010 IEM_MC_FETCH_EFLAGS(EFlags); \ 11018 IEM_MC_MEM_MAP_U16_RO(pu16Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11019 11011 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 11020 11012 \ … … 11027 11019 case IEMMODE_32BIT: \ 11028 11020 IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \ 11029 IEM_MC_ARG(uint32_t const *, pu32Dst, 0); \11030 IEM_MC_ARG(uint32_t, u32Src, 1); \11031 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \11032 11021 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 11022 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11023 \ 11024 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11025 IEMOP_HLP_DONE_DECODING(); \ 11026 \ 11033 11027 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 11028 IEM_MC_ARG(uint32_t const *, pu32Dst, 0); \ 11029 IEM_MC_MEM_MAP_U32_RO(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11034 11030 \ 11035 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11036 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11037 IEM_MC_ASSIGN(u32Src, bImm & 0x1f); \ 11038 IEMOP_HLP_DONE_DECODING(); \ 11031 IEM_MC_ARG_CONST(uint32_t, u32Src, /*=*/ bImm & 0x1f, 1); \ 11032 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 11039 11033 IEM_MC_FETCH_EFLAGS(EFlags); \ 11040 IEM_MC_MEM_MAP_U32_RO(pu32Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11041 11034 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 11042 11035 \ … … 11049 11042 case IEMMODE_64BIT: \ 11050 11043 IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \ 11051 IEM_MC_ARG(uint64_t const *, pu64Dst, 0); \11052 IEM_MC_ARG(uint64_t, u64Src, 1); \11053 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \11054 11044 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \ 11045 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11046 \ 11047 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11048 IEMOP_HLP_DONE_DECODING(); \ 11049 \ 11055 11050 IEM_MC_LOCAL(uint8_t, bUnmapInfo); \ 11051 IEM_MC_ARG(uint64_t const *, pu64Dst, 0); \ 11052 IEM_MC_MEM_MAP_U64_RO(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \ 11056 11053 \ 11057 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \ 11058 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \ 11059 IEM_MC_ASSIGN(u64Src, bImm & 0x3f); \ 11060 IEMOP_HLP_DONE_DECODING(); \ 11054 IEM_MC_ARG_CONST(uint64_t, u64Src, /*=*/ bImm & 0x3f, 1); \ 11055 IEM_MC_ARG_LOCAL_EFLAGS( pEFlags, EFlags, 2); \ 11061 11056 IEM_MC_FETCH_EFLAGS(EFlags); \ 11062 IEM_MC_MEM_MAP_U64_RO(pu64Dst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \11063 11057 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 11064 11058 \ … … 12580 12574 IEMOP_HLP_VMX_INSTR("vmptrld", kVmxVDiag_Vmptrld); 12581 12575 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 12582 IEM_MC_ARG(uint8_t, iEffSeg, 0); 12583 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 12576 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 12584 12577 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 12585 12578 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 12586 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);12579 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 12587 12580 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, iemCImpl_vmptrld, iEffSeg, GCPtrEffSrc); 12588 12581 IEM_MC_END(); … … 12600 12593 IEMOP_HLP_VMX_INSTR("vmclear", kVmxVDiag_Vmclear); 12601 12594 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 12602 IEM_MC_ARG(uint8_t, iEffSeg, 0); 12603 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 12595 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 12604 12596 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 12605 12597 IEMOP_HLP_DONE_DECODING(); 12606 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);12598 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 12607 12599 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, iemCImpl_vmclear, iEffSeg, GCPtrEffDst); 12608 12600 IEM_MC_END(); … … 12619 12611 IEMOP_HLP_VMX_INSTR("vmxon", kVmxVDiag_Vmxon); 12620 12612 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 12621 IEM_MC_ARG(uint8_t, iEffSeg, 0); 12622 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 12613 IEM_MC_ARG(RTGCPTR, GCPtrEffSrc, 1); 12623 12614 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 12624 12615 IEMOP_HLP_DONE_DECODING(); 12625 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);12616 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 12626 12617 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, iemCImpl_vmxon, iEffSeg, GCPtrEffSrc); 12627 12618 IEM_MC_END(); … … 12639 12630 IEMOP_HLP_VMX_INSTR("vmptrst", kVmxVDiag_Vmptrst); 12640 12631 IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); 12641 IEM_MC_ARG(uint8_t, iEffSeg, 0); 12642 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 12632 IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 1); 12643 12633 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); 12644 12634 IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES(); 12645 IEM_MC_A SSIGN(iEffSeg, pVCpu->iem.s.iEffSeg);12635 IEM_MC_ARG_CONST(uint8_t, iEffSeg, /*=*/ pVCpu->iem.s.iEffSeg, 0); 12646 12636 IEM_MC_CALL_CIMPL_2(IEM_CIMPL_F_VMEXIT | IEM_CIMPL_F_STATUS_FLAGS, iemCImpl_vmptrst, iEffSeg, GCPtrEffDst); 12647 12637 IEM_MC_END(); -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
r101949 r101950 962 962 963 963 if isinstance(oStmt, iai.McStmtVar): 964 if oStmt.s ConstValue is None:964 if oStmt.sValue is None: 965 965 continue; 966 966 aiSkipParams = { 0: True, 1: True, 3: True }; -
trunk/src/VBox/VMM/include/IEMMc.h
r101911 r101950 194 194 195 195 #define IEM_MC_LOCAL(a_Type, a_Name) a_Type a_Name 196 #define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) a_Type a_Name = (a_Value) 196 197 #define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) a_Type const a_Name = (a_Value) 197 198 #define IEM_MC_REF_LOCAL(a_pRefArg, a_Local) (a_pRefArg) = &(a_Local) -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r101911 r101950 595 595 #define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) (void)fMcBegin; \ 596 596 a_Type const a_Name = (a_Value); \ 597 NOREF(a_Name) 598 #define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) (void)fMcBegin; \ 599 a_Type a_Name = (a_Value); \ 597 600 NOREF(a_Name) 598 601 #define IEM_MC_REF_LOCAL(a_pRefArg, a_Local) (void)fMcBegin; \
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