Changeset 102029 in vbox for trunk/src/VBox/VMM/testcase
- Timestamp:
- Nov 9, 2023 12:34:40 PM (15 months ago)
- File:
-
- 1 edited
-
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp (modified) (4 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r102012 r102029 705 705 #define IEM_MC_REF_MXCSR(a_pfMxcsr) do { (a_pfMxcsr) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pfMxcsr); CHK_VAR(a_pfMxcsr); (void)fMcBegin; (void)fSseRead; } while (0) 706 706 707 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Value); (void)fMcBegin; } while (0)708 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Value); (void)fMcBegin; } while (0)709 #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Value); (void)fMcBegin; } while (0)710 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const);(void)fMcBegin; } while (0)711 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const);(void)fMcBegin; } while (0)712 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const);(void)fMcBegin; } while (0)707 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Const); (void)fMcBegin; } while (0) 708 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Const); (void)fMcBegin; } while (0) 709 #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Const); (void)fMcBegin; } while (0) 710 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const); (void)fMcBegin; } while (0) 711 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const); (void)fMcBegin; } while (0) 712 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const); (void)fMcBegin; } while (0) 713 713 #define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) do { CHK_CONST(uint16_t, a_u16Const); (void)fMcBegin; } while (0) 714 714 715 #define IEM_MC_AND_GREG_U8(a_iGReg, a_u8 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Value); (void)fMcBegin; } while (0)716 #define IEM_MC_AND_GREG_U16(a_iGReg, a_u16 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Value); (void)fMcBegin; } while (0)717 #define IEM_MC_AND_GREG_U32(a_iGReg, a_u32 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Value); (void)fMcBegin; } while (0)718 #define IEM_MC_AND_GREG_U64(a_iGReg, a_u64 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Value); (void)fMcBegin; } while (0)719 #define IEM_MC_OR_GREG_U8(a_iGReg, a_u8 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Value); (void)fMcBegin; } while (0)720 #define IEM_MC_OR_GREG_U16(a_iGReg, a_u16 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Value); (void)fMcBegin; } while (0)721 #define IEM_MC_OR_GREG_U32(a_iGReg, a_u32 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Value); (void)fMcBegin; } while (0)722 #define IEM_MC_OR_GREG_U64(a_iGReg, a_u64 Value) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Value); (void)fMcBegin; } while (0)723 724 #define IEM_MC_ADD_GREG_U8_TO_LOCAL( a_u16Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg);(a_u8Value) += 1; CHK_TYPE(uint8_t, a_u8Value); (void)fMcBegin; } while (0)725 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); (a_u16Value) += 1; CHK_TYPE(uint16_t, a_u16Value); (void)fMcBegin; } while (0)726 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); (a_u32Value) += 1; CHK_TYPE(uint32_t, a_u32Value); (void)fMcBegin; } while (0)727 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); (a_u64Value) += 1; CHK_TYPE(uint64_t, a_u64Value); (void)fMcBegin; } while (0)728 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); CHK_ GCPTR(a_EffAddr); (void)fMcBegin; } while (0)729 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); CHK_ GCPTR(a_EffAddr); (void)fMcBegin; } while (0)730 #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) do { (a_EffAddr) += (a_i64); CHK_ GCPTR(a_EffAddr); (void)fMcBegin; } while (0)731 #define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) &= (a_u8Mask); CHK_ TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); (void)fMcBegin; } while (0)732 #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) &= (a_u16Mask); CHK_ TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0)733 #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_ TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0)734 #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) do { (a_u64Local) &= (a_u64Mask); CHK_ TYPE(uint64_t, a_u64Local); CHK_CONST(uint64_t, a_u64Mask); (void)fMcBegin; } while (0)735 #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) do { (a_u16Arg) &= (a_u16Mask); CHK_ TYPE(uint16_t, a_u16Arg); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0)736 #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) do { (a_u32Arg) &= (a_u32Mask); CHK_ TYPE(uint32_t, a_u32Arg); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0)737 #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) do { (a_u64Arg) &= (a_u64Mask); CHK_ TYPE(uint64_t, a_u64Arg); CHK_CONST(uint64_t, a_u64Mask); (void)fMcBegin; } while (0)738 #define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) |= (a_u8Mask); CHK_ TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); (void)fMcBegin; } while (0)739 #define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) |= (a_u16Mask); CHK_ TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0)740 #define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_ TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0)741 #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) >>= (a_cShift); CHK_ TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)742 #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) >>= (a_cShift); CHK_ TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)743 #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) >>= (a_cShift); CHK_ TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)744 #define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) do { (a_u8Local) >>= (a_cShift); CHK_ TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)745 #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) <<= (a_cShift); CHK_ TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)746 #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) <<= (a_cShift); CHK_ TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)747 #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) <<= (a_cShift); CHK_ TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0)748 #define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_ TYPE(uint32_t, a_u32Local); (void)fMcBegin; } while (0)749 #define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_ TYPE(uint32_t, a_u32Local); (void)fMcBegin; } while (0)715 #define IEM_MC_AND_GREG_U8(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const); (void)fMcBegin; } while (0) 716 #define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Const); (void)fMcBegin; } while (0) 717 #define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Const); (void)fMcBegin; } while (0) 718 #define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Const); (void)fMcBegin; } while (0) 719 #define IEM_MC_OR_GREG_U8(a_iGReg, a_u8Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint8_t, a_u8Const); (void)fMcBegin; } while (0) 720 #define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint16_t, a_u16Const); (void)fMcBegin; } while (0) 721 #define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint32_t, a_u32Const); (void)fMcBegin; } while (0) 722 #define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Const) do { CHK_GREG_IDX(a_iGReg); CHK_CONST(uint64_t, a_u64Const); (void)fMcBegin; } while (0) 723 724 #define IEM_MC_ADD_GREG_U8_TO_LOCAL( a_u8Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); CHK_VAR(a_u8Value); (a_u8Value) += 1; CHK_TYPE(uint8_t, a_u8Value); (void)fMcBegin; } while (0) 725 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); CHK_VAR(a_u16Value); (a_u16Value) += 1; CHK_TYPE(uint16_t, a_u16Value); (void)fMcBegin; } while (0) 726 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); CHK_VAR(a_u32Value); (a_u32Value) += 1; CHK_TYPE(uint32_t, a_u32Value); (void)fMcBegin; } while (0) 727 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { CHK_GREG_IDX(a_iGReg); CHK_VAR(a_u64Value); (a_u64Value) += 1; CHK_TYPE(uint64_t, a_u64Value); (void)fMcBegin; } while (0) 728 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); CHK_VAR(a_i16); CHK_GCPTR(a_EffAddr); (void)fMcBegin; } while (0) 729 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); CHK_VAR(a_i32); CHK_GCPTR(a_EffAddr); (void)fMcBegin; } while (0) 730 #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) do { (a_EffAddr) += (a_i64); CHK_VAR(a_i64); CHK_GCPTR(a_EffAddr); (void)fMcBegin; } while (0) 731 #define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) &= (a_u8Mask); CHK_VAR(a_u8Local); CHK_TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); (void)fMcBegin; } while (0) 732 #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) &= (a_u16Mask); CHK_VAR(a_u16Local); CHK_TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0) 733 #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_VAR(a_u32Local); CHK_TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0) 734 #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) do { (a_u64Local) &= (a_u64Mask); CHK_VAR(a_u64Local); CHK_TYPE(uint64_t, a_u64Local); CHK_CONST(uint64_t, a_u64Mask); (void)fMcBegin; } while (0) 735 #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) do { (a_u16Arg) &= (a_u16Mask); CHK_VAR(a_u16Arg); CHK_TYPE(uint16_t, a_u16Arg); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0) 736 #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) do { (a_u32Arg) &= (a_u32Mask); CHK_VAR(a_u32Arg); CHK_TYPE(uint32_t, a_u32Arg); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0) 737 #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) do { (a_u64Arg) &= (a_u64Mask); CHK_VAR(a_u64Arg); CHK_TYPE(uint64_t, a_u64Arg); CHK_CONST(uint64_t, a_u64Mask); (void)fMcBegin; } while (0) 738 #define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) |= (a_u8Mask); CHK_VAR(a_u8Local); CHK_TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); (void)fMcBegin; } while (0) 739 #define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) |= (a_u16Mask); CHK_VAR(a_u16Local); CHK_TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); (void)fMcBegin; } while (0) 740 #define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_VAR(a_u32Local); CHK_TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); (void)fMcBegin; } while (0) 741 #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) >>= (a_cShift); CHK_VAR(a_i16Local); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 742 #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) >>= (a_cShift); CHK_VAR(a_i32Local); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 743 #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) >>= (a_cShift); CHK_VAR(a_i64Local); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 744 #define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) do { (a_u8Local) >>= (a_cShift); CHK_VAR(a_u8Local) ; CHK_TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 745 #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) <<= (a_cShift); CHK_VAR(a_i16Local); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 746 #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) <<= (a_cShift); CHK_VAR(a_i32Local); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 747 #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) <<= (a_cShift); CHK_VAR(a_i64Local); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); (void)fMcBegin; } while (0) 748 #define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_VAR(a_u32Local); CHK_TYPE(uint32_t, a_u32Local); (void)fMcBegin; } while (0) 749 #define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_VAR(a_u32Local); CHK_TYPE(uint32_t, a_u32Local); (void)fMcBegin; } while (0) 750 750 #define IEM_MC_SET_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); (void)fMcBegin; } while (0) 751 751 #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); (void)fMcBegin; } while (0) … … 755 755 #define IEM_MC_FPU_FROM_MMX_MODE() do { (void)fMcBegin; } while (0) 756 756 757 #define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) do { CHK_TYPE(uint16_t, 758 #define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) do { CHK_TYPE(uint32_t, a_u32Local);(void)fMcBegin; } while (0)759 #define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) do { CHK_TYPE(uint64_t, 760 761 #define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_u64Value) = 0; CHK_ TYPE(uint64_t, a_u64Value); (void)fFpuRead; (void)fMcBegin; } while (0)762 #define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_u32Value) = 0; CHK_ TYPE(uint32_t, a_u32Value); (void)fFpuRead; (void)fMcBegin; } while (0)763 #define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) do { CHK_MREG_IDX(a_iMReg); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuWrite; (void)fMcBegin; } while (0)764 #define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) do { CHK_MREG_IDX(a_iMReg); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuWrite; (void)fMcBegin; } while (0)765 #define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu64Dst) = (uint64_t *)((uintptr_t)0); CHK_PTYPE(uint64_t *, a_pu64Dst);(void)fFpuWrite; (void)fMcBegin; } while (0)766 #define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_ PTYPE(uint64_t const *, a_pu64Dst); (void)fFpuWrite; (void)fMcBegin; } while (0)767 #define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu32Dst) = (uint32_t const *)((uintptr_t)0); CHK_ PTYPE(uint32_t const *, a_pu32Dst); (void)fFpuWrite; (void)fMcBegin; } while (0)757 #define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) do { CHK_TYPE(uint16_t, a_u16Local); CHK_VAR(a_u16Local); (void)fMcBegin; } while (0) 758 #define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) do { CHK_TYPE(uint32_t, a_u32Local); CHK_VAR(a_u32Local); (void)fMcBegin; } while (0) 759 #define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) do { CHK_TYPE(uint64_t, a_u64Local); CHK_VAR(a_u64Local); (void)fMcBegin; } while (0) 760 761 #define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_u64Value) = 0; CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuRead; (void)fMcBegin; } while (0) 762 #define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_u32Value) = 0; CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuRead; (void)fMcBegin; } while (0) 763 #define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) do { CHK_MREG_IDX(a_iMReg); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuWrite; (void)fMcBegin; } while (0) 764 #define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) do { CHK_MREG_IDX(a_iMReg); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuWrite; (void)fMcBegin; } while (0) 765 #define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu64Dst) = (uint64_t *)((uintptr_t)0); CHK_VAR(a_pu64Dst); CHK_PTYPE(uint64_t *, a_pu64Dst); (void)fFpuWrite; (void)fMcBegin; } while (0) 766 #define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_VAR(a_pu64Dst); CHK_PTYPE(uint64_t const *, a_pu64Dst); (void)fFpuWrite; (void)fMcBegin; } while (0) 767 #define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) do { CHK_MREG_IDX(a_iMReg); (a_pu32Dst) = (uint32_t const *)((uintptr_t)0); CHK_VAR(a_pu32Dst); CHK_PTYPE(uint32_t const *, a_pu32Dst); (void)fFpuWrite; (void)fMcBegin; } while (0) 768 768 #define IEM_MC_MODIFIED_MREG(a_iMReg) do { CHK_MREG_IDX(a_iMReg); (void)fFpuWrite; (void)fMcBegin; } while (0) 769 #define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) do { AssertCompile(sizeof(*a_pu64Dst) <= sizeof(uint64_t)); (void)fFpuWrite; (void)fMcBegin; } while (0)769 #define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) do { CHK_VAR(a_pu64Dst); AssertCompile(sizeof(*a_pu64Dst) <= sizeof(uint64_t)); (void)fFpuWrite; (void)fMcBegin; } while (0) 770 770 771 771 #define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint8_t, a_bMask); (void)fSseRead; (void)fMcBegin; } while (0) 772 #define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) do { CHK_XREG_IDX(a_iXReg); (a_u128Value) = g_u128Zero; CHK_TYPE(RTUINT128U, a_u128Value); (void)fSseRead; (void)fMcBegin; } while (0)773 #define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) do { CHK_XREG_IDX(a_iXReg); (a_XmmValue) = g_XmmZero; CHK_TYPE(X86XMMREG, a_XmmValue); (void)fSseRead; (void)fMcBegin; } while (0)774 #define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) do { CHK_XREG_IDX(a_iXReg); (a_u64Value) = 0; CHK_TYPE(uint64_t, a_u64Value); (void)fSseRead; (void)fMcBegin; } while (0)775 #define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) do { CHK_XREG_IDX(a_iXReg); (a_u32Value) = 0; CHK_TYPE(uint32_t, a_u32Value); (void)fSseRead; (void)fMcBegin; } while (0)776 #define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord ) do { CHK_XREG_IDX(a_iXReg); (a_u16Value) = 0; CHK_TYPE(uint16_t, a_u16Value); (void)fSseRead; (void)fMcBegin; } while (0)777 #define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) do { CHK_XREG_IDX(a_iXReg); (a_u8Value) = 0; CHK_TYPE(uint8_t, a_u8Value); (void)fSseRead; (void)fMcBegin; } while (0)772 #define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u128Value); (a_u128Value) = g_u128Zero; CHK_TYPE(RTUINT128U, a_u128Value); (void)fSseRead; (void)fMcBegin; } while (0) 773 #define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_XmmValue); (a_XmmValue) = g_XmmZero; CHK_TYPE(X86XMMREG, a_XmmValue); (void)fSseRead; (void)fMcBegin; } while (0) 774 #define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u64Value); (a_u64Value) = 0; CHK_TYPE(uint64_t, a_u64Value); (void)fSseRead; (void)fMcBegin; } while (0) 775 #define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u32Value); (a_u32Value) = 0; CHK_TYPE(uint32_t, a_u32Value); (void)fSseRead; (void)fMcBegin; } while (0) 776 #define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord ) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u16Value); (a_u16Value) = 0; CHK_TYPE(uint16_t, a_u16Value); (void)fSseRead; (void)fMcBegin; } while (0) 777 #define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u8Value); (a_u8Value) = 0; CHK_TYPE(uint8_t, a_u8Value); (void)fSseRead; (void)fMcBegin; } while (0) 778 778 #define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) do { CHK_XREG_IDX(a_iXReg1); CHK_XREG_IDX(a_iXReg2); CHK_VAR(a_Dst); (a_Dst).uSrc1.au64[1] = (a_Dst).uSrc2.au64[1] = 0; CHK_TYPE(IEMPCMPISTRXSRC, a_Dst); (void)fSseRead; (void)fMcBegin; } while (0) 779 779 #define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) do { CHK_XREG_IDX(a_iXReg1); CHK_XREG_IDX(a_iXReg2); CHK_VAR(a_Dst); (a_Dst).uSrc1.uXmm.au64[1] = (a_Dst).uSrc2.uXmm.au64[1] = 0; CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); (void)fSseRead; (void)fMcBegin; } while (0) … … 781 781 #define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) do { CHK_XREG_IDX(a_iXReg1); CHK_XREG_IDX(a_iXReg2); CHK_VAR(a_Dst); (a_Dst).uSrc1.au64[1] = (a_Dst).uSrc2.au64[1] = (a_Dst).u64Rax = (a_Dst).u64Rdx = 0; CHK_TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fSseRead; (void)fMcBegin; } while (0) 782 782 783 #define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(RTUINT128U, a_u128Value); AssertCompile((a_iDwDst) < RT_ELEMENTS((a_u128Value).au32)); AssertCompile((a_iDwSrc) < RT_ELEMENTS((a_u128Value).au32)); (void)fSseWrite; (void)fMcBegin; } while (0)784 #define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) do {CHK_TYPE(RTUINT128U, a_u128Value); (void)fSseWrite; (void)fMcBegin; } while (0)785 #define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) do {CHK_TYPE(X86XMMREG, a_XmmValue); (void)fSseWrite; (void)fMcBegin; } while (0)786 #define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(X86XMMREG,a_XmmValue); AssertCompile((a_iDword) < RT_ELEMENTS((a_XmmValue).au32)); (void)fSseWrite; (void)fMcBegin; } while (0)787 #define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(X86XMMREG,a_XmmValue); AssertCompile((a_iQword) < RT_ELEMENTS((a_XmmValue).au64)); (void)fSseWrite; (void)fMcBegin; } while (0)788 #define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint64_t,a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0)789 #define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint64_t,a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0)790 #define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint32_t, a_u32Value);(void)fSseWrite; (void)fMcBegin; } while (0)791 #define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint16_t, a_u16Value);(void)fSseWrite; (void)fMcBegin; } while (0)792 #define IEM_MC_STORE_XREG_U8( a_iXReg, a_iByte, a_u8Value ) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint8_t, a_u8Value );(void)fSseWrite; (void)fMcBegin; } while (0)793 #define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint32_t,a_u32Value); (void)fSseWrite; (void)fMcBegin; } while (0)794 #define IEM_MC_STORE_XREG_HI_U64(a_iXReg, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(uint64_t,a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0)795 #define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(RTFLOAT32U,a_r32Value); (void)fSseWrite; (void)fMcBegin; } while (0)796 #define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) do { CHK_XREG_IDX(a_iXReg); CHK_TYPE(RTFLOAT64U,a_r64Value); (void)fSseWrite; (void)fMcBegin; } while (0)797 #define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_TYPE(uint8_t, a_u8Value);(void)fAvxWrite; (void)fMcBegin; } while (0)798 #define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_TYPE(uint16_t, a_u16Value);(void)fAvxWrite; (void)fMcBegin; } while (0)799 #define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_TYPE(uint32_t, a_u32Value);(void)fAvxWrite; (void)fMcBegin; } while (0)800 #define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_TYPE(uint64_t, a_u64Value);(void)fAvxWrite; (void)fMcBegin; } while (0)801 #define IEM_MC_BROADCAST_XREG_U128_ZX_VLMAX(a_iXRegDst, a_u128Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0)802 #define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); (a_pu128Dst) = (PRTUINT128U)((uintptr_t)0); CHK_PTYPE(PRTUINT128U, a_pu128Dst); (void)fSseWrite; (void)fMcBegin; } while (0)803 #define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); (a_pu128Dst) = (PCRTUINT128U)((uintptr_t)0); CHK_PTYPE(PCRTUINT128U, a_pu128Dst); (void)fSseWrite; (void)fMcBegin; } while (0)804 #define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg);(a_pu32Dst) = (uint32_t const *)((uintptr_t)0); CHK_PTYPE(uint32_t const *, a_pu32Dst); (void)fSseWrite; (void)fMcBegin; } while (0)805 #define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg);(a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_PTYPE(uint64_t const *, a_pu64Dst); (void)fSseWrite; (void)fMcBegin; } while (0)806 #define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg);(a_pr32Dst) = (RTFLOAT32U const *)((uintptr_t)0); CHK_PTYPE(RTFLOAT32U const *, a_pr32Dst); (void)fSseWrite; (void)fMcBegin; } while (0)807 #define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg);(a_pr64Dst) = (RTFLOAT64U const *)((uintptr_t)0); CHK_PTYPE(RTFLOAT64U const *, a_pr64Dst); (void)fSseWrite; (void)fMcBegin; } while (0)808 #define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); (a_pXmmDst)= (PCX86XMMREG)((uintptr_t)0); CHK_PTYPE(PCX86XMMREG, a_pXmmDst); (void)fSseWrite; (void)fMcBegin; } while (0)809 #define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) do { CHK_XREG_IDX(a_iXRegDst); CHK_XREG_IDX(a_iXRegSrc); (void)fSseWrite; (void)fMcBegin; } while (0)810 811 #define IEM_MC_FETCH_YREG_U256(a_u256Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); (a_u256Value).au64[0] = (a_u256Value).au64[1] = (a_u256Value).au64[2] = (a_u256Value).au64[3] = 0; CHK_TYPE(RTUINT256U, a_u256Value); (void)fAvxRead; (void)fMcBegin; } while (0)812 #define IEM_MC_FETCH_YREG_U128(a_u128Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); (a_u128Value).au64[0] = (a_u128Value).au64[1] = 0; CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxRead; (void)fMcBegin; } while (0)813 #define IEM_MC_FETCH_YREG_U64(a_u64Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc);(a_u64Value) = UINT64_MAX; CHK_TYPE(uint64_t, a_u64Value); (void)fAvxRead; (void)fMcBegin; } while (0)814 #define IEM_MC_FETCH_YREG_2ND_U64(a_u64Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc);(a_u64Value) = UINT64_MAX; CHK_TYPE(uint64_t, a_u64Value); (void)fAvxRead; (void)fMcBegin; } while (0)815 #define IEM_MC_FETCH_YREG_U32(a_u32Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc);(a_u32Value) = UINT32_MAX; CHK_TYPE(uint32_t, a_u32Value); (void)fAvxRead; (void)fMcBegin; } while (0)816 #define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0)817 #define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint32_t, a_u32Value);(void)fAvxWrite; (void)fMcBegin; } while (0)818 #define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint64_t, a_u64Value);(void)fAvxWrite; (void)fMcBegin; } while (0)819 #define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0)820 #define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(RTUINT256U, a_u256Value); (void)fAvxWrite; (void)fMcBegin; } while (0)821 #define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint8_t, a_u8Value);(void)fAvxWrite; (void)fMcBegin; } while (0)822 #define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint16_t, a_u16Value);(void)fAvxWrite; (void)fMcBegin; } while (0)823 #define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint32_t, a_u32Value);(void)fAvxWrite; (void)fMcBegin; } while (0)824 #define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(uint64_t, a_u64Value);(void)fAvxWrite; (void)fMcBegin; } while (0)825 #define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0)826 #define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg); (a_pu128Dst) = (PRTUINT128U)((uintptr_t)0); CHK_PTYPE(PRTUINT128U, a_pu128Dst); (void)fAvxWrite; (void)fMcBegin; } while (0)827 #define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg); (a_pu128Dst) = (PCRTUINT128U)((uintptr_t)0); CHK_PTYPE(PCRTUINT128U, a_pu128Dst); (void)fAvxWrite; (void)fMcBegin; } while (0)828 #define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg);(a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_PTYPE(uint64_t const *, a_pu64Dst); (void)fAvxWrite; (void)fMcBegin; } while (0)829 #define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) do { CHK_YREG_IDX(a_iYReg); (void)fAvxWrite; (void)fMcBegin; } while (0)830 #define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0)831 #define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0)832 #define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0)783 #define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); AssertCompile((a_iDwDst) < RT_ELEMENTS((a_u128Value).au32)); AssertCompile((a_iDwSrc) < RT_ELEMENTS((a_u128Value).au32)); (void)fSseWrite; (void)fMcBegin; } while (0) 784 #define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) do { CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); (void)fSseWrite; (void)fMcBegin; } while (0) 785 #define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) do { CHK_VAR(a_XmmValue); CHK_TYPE(X86XMMREG, a_XmmValue); (void)fSseWrite; (void)fMcBegin; } while (0) 786 #define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_XmmValue); CHK_TYPE(X86XMMREG, a_XmmValue); AssertCompile((a_iDword) < RT_ELEMENTS((a_XmmValue).au32)); (void)fSseWrite; (void)fMcBegin; } while (0) 787 #define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_XmmValue); CHK_TYPE(X86XMMREG, a_XmmValue); AssertCompile((a_iQword) < RT_ELEMENTS((a_XmmValue).au64)); (void)fSseWrite; (void)fMcBegin; } while (0) 788 #define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0) 789 #define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0) 790 #define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fSseWrite; (void)fMcBegin; } while (0) 791 #define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u16Value); CHK_TYPE(uint16_t, a_u16Value); (void)fSseWrite; (void)fMcBegin; } while (0) 792 #define IEM_MC_STORE_XREG_U8( a_iXReg, a_iByte, a_u8Value ) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u8Value ); CHK_TYPE(uint8_t, a_u8Value ); (void)fSseWrite; (void)fMcBegin; } while (0) 793 #define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fSseWrite; (void)fMcBegin; } while (0) 794 #define IEM_MC_STORE_XREG_HI_U64(a_iXReg, a_u64Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fSseWrite; (void)fMcBegin; } while (0) 795 #define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_r32Value); CHK_TYPE(RTFLOAT32U, a_r32Value); (void)fSseWrite; (void)fMcBegin; } while (0) 796 #define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_r64Value); CHK_TYPE(RTFLOAT64U, a_r64Value); (void)fSseWrite; (void)fMcBegin; } while (0) 797 #define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_VAR(a_u8Value); CHK_TYPE(uint8_t, a_u8Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 798 #define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_VAR(a_u16Value); CHK_TYPE(uint16_t, a_u16Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 799 #define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 800 #define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Value) do { CHK_XREG_IDX(a_iXRegDst); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 801 #define IEM_MC_BROADCAST_XREG_U128_ZX_VLMAX(a_iXRegDst, a_u128Value) do {CHK_XREG_IDX(a_iXRegDst); CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 802 #define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pu128Dst); (a_pu128Dst) = (PRTUINT128U)((uintptr_t)0); CHK_PTYPE(PRTUINT128U, a_pu128Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 803 #define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pu128Dst); (a_pu128Dst) = (PCRTUINT128U)((uintptr_t)0); CHK_PTYPE(PCRTUINT128U, a_pu128Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 804 #define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pu32Dst); (a_pu32Dst) = (uint32_t const *)((uintptr_t)0); CHK_PTYPE(uint32_t const *, a_pu32Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 805 #define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pu64Dst); (a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_PTYPE(uint64_t const *, a_pu64Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 806 #define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pr32Dst); (a_pr32Dst) = (RTFLOAT32U const *)((uintptr_t)0); CHK_PTYPE(RTFLOAT32U const *, a_pr32Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 807 #define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pr64Dst); (a_pr64Dst) = (RTFLOAT64U const *)((uintptr_t)0); CHK_PTYPE(RTFLOAT64U const *, a_pr64Dst); (void)fSseWrite; (void)fMcBegin; } while (0) 808 #define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) do { CHK_XREG_IDX(a_iXReg); CHK_VAR(a_pXmmDst); (a_pXmmDst) = (PCX86XMMREG)((uintptr_t)0); CHK_PTYPE(PCX86XMMREG, a_pXmmDst); (void)fSseWrite; (void)fMcBegin; } while (0) 809 #define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) do { CHK_XREG_IDX(a_iXRegDst); CHK_XREG_IDX(a_iXRegSrc); (void)fSseWrite; (void)fMcBegin; } while (0) 810 811 #define IEM_MC_FETCH_YREG_U256(a_u256Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u256Value); (a_u256Value).au64[0] = (a_u256Value).au64[1] = (a_u256Value).au64[2] = (a_u256Value).au64[3] = 0; CHK_TYPE(RTUINT256U, a_u256Value); (void)fAvxRead; (void)fMcBegin; } while (0) 812 #define IEM_MC_FETCH_YREG_U128(a_u128Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u128Value); (a_u128Value).au64[0] = (a_u128Value).au64[1] = 0; CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxRead; (void)fMcBegin; } while (0) 813 #define IEM_MC_FETCH_YREG_U64(a_u64Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u64Value); (a_u64Value) = UINT64_MAX; CHK_TYPE(uint64_t, a_u64Value); (void)fAvxRead; (void)fMcBegin; } while (0) 814 #define IEM_MC_FETCH_YREG_2ND_U64(a_u64Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u64Value); (a_u64Value) = UINT64_MAX; CHK_TYPE(uint64_t, a_u64Value); (void)fAvxRead; (void)fMcBegin; } while (0) 815 #define IEM_MC_FETCH_YREG_U32(a_u32Value, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u32Value); (a_u32Value) = UINT32_MAX; CHK_TYPE(uint32_t, a_u32Value); (void)fAvxRead; (void)fMcBegin; } while (0) 816 #define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 817 #define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 818 #define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 819 #define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 820 #define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u256Value); CHK_TYPE(RTUINT256U, a_u256Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 821 #define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u8Value); CHK_TYPE(uint8_t, a_u8Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 822 #define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u16Value); CHK_TYPE(uint16_t, a_u16Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 823 #define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 824 #define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Value) do { CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 825 #define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Value) do{ CHK_YREG_IDX(a_iYRegDst); CHK_VAR(a_u128Value); CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxWrite; (void)fMcBegin; } while (0) 826 #define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg); CHK_VAR(a_pu128Dst); (a_pu128Dst) = (PRTUINT128U)((uintptr_t)0); CHK_PTYPE(PRTUINT128U, a_pu128Dst); (void)fAvxWrite; (void)fMcBegin; } while (0) 827 #define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg); CHK_VAR(a_pu128Dst); (a_pu128Dst) = (PCRTUINT128U)((uintptr_t)0); CHK_PTYPE(PCRTUINT128U, a_pu128Dst); (void)fAvxWrite; (void)fMcBegin; } while (0) 828 #define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) do { CHK_YREG_IDX(a_iYReg); CHK_VAR(a_pu64Dst); (a_pu64Dst) = (uint64_t const *)((uintptr_t)0); CHK_PTYPE(uint64_t const *, a_pu64Dst); (void)fAvxWrite; (void)fMcBegin; } while (0) 829 #define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) do { CHK_YREG_IDX(a_iYReg); (void)fAvxWrite; (void)fMcBegin; } while (0) 830 #define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0) 831 #define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0) 832 #define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrc); (void)fAvxWrite; (void)fMcBegin; } while (0) 833 833 #define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrcHx); CHK_YREG_IDX(a_iYRegSrc32); (void)fAvxWrite; (void)fAvxRead; (void)fMcBegin; } while (0) 834 834 #define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrcHx); CHK_YREG_IDX(a_iYRegSrc64); (void)fAvxWrite; (void)fAvxRead; (void)fMcBegin; } while (0) … … 838 838 #define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) do { CHK_YREG_IDX(a_iYRegDst); CHK_YREG_IDX(a_iYRegSrcHx); (void)fAvxWrite; (void)fAvxRead; (void)fMcBegin; } while (0) 839 839 840 #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 841 #define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) do { CHK_TYPE(uint16_t, a_GCPtrMem16); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 842 #define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) do { CHK_TYPE(uint32_t, a_GCPtrMem32); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 843 #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 844 #define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 845 #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 846 #define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 847 #define IEM_MC_FETCH_MEM_S32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 848 #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 849 #define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 850 #define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(int64_t, a_i64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 851 852 #define IEM_MC_FETCH_MEM_U8_DISP(a_u8Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 853 do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint8_t, a_u8Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 854 #define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 855 do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint16_t, a_u16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 856 #define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 857 do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint32_t, a_u32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 858 #define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) \ 859 do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint64_t, a_u64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 860 861 #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 862 #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 863 #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 864 #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 865 #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 866 #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 867 #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 868 #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 869 #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 870 #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 871 #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 872 #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 873 #define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTFLOAT32U, a_r32Dst); (void)fMcBegin; } while (0) 874 #define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTFLOAT64U, a_r64Dst); (void)fMcBegin; } while (0) 875 #define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTFLOAT80U, a_r80Dst); (void)fMcBegin; } while (0) 876 #define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTPBCD80U, a_d80Dst); (void)fMcBegin; } while (0) 877 #define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 878 #define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 879 #define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 880 #define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 881 #define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 882 #define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 883 #define IEM_MC_FETCH_MEM_XMM_U32(a_XmmDst, a_iDWord, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(X86XMMREG, a_XmmDst); AssertCompile((a_iDWord) < RT_ELEMENTS((a_XmmDst).au32)); (void)fMcBegin; } while (0) 884 #define IEM_MC_FETCH_MEM_XMM_U64(a_XmmDst, a_iQWord, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(X86XMMREG, a_XmmDst); AssertCompile((a_iQWord) < RT_ELEMENTS((a_XmmDst).au64)); (void)fMcBegin; } while (0) 885 #define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 886 #define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 887 #define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 840 #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 841 #define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) do { CHK_TYPE(uint16_t, a_GCPtrMem16); CHK_VAR(a_GCPtrMem16); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 842 #define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) do { CHK_TYPE(uint32_t, a_GCPtrMem32); CHK_VAR(a_GCPtrMem32); CHK_VAR(a_u8Dst); AssertCompile(sizeof(a_u8Dst) == (sizeof(uint8_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 843 #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 844 #define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i16Dst); CHK_TYPE(int16_t, a_i16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 845 #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 846 #define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i32Dst); CHK_TYPE(int32_t, a_i32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 847 #define IEM_MC_FETCH_MEM_S32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 848 #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 849 #define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) do{ CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 850 #define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_i64Dst); CHK_TYPE(int64_t, a_i64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 851 852 #define IEM_MC_FETCH_MEM_U8_DISP( a_u8Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u8Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint8_t, a_u8Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 853 #define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint16_t, a_u16Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 854 #define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint32_t, a_u32Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 855 #define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) do { CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint64_t, a_u64Dst); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 856 857 #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 858 #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 859 #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 860 #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 861 #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 862 #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 863 #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u16Dst); AssertCompile(sizeof(a_u16Dst) == (sizeof(uint16_t))); (void)fMcBegin; } while (0) 864 #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 865 #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 866 #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u32Dst); AssertCompile(sizeof(a_u32Dst) == (sizeof(uint32_t))); (void)fMcBegin; } while (0) 867 #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 868 #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u64Dst); AssertCompile(sizeof(a_u64Dst) == (sizeof(uint64_t))); (void)fMcBegin; } while (0) 869 #define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r32Dst); CHK_TYPE(RTFLOAT32U, a_r32Dst); (void)fMcBegin; } while (0) 870 #define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r64Dst); CHK_TYPE(RTFLOAT64U, a_r64Dst); (void)fMcBegin; } while (0) 871 #define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_r80Dst); CHK_TYPE(RTFLOAT80U, a_r80Dst); (void)fMcBegin; } while (0) 872 #define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_d80Dst); CHK_TYPE(RTPBCD80U, a_d80Dst); (void)fMcBegin; } while (0) 873 #define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 874 #define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 875 #define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Dst); CHK_TYPE(RTUINT128U, a_u128Dst); (void)fMcBegin; } while (0) 876 #define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 877 #define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 878 #define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); (void)fMcBegin; } while (0) 879 #define IEM_MC_FETCH_MEM_XMM_U32(a_XmmDst, a_iDWord, a_iSeg, a_GCPtrMem) do{ CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); AssertCompile((a_iDWord) < RT_ELEMENTS((a_XmmDst).au32)); (void)fMcBegin; } while (0) 880 #define IEM_MC_FETCH_MEM_XMM_U64(a_XmmDst, a_iQWord, a_iSeg, a_GCPtrMem) do{ CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_XmmDst); CHK_TYPE(X86XMMREG, a_XmmDst); AssertCompile((a_iQWord) < RT_ELEMENTS((a_XmmDst).au64)); (void)fMcBegin; } while (0) 881 #define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 882 #define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 883 #define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Dst); CHK_TYPE(RTUINT256U, a_u256Dst); (void)fMcBegin; } while (0) 888 884 889 885 # define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 890 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMPCMPISTRXSRC, a_Dst); (void)fMcBegin; } while (0)886 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPISTRXSRC, a_Dst); (void)fMcBegin; } while (0) 891 887 # define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 892 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMMEDIAF2XMMSRC, a_Dst); (void)fMcBegin; } while (0)888 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); (void)fMcBegin; } while (0) 893 889 # define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) \ 894 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iDWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au32)); (void)fMcBegin; } while (0)890 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iDWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au32)); (void)fMcBegin; } while (0) 895 891 # define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) \ 896 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iQWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au64)); (void)fMcBegin; } while (0)892 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMMEDIAF2XMMSRC, a_Dst); AssertCompile((a_iQWord2) < RT_ELEMENTS((a_Dst).uSrc2.uXmm.au64)); (void)fMcBegin; } while (0) 897 893 # define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 898 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0)894 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0) 899 895 # define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \ 900 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_ TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0)901 902 #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(uint8_t, a_u8Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)903 #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(uint16_t, a_u16Value); (void)fMcBegin; } while (0)904 #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(uint32_t, a_u32Value); (void)fMcBegin; } while (0)905 #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(uint64_t, a_u64Value); (void)fMcBegin; } while (0)906 #define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ CONST(uint8_t, a_u8C); (void)fMcBegin; } while (0)907 #define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ CONST(uint16_t, a_u16C); (void)fMcBegin; } while (0)908 #define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ CONST(uint32_t, a_u32C); (void)fMcBegin; } while (0)909 #define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ CONST(uint64_t, a_u64C); (void)fMcBegin; } while (0)910 #define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) do { CHK_ TYPE(int8_t *,a_pi8Dst); CHK_CONST(int8_t, a_i8C); (void)fMcBegin; } while (0)911 #define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) do { CHK_ TYPE(int16_t *,a_pi16Dst); CHK_CONST(int16_t, a_i16C); (void)fMcBegin; } while (0)912 #define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) do { CHK_ TYPE(int32_t *,a_pi32Dst); CHK_CONST(int32_t, a_i32C); (void)fMcBegin; } while (0)913 #define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) do { CHK_ TYPE(int64_t *,a_pi64Dst); CHK_CONST(int64_t, a_i64C); (void)fMcBegin; } while (0)914 #define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) do { CHK_ TYPE(PRTFLOAT32U, a_pr32Dst); (void)fMcBegin; } while (0)915 #define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) do { CHK_ TYPE(PRTFLOAT64U, a_pr64Dst); (void)fMcBegin; } while (0)916 #define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) do { CHK_ TYPE(PRTFLOAT80U, a_pr80Dst); (void)fMcBegin; } while (0)917 #define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) do { CHK_ TYPE(PRTPBCD80U,a_pd80Dst); (void)fMcBegin; } while (0)918 #define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0)919 #define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0)920 #define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0)921 #define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_ TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0)896 do { CHK_XREG_IDX(a_iXReg1); (void)fSseRead; CHK_SEG_IDX(a_iSeg2); CHK_GCPTR(a_GCPtrMem2); CHK_VAR(a_GCPtrMem2); CHK_VAR(a_Dst); CHK_TYPE(IEMPCMPESTRXSRC, a_Dst); (void)fMcBegin; } while (0) 897 898 #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint8_t, a_u8Value); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 899 #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint16_t, a_u16Value); (void)fMcBegin; } while (0) 900 #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint32_t, a_u32Value); (void)fMcBegin; } while (0) 901 #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_TYPE(uint64_t, a_u64Value); (void)fMcBegin; } while (0) 902 #define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_CONST(uint8_t, a_u8C); (void)fMcBegin; } while (0) 903 #define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_CONST(uint16_t, a_u16C); (void)fMcBegin; } while (0) 904 #define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_CONST(uint32_t, a_u32C); (void)fMcBegin; } while (0) 905 #define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_CONST(uint64_t, a_u64C); (void)fMcBegin; } while (0) 906 #define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) do { CHK_VAR(a_pi8Dst); CHK_TYPE(int8_t *, a_pi8Dst); CHK_CONST(int8_t, a_i8C); (void)fMcBegin; } while (0) 907 #define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) do { CHK_VAR(a_pi16Dst); CHK_TYPE(int16_t *, a_pi16Dst); CHK_CONST(int16_t, a_i16C); (void)fMcBegin; } while (0) 908 #define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) do { CHK_VAR(a_pi32Dst); CHK_TYPE(int32_t *, a_pi32Dst); CHK_CONST(int32_t, a_i32C); (void)fMcBegin; } while (0) 909 #define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) do { CHK_VAR(a_pi64Dst); CHK_TYPE(int64_t *, a_pi64Dst); CHK_CONST(int64_t, a_i64C); (void)fMcBegin; } while (0) 910 #define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) do { CHK_VAR(a_pr32Dst); CHK_TYPE(PRTFLOAT32U, a_pr32Dst); (void)fMcBegin; } while (0) 911 #define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) do { CHK_VAR(a_pr64Dst); CHK_TYPE(PRTFLOAT64U, a_pr64Dst); (void)fMcBegin; } while (0) 912 #define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) do { CHK_VAR(a_pr80Dst); CHK_TYPE(PRTFLOAT80U, a_pr80Dst); (void)fMcBegin; } while (0) 913 #define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) do { CHK_VAR(a_pd80Dst); CHK_TYPE(PRTPBCD80U, a_pd80Dst); (void)fMcBegin; } while (0) 914 #define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 915 #define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 916 #define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 917 #define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 922 918 923 919 #define IEM_MC_PUSH_U16(a_u16Value) do { (void)fMcBegin; } while (0)
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