Changeset 102134 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Nov 17, 2023 10:16:01 AM (17 months ago)
- svn:sync-xref-src-repo-rev:
- 160258
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
- 2 moved
-
Makefile.kmk (modified) (2 diffs)
-
bs3-cpu-basic-3-asm.asm (modified) (1 diff)
-
bs3-cpu-basic-3-cmn-template.c (moved) (moved from trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-3-template.c ) (4 diffs)
-
bs3-cpu-basic-3-cmn-template.mac (moved) (moved from trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-3-template.mac ) (13 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/ValidationKit/bootsectors/Makefile.kmk
r102130 r102134 278 278 bs3-cpu-basic-3_TEMPLATE = VBoxBS3KitImg 279 279 bs3-cpu-basic-3_INCS = . 280 bs3-cpu-basic-3_DEFS = BS3_CMN_INSTANTIATE_FILE1=bs3-cpu-basic-3- template.c281 bs3-cpu-basic-3_DEFS += BS3_MODE_INSTANTIATE_FILE1=bs3-cpu-basic-3-template.c280 bs3-cpu-basic-3_DEFS = BS3_CMN_INSTANTIATE_FILE1=bs3-cpu-basic-3-cmn-template.c 281 #bs3-cpu-basic-3_DEFS += BS3_MODE_INSTANTIATE_FILE1=bs3-cpu-basic-3-mode-template.c 282 282 bs3-cpu-basic-3_SOURCES = \ 283 283 bs3kit/bs3-first-rm.asm \ … … 287 287 bs3kit/bs3-cmn-instantiate.c64 \ 288 288 bs3-cpu-basic-3-asm.asm 289 bs3-cpu-basic-3- template.o:: \289 bs3-cpu-basic-3-cmn-template.o:: \ 290 290 $$(bs3-cpu-basic-3_0_OUTDIR)/bs3kit/bs3-cmn-instantiate-x0.o16 \ 291 291 $$(bs3-cpu-basic-3_0_OUTDIR)/bs3kit/bs3-cmn-instantiate.o32 \ -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-3-asm.asm
r102130 r102134 54 54 ; Instantiate code templates. 55 55 ; 56 BS3_INSTANTIATE_COMMON_TEMPLATE "bs3-cpu-basic-3- template.mac"57 ;BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES "bs3-cpu-basic-3- template.mac"56 BS3_INSTANTIATE_COMMON_TEMPLATE "bs3-cpu-basic-3-cmn-template.mac" 57 ;BS3_INSTANTIATE_TEMPLATE_WITH_WEIRD_ONES "bs3-cpu-basic-3-mode-template.mac" 58 58 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-3-cmn-template.c
r102133 r102134 1 1 /* $Id$ */ 2 2 /** @file 3 * BS3Kit - bs3-cpu-basic-3, C code template .3 * BS3Kit - bs3-cpu-basic-3, C code template, common code (CMN). 4 4 */ 5 5 … … 37 37 38 38 /********************************************************************************************************************************* 39 * Header Files*39 * Assembly Symbols * 40 40 *********************************************************************************************************************************/ 41 #include <iprt/asm.h> 42 #include <iprt/asm-amd64-x86.h> 43 44 45 46 #ifdef BS3_INSTANTIATING_CMN 47 48 # if ARCH_BITS != 64 41 #if ARCH_BITS != 64 49 42 extern BS3_DECL_FAR(void) BS3_CMN_FAR_NM(bs3CpuBasic3_lea_16)(void); 50 43 extern BS3_DECL_FAR(void) BS3_CMN_FAR_NM(bs3CpuBasic3_lea_32)(void); … … 53 46 #endif 54 47 48 49 55 50 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuBasic3_Lea)(uint8_t bMode) 56 51 { 57 52 /* Repeat the test so the native recompiler get a chance to kick in... */ 58 53 unsigned i; 54 RT_NOREF(bMode); 59 55 60 # 56 #if ARCH_BITS != 64 61 57 { 62 58 FPFNBS3FAR pfnWorker16 = Bs3SelLnkCodePtrToCurPtr(BS3_CMN_FAR_NM(bs3CpuBasic3_lea_16)); … … 69 65 pfnWorker32(); 70 66 } 71 # else 67 return 0; 68 #else 72 69 //for (i = 0; i < 64; i++) 73 70 // BS3_CMN_FAR_NM(bs3CpuBasic3_lea_64) 74 71 RT_NOREF(i); 75 # endif 76 77 RT_NOREF(bMode); 78 return UINT8_MAX; 72 return BS3TESTDOMODE_SKIPPED; 73 #endif 79 74 } 80 75 81 82 #endif /* BS3_INSTANTIATING_CMN */83 84 85 /*86 * Mode specific code.87 * Mode specific code.88 * Mode specific code.89 */90 #ifdef BS3_INSTANTIATING_MODE91 92 93 #endif /* BS3_INSTANTIATING_MODE */94 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-3-cmn-template.mac
r102133 r102134 1 1 ; $Id$ 2 2 ;; @file 3 ; BS3Kit - bs3-cpu-basic-3 assembly template .3 ; BS3Kit - bs3-cpu-basic-3 assembly template, common code (CMN). 4 4 ; 5 5 … … 44 44 TMPL_BEGIN_TEXT 45 45 46 47 ;48 ; Test code snippets containing code which differs between 16-bit, 32-bit49 ; and 64-bit CPUs modes.50 ;51 %ifdef BS3_INSTANTIATING_CMN52 46 53 47 … … 68 62 ; Switching segment for the 16-bit stuff, this may need some space. 69 63 ; 70 64 %if TMPL_BITS == 16 71 65 BS3_BEGIN_X0TEXT16 72 66 %else 73 67 TMPL_BEGIN_TEXT 74 68 %endif 75 69 76 70 … … 78 72 ; Loads known values into all registers but xSP. 79 73 BS3_PROC_BEGIN_CMN bs3CpuBasic3_lea_load_regs, BS3_PBC_NEAR 80 74 %if TMPL_BITS == 64 81 75 mov rax, 01111111111111110h 82 76 mov rcx, 02222222222222202h … … 94 88 mov r14, 0eeeeeeeeeeeeee3eh 95 89 mov r15, 0fffffffffffff3ffh 96 90 %else 97 91 mov eax, LEA_EAX 98 92 mov ecx, LEA_ECX … … 102 96 mov esi, LEA_ESI 103 97 mov edi, LEA_EDI 104 98 %endif 105 99 BS3_HYBRID_RET 106 100 BS3_PROC_END_CMN bs3CpuBasic3_lea_16_load_regs 107 101 108 102 109 103 %if TMPL_BITS != 64 110 104 ; 111 105 ; Macros for 16-bit lea tests. 112 106 ; 113 114 115 107 %ifndef BS3CPUBASIC3_LEA_16_MACROS 108 %define BS3CPUBASIC3_LEA_16_MACROS 109 %macro test_lea_16_one 3 116 110 call BS3_CMN_NM(bs3CpuBasic3_lea_load_regs) 117 111 lea strict %1, strict %2 … … 119 113 jz %%okay 120 114 int3 121 122 123 115 %%okay: 116 %endm 117 %macro test_lea_16_inner 2 124 118 test_lea_16_one ax, %1, %2 125 119 test_lea_16_one cx, %1, %2 … … 137 131 test_lea_16_one esi, %1, %2 138 132 test_lea_16_one edi, %1, %2 139 140 141 133 %endm 134 %macro test_lea_16_outer 3 135 %if %1 == 0 142 136 test_lea_16_inner [%2], %3 143 137 %else 144 138 test_lea_16_inner [word %3], %3 ; mod0/6 = disp16 145 139 %endif 146 140 test_lea_16_inner [%2 + 07fh], %3 + 7fh 147 141 test_lea_16_inner [%2 - 19], %3 - 19 148 142 test_lea_16_inner [%2 + 5708h], %3 + 5708h 149 143 test_lea_16_inner [%2 - 7293h], %3 - 7293h 150 151 144 %endm 145 %endif 152 146 153 147 ;; … … 181 175 ; Macros for 32-bit lea tests. 182 176 ; 183 184 185 186 187 188 189 190 191 177 %if TMPL_BITS == 16 178 %define MY_O16 67h, 179 %define MY_O32 67h, 66h, 180 %define MY_CMP_O32 66h, 181 %else 182 %define MY_O16 66h, 183 %define MY_O32 184 %define MY_CMP_O32 185 %endif 192 186 193 187 ;; … … 201 195 ; Loop thru all the modr/m memory encodings. 202 196 ; 203 %assign iMod 0 204 %rep 3 205 %assign iDstReg 0 197 %assign iMod 0 198 %rep 3 199 %assign iDstReg 0 200 %rep 8 201 %assign iMemReg 0 206 202 %rep 8 207 %assign iMemReg 0 208 %rep 8 209 %if iDstReg == 0 210 %assign iDstReg_Value LEA_EAX 211 %elif iDstReg == 1 212 %assign iDstReg_Value LEA_ECX 213 %elif iDstReg == 2 214 %assign iDstReg_Value LEA_EDX 215 %elif iDstReg == 3 216 %assign iDstReg_Value LEA_EBX 217 %elif iDstReg == 4 218 %assign iDstReg_Value LEA_ESP 219 %elif iDstReg == 5 220 %assign iDstReg_Value LEA_EBP 221 %elif iDstReg == 6 222 %assign iDstReg_Value LEA_ESI 223 %elif iDstReg == 7 224 %assign iDstReg_Value LEA_EDI 225 %else 226 %error iDstReg 227 %endif 228 229 %if iMemReg == 4 203 %if iDstReg == 0 204 %assign iDstReg_Value LEA_EAX 205 %elif iDstReg == 1 206 %assign iDstReg_Value LEA_ECX 207 %elif iDstReg == 2 208 %assign iDstReg_Value LEA_EDX 209 %elif iDstReg == 3 210 %assign iDstReg_Value LEA_EBX 211 %elif iDstReg == 4 212 %assign iDstReg_Value LEA_ESP 213 %elif iDstReg == 5 214 %assign iDstReg_Value LEA_EBP 215 %elif iDstReg == 6 216 %assign iDstReg_Value LEA_ESI 217 %elif iDstReg == 7 218 %assign iDstReg_Value LEA_EDI 219 %else 220 %error iDstReg 221 %endif 222 223 %if iMemReg == 4 230 224 ; 231 225 ; SIB. 232 226 ; 233 %assign iBase 0 227 %assign iBase 0 228 %rep 8 229 %if iBase == 0 230 %assign iBase_Value LEA_EAX 231 %elif iBase == 1 232 %assign iBase_Value LEA_ECX 233 %elif iBase == 2 234 %assign iBase_Value LEA_EDX 235 %elif iBase == 3 236 %assign iBase_Value LEA_EBX 237 %elif iBase == 4 238 %assign iBase_Value LEA_ESP 239 %elif iBase == 5 && iMod == 0 240 %assign iBase_Value 0 241 %elif iBase == 5 242 %assign iBase_Value LEA_EBP 243 %elif iBase == 6 244 %assign iBase_Value LEA_ESI 245 %elif iBase == 7 246 %assign iBase_Value LEA_EDI 247 %else 248 %error iBase 249 %endif 250 251 %assign iIndex 0 252 %assign cShift 0 ; we don't have enough room for checking all the shifts in the 16-bit segment or the total image. 234 253 %rep 8 235 %if iBase == 0 236 %assign iBase_Value LEA_EAX 237 %elif iBase == 1 238 %assign iBase_Value LEA_ECX 239 %elif iBase == 2 240 %assign iBase_Value LEA_EDX 241 %elif iBase == 3 242 %assign iBase_Value LEA_EBX 243 %elif iBase == 4 244 %assign iBase_Value LEA_ESP 245 %elif iBase == 5 && iMod == 0 246 %assign iBase_Value 0 247 %elif iBase == 5 248 %assign iBase_Value LEA_EBP 249 %elif iBase == 6 250 %assign iBase_Value LEA_ESI 251 %elif iBase == 7 252 %assign iBase_Value LEA_EDI 254 %if iIndex == 0 255 %assign iIndex_Value LEA_EAX 256 %elif iIndex == 1 257 %assign iIndex_Value LEA_ECX 258 %elif iIndex == 2 259 %assign iIndex_Value LEA_EDX 260 %elif iIndex == 3 261 %assign iIndex_Value LEA_EBX 262 %elif iIndex == 4 263 %assign iIndex_Value 0 264 %elif iIndex == 5 265 %assign iIndex_Value LEA_EBP 266 %elif iIndex == 6 267 %assign iIndex_Value LEA_ESI 268 %elif iIndex == 7 269 %assign iIndex_Value LEA_EDI 253 270 %else 254 %error i Base271 %error iIndex 255 272 %endif 256 257 %assign iIndex 0258 %assign cShift 0 ; we don't have enough room for checking all the shifts in the 16-bit segment or the total image.259 %rep 8260 %if iIndex == 0261 %assign iIndex_Value LEA_EAX262 %elif iIndex == 1263 %assign iIndex_Value LEA_ECX264 %elif iIndex == 2265 %assign iIndex_Value LEA_EDX266 %elif iIndex == 3267 %assign iIndex_Value LEA_EBX268 %elif iIndex == 4269 %assign iIndex_Value 0270 %elif iIndex == 5271 %assign iIndex_Value LEA_EBP272 %elif iIndex == 6273 %assign iIndex_Value LEA_ESI274 %elif iIndex == 7275 %assign iIndex_Value LEA_EDI276 %else277 %error iIndex278 %endif279 273 280 274 ; … … 282 276 ; in the image (32-bit case) or the segment (16-bit case) unfortunately. 283 277 ; 284 %if TMPL_BITS == 32 285 %assign cShiftLoops 2 286 %else 287 %assign cShiftLoops 1 278 %if TMPL_BITS == 32 279 %assign cShiftLoops 2 280 %else 281 %assign cShiftLoops 1 282 %endif 283 %rep cShiftLoops 284 285 ; 286 ; LEA+SIB w/ 32-bit operand size. 287 ; 288 call .load_regs 289 %if iBase == 4 || iDstReg == 4 290 mov esp, LEA_ESP 288 291 %endif 289 %rep cShiftLoops 290 291 ; 292 ; LEA+SIB w/ 32-bit operand size. 293 ; 292 293 ; lea 294 %assign iValue iBase_Value + (iIndex_Value << cShift) 295 db MY_O32 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift) 296 %if iMod == X86_MOD_MEM1 297 db -119 298 %assign iValue iValue - 119 299 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iBase == 5) 300 dd -04353f1ech 301 %assign iValue iValue - 04353f1ech 302 %endif 303 304 ; cmp iDstReg, iValue 305 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 306 dd iValue & 0ffffffffh 307 %if iBase == 4 || iDstReg == 4 308 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 309 %endif 310 jz $+3 311 int3 312 %assign cShift (cShift + 1) & 3 313 314 ; 315 ; LEA+SIB w/ 16-bit operand size. 316 ; 317 %if TMPL_BITS == 32 ; No room in the 16-bit segment for all of this. 294 318 call .load_regs 295 319 %if iBase == 4 || iDstReg == 4 … … 299 323 ; lea 300 324 %assign iValue iBase_Value + (iIndex_Value << cShift) 301 db MY_O 328dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift)325 db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift) 302 326 %if iMod == X86_MOD_MEM1 303 db - 119304 %assign iValue iValue - 119327 db -7 328 %assign iValue iValue - 7 305 329 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iBase == 5) 306 dd -0 4353f1ech307 %assign iValue iValue - 0 4353f1ech330 dd -073d676e4h 331 %assign iValue iValue - 073d676e4h 308 332 %endif 309 333 310 334 ; cmp iDstReg, iValue 311 335 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 312 dd iValue & 0ffffffffh313 %if iBase == 4 || iDstReg == 4336 dd (iValue & 00000ffffh) | (iDstReg_Value & 0ffff0000h) 337 %if 1 || iBase == 4 || iDstReg == 4 314 338 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 315 339 %endif 316 340 jz $+3 317 341 int3 318 %assign cShift (cShift + 1) & 3 319 320 ; 321 ; LEA+SIB w/ 16-bit operand size. 322 ; 323 %if TMPL_BITS == 32 ; No room in the 16-bit segment for all of this. 342 %assign cShift (cShift + 2) & 3 343 %endif ; TMPL_BITS == 32 344 %endrep 345 %assign iIndex iIndex + 1 346 %endrep 347 %assign iBase iBase + 1 348 %endrep 349 350 %else ; !SIB 351 ; 352 ; Plain lea reg, [reg] with disp according to iMod, 353 ; or lea reg, [disp32] if iMemReg == 5 && iMod == 0. 354 ; 355 %if iMemReg == 0 356 %assign iMemReg_Value LEA_EAX 357 %elif iMemReg == 1 358 %assign iMemReg_Value LEA_ECX 359 %elif iMemReg == 2 360 %assign iMemReg_Value LEA_EDX 361 %elif iMemReg == 3 362 %assign iMemReg_Value LEA_EBX 363 %elif iMemReg == 5 && iMod == 0 364 %assign iMemReg_Value 0 365 %elif iMemReg == 5 366 %assign iMemReg_Value LEA_EBP 367 %elif iMemReg == 6 368 %assign iMemReg_Value LEA_ESI 369 %elif iMemReg == 7 370 %assign iMemReg_Value LEA_EDI 371 %else 372 %error iMemReg 373 %endif 374 375 ; 376 ; 32-bit operand size first. 377 ; 324 378 call .load_regs 325 %if iBase == 4 ||iDstReg == 4379 %if iDstReg == 4 326 380 mov esp, LEA_ESP 327 381 %endif 328 382 329 383 ; lea 330 %assign iValue iBase_Value + (iIndex_Value << cShift) 331 db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift) 332 %if iMod == X86_MOD_MEM1 333 db -7 334 %assign iValue iValue - 7 335 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iBase == 5) 336 dd -073d676e4h 337 %assign iValue iValue - 073d676e4h 338 %endif 384 %assign iValue iMemReg_Value 385 db MY_O32 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg) 386 %if iMod == X86_MOD_MEM1 387 db 89 388 %assign iValue iValue + 89 389 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5) 390 dd 058739af8h 391 %assign iValue iValue + 058739af8h 392 %endif 393 394 ; cmp iDstReg, iValue 395 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 396 dd iValue & 0ffffffffh 397 %if iDstReg == 4 398 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 399 %endif 400 jz $+3 401 int3 402 403 ; 404 ; 16-bit operand size next. 405 ; 406 call .load_regs 407 %if iDstReg == 4 408 mov esp, LEA_ESP 409 %endif 410 411 ; lea 412 %assign iValue iMemReg_Value 413 db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg) 414 %if iMod == X86_MOD_MEM1 415 db -98 416 %assign iValue iValue - 98 417 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5) 418 dd 0f3694352h 419 %assign iValue iValue + 0f3694352h 420 %endif 339 421 340 422 ; cmp iDstReg, iValue 341 423 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 342 424 dd (iValue & 00000ffffh) | (iDstReg_Value & 0ffff0000h) 343 %if 1 || iBase == 4 ||iDstReg == 4425 %if iDstReg == 4 344 426 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 345 427 %endif 346 428 jz $+3 347 429 int3 348 %assign cShift (cShift + 2) & 3 349 %endif ; TMPL_BITS == 32 350 %endrep 351 %assign iIndex iIndex + 1 352 %endrep 353 %assign iBase iBase + 1 354 %endrep 355 356 %else ; !SIB 357 ; 358 ; Plain lea reg, [reg] with disp according to iMod, 359 ; or lea reg, [disp32] if iMemReg == 5 && iMod == 0. 360 ; 361 %if iMemReg == 0 362 %assign iMemReg_Value LEA_EAX 363 %elif iMemReg == 1 364 %assign iMemReg_Value LEA_ECX 365 %elif iMemReg == 2 366 %assign iMemReg_Value LEA_EDX 367 %elif iMemReg == 3 368 %assign iMemReg_Value LEA_EBX 369 %elif iMemReg == 5 && iMod == 0 370 %assign iMemReg_Value 0 371 %elif iMemReg == 5 372 %assign iMemReg_Value LEA_EBP 373 %elif iMemReg == 6 374 %assign iMemReg_Value LEA_ESI 375 %elif iMemReg == 7 376 %assign iMemReg_Value LEA_EDI 377 %else 378 %error iMemReg 379 %endif 380 381 ; 382 ; 32-bit operand size first. 383 ; 384 call .load_regs 385 %if iDstReg == 4 386 mov esp, LEA_ESP 387 %endif 388 389 ; lea 390 %assign iValue iMemReg_Value 391 db MY_O32 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg) 392 %if iMod == X86_MOD_MEM1 393 db 89 394 %assign iValue iValue + 89 395 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5) 396 dd 058739af8h 397 %assign iValue iValue + 058739af8h 398 %endif 399 400 ; cmp iDstReg, iValue 401 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 402 dd iValue & 0ffffffffh 403 %if iDstReg == 4 404 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 405 %endif 406 jz $+3 407 int3 408 409 ; 410 ; 16-bit operand size next. 411 ; 412 call .load_regs 413 %if iDstReg == 4 414 mov esp, LEA_ESP 415 %endif 416 417 ; lea 418 %assign iValue iMemReg_Value 419 db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg) 420 %if iMod == X86_MOD_MEM1 421 db -98 422 %assign iValue iValue - 98 423 %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5) 424 dd 0f3694352h 425 %assign iValue iValue + 0f3694352h 426 %endif 427 428 ; cmp iDstReg, iValue 429 db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg) 430 dd (iValue & 00000ffffh) | (iDstReg_Value & 0ffff0000h) 431 %if iDstReg == 4 432 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] 433 %endif 434 jz $+3 435 int3 436 437 %endif ; !SIB 438 %assign iMemReg iMemReg + 1 439 %endrep 440 %assign iDstReg iDstReg + 1 430 431 %endif ; !SIB 432 %assign iMemReg iMemReg + 1 441 433 %endrep 442 %assign i Mod iMod+ 1434 %assign iDstReg iDstReg + 1 443 435 %endrep 436 %assign iMod iMod + 1 437 %endrep 444 438 445 439 mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))] … … 458 452 BS3_PROC_END_CMN bs3CpuBasic3_lea_32 459 453 460 %endif ; TMPL_BITS != 64 461 462 %endif ; BS3_INSTANTIATING_CMN 454 %endif ; TMPL_BITS != 64 455 463 456 464 457 %include "bs3kit-template-footer.mac" ; reset environment
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