VirtualBox

Changeset 102428 in vbox


Ignore:
Timestamp:
Dec 1, 2023 11:55:37 PM (12 months ago)
Author:
vboxsync
Message:

VMM/IEM: Continue refactoring IEM_MC_MEM_MAP into type specific MCs using bUnmapInfo. bugref:10371

Location:
trunk/src/VBox/VMM
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r102427 r102428  
    71107110#include "IEMAllMemRWTmpl.cpp.h"
    71117111
     7112#define TMPL_MEM_TYPE       RTUINT128U
     7113#define TMPL_MEM_TYPE_ALIGN (sizeof(RTUINT128U) - 1)
     7114#define TMPL_MEM_FN_SUFF    U128
     7115#define TMPL_MEM_FMT_TYPE   "%.16Rhxs"
     7116#define TMPL_MEM_FMT_DESC   "dqword"
     7117#include "IEMAllMemRWTmpl.cpp.h"
     7118
    71127119
    71137120/**
     
    71657172#endif
    71667173    return rc;
    7167 }
    7168 #endif
    7169 
    7170 
    7171 /**
    7172  * Fetches a data dqword (double qword), generally SSE related.
    7173  *
    7174  * @returns Strict VBox status code.
    7175  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7176  * @param   pu128Dst            Where to return the qword.
    7177  * @param   iSegReg             The index of the segment register to use for
    7178  *                              this access.  The base and limits are checked.
    7179  * @param   GCPtrMem            The address of the guest memory.
    7180  */
    7181 VBOXSTRICTRC iemMemFetchDataU128(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT
    7182 {
    7183     /* The lazy approach for now... */
    7184     PCRTUINT128U pu128Src;
    7185     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu128Src, sizeof(*pu128Src), iSegReg, GCPtrMem,
    7186                                 IEM_ACCESS_DATA_R, 0 /* NO_AC variant */);
    7187     if (rc == VINF_SUCCESS)
    7188     {
    7189         pu128Dst->au64[0] = pu128Src->au64[0];
    7190         pu128Dst->au64[1] = pu128Src->au64[1];
    7191         rc = iemMemCommitAndUnmap(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R);
    7192         Log(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
    7193     }
    7194     return rc;
    7195 }
    7196 
    7197 
    7198 #ifdef IEM_WITH_SETJMP
    7199 /**
    7200  * Fetches a data dqword (double qword), generally SSE related.
    7201  *
    7202  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7203  * @param   pu128Dst            Where to return the qword.
    7204  * @param   iSegReg             The index of the segment register to use for
    7205  *                              this access.  The base and limits are checked.
    7206  * @param   GCPtrMem            The address of the guest memory.
    7207  */
    7208 void iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP
    7209 {
    7210     /* The lazy approach for now... */
    7211     PCRTUINT128U pu128Src = (PCRTUINT128U)iemMemMapJmp(pVCpu, sizeof(*pu128Src), iSegReg, GCPtrMem,
    7212                                                        IEM_ACCESS_DATA_R, 0 /* NO_AC variant */);
    7213     pu128Dst->au64[0] = pu128Src->au64[0];
    7214     pu128Dst->au64[1] = pu128Src->au64[1];
    7215     iemMemCommitAndUnmapJmp(pVCpu, (void *)pu128Src, IEM_ACCESS_DATA_R);
    7216     Log(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
    72177174}
    72187175#endif
     
    74617418    return rcStrict;
    74627419}
    7463 
    7464 
    7465 /**
    7466  * Stores a data dqword.
    7467  *
    7468  * @returns Strict VBox status code.
    7469  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7470  * @param   iSegReg             The index of the segment register to use for
    7471  *                              this access.  The base and limits are checked.
    7472  * @param   GCPtrMem            The address of the guest memory.
    7473  * @param   u128Value            The value to store.
    7474  */
    7475 VBOXSTRICTRC iemMemStoreDataU128(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT
    7476 {
    7477     /* The lazy approach for now... */
    7478     PRTUINT128U pu128Dst;
    7479     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu128Dst, sizeof(*pu128Dst), iSegReg, GCPtrMem,
    7480                                 IEM_ACCESS_DATA_W, 0 /* NO_AC variant */);
    7481     if (rc == VINF_SUCCESS)
    7482     {
    7483         pu128Dst->au64[0] = u128Value.au64[0];
    7484         pu128Dst->au64[1] = u128Value.au64[1];
    7485         rc = iemMemCommitAndUnmap(pVCpu, pu128Dst, IEM_ACCESS_DATA_W);
    7486         Log5(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
    7487     }
    7488     return rc;
    7489 }
    7490 
    7491 
    7492 #ifdef IEM_WITH_SETJMP
    7493 /**
    7494  * Stores a data dqword, longjmp on error.
    7495  *
    7496  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7497  * @param   iSegReg             The index of the segment register to use for
    7498  *                              this access.  The base and limits are checked.
    7499  * @param   GCPtrMem            The address of the guest memory.
    7500  * @param   u128Value            The value to store.
    7501  */
    7502 void iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP
    7503 {
    7504     /* The lazy approach for now... */
    7505     PRTUINT128U pu128Dst = (PRTUINT128U)iemMemMapJmp(pVCpu, sizeof(*pu128Dst), iSegReg, GCPtrMem,
    7506                                                      IEM_ACCESS_DATA_W, 0 /* NO_AC variant */);
    7507     pu128Dst->au64[0] = u128Value.au64[0];
    7508     pu128Dst->au64[1] = u128Value.au64[1];
    7509     iemMemCommitAndUnmapJmp(pVCpu, pu128Dst, IEM_ACCESS_DATA_W);
    7510     Log5(("IEM WR dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
    7511 }
    7512 #endif
    75137420
    75147421
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

    r102427 r102428  
    30473047    'IEM_MC_MEM_MAP_U64_RO':                                     (McBlock.parseMcGeneric,           True,  False, ),
    30483048    'IEM_MC_MEM_MAP_U64_WO':                                     (McBlock.parseMcGeneric,           True,  False, ),
     3049    'IEM_MC_MEM_MAP_U128_RW':                                    (McBlock.parseMcGeneric,           True,  False, ),
     3050    'IEM_MC_MEM_MAP_U128_RO':                                    (McBlock.parseMcGeneric,           True,  False, ),
     3051    'IEM_MC_MEM_MAP_U128_WO':                                    (McBlock.parseMcGeneric,           True,  False, ),
    30493052    'IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO':                          (McBlock.parseMcGeneric,           True,  False, ),
    30503053    'IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX':                        (McBlock.parseMcGeneric,           True,  False, ),
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h

    r102349 r102428  
    1248212482         */
    1248312483#define BODY_CMPXCHG16B_HEAD \
    12484             IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0); \
     12484            IEM_MC_BEGIN(4, 4, IEM_MC_F_64BIT, 0); \
    1248512485            IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
    1248612486            IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
     
    1248812488            \
    1248912489            IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(GCPtrEffDst, 16); \
     12490            IEM_MC_LOCAL(uint8_t,               bUnmapInfo); \
    1249012491            IEM_MC_ARG(PRTUINT128U,             pu128MemDst,                0); \
    12491             IEM_MC_MEM_MAP(pu128MemDst, IEM_ACCESS_DATA_RW, pVCpu->iem.s.iEffSeg, GCPtrEffDst, 0 /*arg*/); \
     12492            IEM_MC_MEM_MAP_U128_RW(pu128MemDst, bUnmapInfo, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
    1249212493            \
    1249312494            IEM_MC_LOCAL(RTUINT128U, u128RaxRdx); \
     
    1250312504
    1250412505#define BODY_CMPXCHG16B_TAIL \
    12505             IEM_MC_MEM_COMMIT_AND_UNMAP(pu128MemDst, IEM_ACCESS_DATA_RW); \
     12506            IEM_MC_MEM_COMMIT_AND_UNMAP_RW(pu128MemDst, bUnmapInfo); \
    1250612507            IEM_MC_COMMIT_EFLAGS(EFlags); \
    1250712508            IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_ZF) { \
  • trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py

    r102427 r102428  
    153153    'IEM_MC_MEM_FLAT_MAP_R64_WO':                                (None, True,  False, ),
    154154    'IEM_MC_MEM_FLAT_MAP_R80_WO':                                (None, True,  False, ),
     155    'IEM_MC_MEM_FLAT_MAP_U8_RO':                                 (None, True,  False, ),
     156    'IEM_MC_MEM_FLAT_MAP_U8_RW':                                 (None, True,  False, ),
    155157    'IEM_MC_MEM_FLAT_MAP_U16_RO':                                (None, True,  False, ),
    156158    'IEM_MC_MEM_FLAT_MAP_U16_RW':                                (None, True,  False, ),
     
    159161    'IEM_MC_MEM_FLAT_MAP_U64_RO':                                (None, True,  False, ),
    160162    'IEM_MC_MEM_FLAT_MAP_U64_RW':                                (None, True,  False, ),
    161     'IEM_MC_MEM_FLAT_MAP_U8_RO':                                 (None, True,  False, ),
    162     'IEM_MC_MEM_FLAT_MAP_U8_RW':                                 (None, True,  False, ),
     163    'IEM_MC_MEM_FLAT_MAP_U128_RW':                               (None, True,  False, ),
    163164    'IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE':                      (None, True,  False, ),
    164165    'IEM_MC_STORE_MEM_FLAT_U128':                                (None, True,  False, ),
  • trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py

    r102427 r102428  
    724724        'IEM_MC_MEM_MAP_U64_RO':                  (  2, 'IEM_MC_MEM_FLAT_MAP_U64_RO' ),
    725725        'IEM_MC_MEM_MAP_U64_WO':                  (  2, 'IEM_MC_MEM_FLAT_MAP_U64_WO' ),
     726        'IEM_MC_MEM_MAP_U128_RW':                 (  2, 'IEM_MC_MEM_FLAT_MAP_U128_RW' ),
     727        'IEM_MC_MEM_MAP_U128_RO':                 (  2, 'IEM_MC_MEM_FLAT_MAP_U128_RO' ),
     728        'IEM_MC_MEM_MAP_U128_WO':                 (  2, 'IEM_MC_MEM_FLAT_MAP_U128_WO' ),
    726729        'IEM_MC_MEM_MAP_EX':                      (  3, 'IEM_MC_MEM_FLAT_MAP_EX' ),
    727730    };
  • trunk/src/VBox/VMM/include/IEMInline.h

    r102427 r102428  
    38473847#include "../VMMAll/IEMAllMemRWTmplInline.cpp.h"
    38483848
     3849#define TMPL_MEM_TYPE       RTUINT128U
     3850#define TMPL_MEM_TYPE_ALIGN 15
     3851#define TMPL_MEM_TYPE_SIZE  16
     3852#define TMPL_MEM_FN_SUFF    U128
     3853#define TMPL_MEM_FMT_TYPE   "%.16Rhxs"
     3854#define TMPL_MEM_FMT_DESC   "dqword"
     3855#include "../VMMAll/IEMAllMemRWTmplInline.cpp.h"
     3856
    38493857#undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK
    38503858
  • trunk/src/VBox/VMM/include/IEMInternal.h

    r102427 r102428  
    51135113void            iemMemFetchDataR80Jmp(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51145114void            iemMemFetchDataD80Jmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5115void            iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51155116# endif
    5116 void            iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51175117void            iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51185118void            iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     
    51405140void            iemMemStoreDataU32SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) IEM_NOEXCEPT_MAY_LONGJMP;
    51415141void            iemMemStoreDataU64SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP;
    5142 void            iemMemStoreDataU128SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
     5142void            iemMemStoreDataU128SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    51435143void            iemMemStoreDataU128AlignedSseSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    51445144void            iemMemStoreDataU256SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
     
    51515151void            iemMemStoreDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) IEM_NOEXCEPT_MAY_LONGJMP;
    51525152void            iemMemStoreDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP;
    5153 #endif
    51545153void            iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
     5154#endif
    51555155void            iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    51565156void            iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
     
    51775177PRTPBCD80U      iemMemMapDataD80WoSafeJmp(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51785178PCRTPBCD80U     iemMemMapDataD80RoSafeJmp(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5179PRTUINT128U     iemMemMapDataU128RwSafeJmp(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5180PRTUINT128U     iemMemMapDataU128WoSafeJmp(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5181PCRTUINT128U    iemMemMapDataU128RoSafeJmp(PVMCPUCC pVCpu, uint8_t *pbUnmapInfo, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    51795182
    51805183void            iemMemCommitAndUnmapRwSafeJmp(PVMCPUCC pVCpu, void *pvMem, uint8_t bMapInfo) IEM_NOEXCEPT_MAY_LONGJMP;
  • trunk/src/VBox/VMM/include/IEMMc.h

    r102427 r102428  
    14201420#ifndef IEM_WITH_SETJMP
    14211421# define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) \
    1422     IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value)))
     1422    IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value)))
    14231423# define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \
    14241424    IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128AlignedSse(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value)))
    14251425#else
    14261426# define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) \
    1427     iemMemStoreDataU128Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value))
     1427    iemMemStoreDataU128Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value))
    14281428# define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \
    14291429    iemMemStoreDataU128AlignedSseJmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value))
    14301430
    14311431# define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) \
    1432     iemMemStoreDataU128Jmp(pVCpu, UINT8_MAX, (a_GCPtrMem), (a_u128Value))
     1432    iemMemStoreDataU128Jmp(pVCpu, UINT8_MAX, (a_GCPtrMem), &(a_u128Value))
    14331433# define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) \
    14341434    iemMemStoreDataU128AlignedSseJmp(pVCpu, UINT8_MAX, (a_GCPtrMem), (a_u128Value))
     
    21492149# define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) \
    21502150    (a_pr64Mem) = (PRTFLOAT64U)iemMemFlatMapDataU64WoJmp(pVCpu, &(a_bUnmapInfo), (a_GCPtrMem))
     2151#endif
     2152
     2153
     2154/* 128-bit */
     2155
     2156/**
     2157 * Maps guest memory for dqword read+write direct (or bounce) buffer acccess.
     2158 *
     2159 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2160 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2161 * @param[in]  a_iSeg       The segment register to access via. No UINT8_MAX!
     2162 * @param[in]  a_GCPtrMem   The memory address.
     2163 * @remarks Will return/long jump on errors.
     2164 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_RW
     2165 */
     2166#ifndef IEM_WITH_SETJMP
     2167# define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { \
     2168        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128U), (a_iSeg), \
     2169                                           (a_GCPtrMem), IEM_ACCESS_DATA_RW, sizeof(RTUINT128U) - 1)); \
     2170        a_bUnmapInfo = 1 | ((IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE) << 4); \
     2171    } while (0)
     2172#else
     2173# define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) \
     2174    (a_pu128Mem) = iemMemMapDataU128RwJmp(pVCpu, &(a_bUnmapInfo), (a_iSeg), (a_GCPtrMem))
     2175#endif
     2176
     2177/**
     2178 * Maps guest memory for dqword writeonly direct (or bounce) buffer acccess.
     2179 *
     2180 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2181 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2182 * @param[in]  a_iSeg       The segment register to access via. No UINT8_MAX!
     2183 * @param[in]  a_GCPtrMem   The memory address.
     2184 * @remarks Will return/long jump on errors.
     2185 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_WO
     2186 */
     2187#ifndef IEM_WITH_SETJMP
     2188# define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { \
     2189        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128), (a_iSeg), \
     2190                                           (a_GCPtrMem), IEM_ACCESS_DATA_W, sizeof(RTUINT128) - 1)); \
     2191        a_bUnmapInfo = 1 | (IEM_ACCESS_TYPE_WRITE << 4); \
     2192    } while (0)
     2193#else
     2194# define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) \
     2195    (a_pu128Mem) = iemMemMapDataU128WoJmp(pVCpu, &(a_bUnmapInfo), (a_iSeg), (a_GCPtrMem))
     2196#endif
     2197
     2198/**
     2199 * Maps guest memory for dqword readonly direct (or bounce) buffer acccess.
     2200 *
     2201 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2202 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2203 * @param[in]  a_iSeg       The segment register to access via. No UINT8_MAX!
     2204 * @param[in]  a_GCPtrMem   The memory address.
     2205 * @remarks Will return/long jump on errors.
     2206 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_RO
     2207 */
     2208#ifndef IEM_WITH_SETJMP
     2209# define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { \
     2210        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128), (a_iSeg), \
     2211                                           (a_GCPtrMem), IEM_ACCESS_DATA_R, sizeof(RTUINT128) - 1)); \
     2212        a_bUnmapInfo = 1 | (IEM_ACCESS_TYPE_READ << 4); \
     2213    } while (0)
     2214#else
     2215# define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) \
     2216    (a_pu128Mem) = iemMemMapDataU128RoJmp(pVCpu, &(a_bUnmapInfo), (a_iSeg), (a_GCPtrMem))
     2217#endif
     2218
     2219/**
     2220 * Maps guest memory for dqword read+write direct (or bounce) buffer acccess,
     2221 * flat address variant.
     2222 *
     2223 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2224 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2225 * @param[in]  a_GCPtrMem   The memory address.
     2226 * @remarks Will return/long jump on errors.
     2227 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_RW
     2228 */
     2229#ifndef IEM_WITH_SETJMP
     2230# define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) do { \
     2231        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128), UINT8_MAX, \
     2232                                           (a_GCPtrMem), IEM_ACCESS_DATA_RW, sizeof(RTUINT128) - 1)); \
     2233        a_bUnmapInfo = 1 | ((IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE) << 4); \
     2234    } while (0)
     2235#else
     2236# define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) \
     2237    (a_pu128Mem) = iemMemFlatMapDataU128RwJmp(pVCpu, &(a_bUnmapInfo), (a_GCPtrMem))
     2238#endif
     2239
     2240/**
     2241 * Maps guest memory for dqword writeonly direct (or bounce) buffer acccess,
     2242 * flat address variant.
     2243 *
     2244 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2245 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2246 * @param[in]  a_GCPtrMem   The memory address.
     2247 * @remarks Will return/long jump on errors.
     2248 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_WO
     2249 */
     2250#ifndef IEM_WITH_SETJMP
     2251# define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) do { \
     2252        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128), UINT8_MAX, \
     2253                                           (a_GCPtrMem), IEM_ACCESS_DATA_W, sizeof(RTUINT128) - 1)); \
     2254        a_bUnmapInfo = 1 | (IEM_ACCESS_TYPE_WRITE << 4); \
     2255    } while (0)
     2256#else
     2257# define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) \
     2258    (a_pu128Mem) = iemMemFlatMapDataU128WoJmp(pVCpu, &(a_bUnmapInfo), (a_GCPtrMem))
     2259#endif
     2260
     2261/**
     2262 * Maps guest memory for dqword readonly direct (or bounce) buffer acccess, flat
     2263 * address variant.
     2264 *
     2265 * @param[out] a_pu128Mem   Where to return the pointer to the mapping.
     2266 * @param[out] a_bUnmapInfo Where to return umapping instructions. uint8_t.
     2267 * @param[in]  a_GCPtrMem   The memory address.
     2268 * @remarks Will return/long jump on errors.
     2269 * @see     IEM_MC_MEM_COMMIT_AND_UNMAP_RO
     2270 */
     2271#ifndef IEM_WITH_SETJMP
     2272# define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) do { \
     2273        IEM_MC_RETURN_ON_FAILURE(iemMemMap(pVCpu, (void **)&(a_pu128Mem), sizeof(RTUINT128), UINT8_MAX, \
     2274                                           (a_GCPtrMem), IEM_ACCESS_DATA_R, sizeof(RTUINT128) - 1)); \
     2275        a_bUnmapInfo = 1 | (IEM_ACCESS_TYPE_READ << 4); \
     2276    } while (0)
     2277#else
     2278# define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) \
     2279    (a_pu128Mem) = iemMemFlatMapDataU128RoJmp(pVCpu, &(a_bUnmapInfo), (a_GCPtrMem))
    21512280#endif
    21522281
  • trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

    r102427 r102428  
    949949#define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu64Mem); (a_pu64Mem) = NULL; CHK_PTYPE(uint64_t const *, a_pu64Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)
    950950#define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu64Mem); (a_pu64Mem) = NULL; CHK_PTYPE(uint64_t *,       a_pu64Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)
     951#define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu128Mem); (a_pu128Mem) = NULL; CHK_PTYPE(RTUINT128U *,       a_pu128Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)
     952#define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu128Mem); (a_pu128Mem) = NULL; CHK_PTYPE(RTUINT128U const *, a_pu128Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)
     953#define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu128Mem); (a_pu128Mem) = NULL; CHK_PTYPE(RTUINT128U *,       a_pu128Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0)
    951954
    952955#define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_pvMem, a_bMapInfo)                do { CHK_VAR(a_pvMem); CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0)
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