Changeset 102433 in vbox
- Timestamp:
- Dec 2, 2023 3:29:41 AM (14 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h
r102427 r102433 108 108 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 109 109 \ 110 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo); \110 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 111 111 IEM_MC_COMMIT_EFLAGS(EFlags); \ 112 112 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 168 168 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 169 169 \ 170 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu8Dst,bUnmapInfo); \170 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 171 171 IEM_MC_COMMIT_EFLAGS(EFlags); \ 172 172 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 199 199 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU8, pu8Dst, u8Src, pEFlags); \ 200 200 \ 201 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bMapInfoDst); \201 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bMapInfoDst); \ 202 202 IEM_MC_COMMIT_EFLAGS(EFlags); \ 203 203 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 349 349 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 350 350 \ 351 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \351 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 352 352 IEM_MC_COMMIT_EFLAGS(EFlags); \ 353 353 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 370 370 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 371 371 \ 372 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \372 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 373 373 IEM_MC_COMMIT_EFLAGS(EFlags); \ 374 374 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 391 391 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 392 392 \ 393 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \393 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 394 394 IEM_MC_COMMIT_EFLAGS(EFlags); \ 395 395 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 422 422 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 423 423 \ 424 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \424 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 425 425 IEM_MC_COMMIT_EFLAGS(EFlags); \ 426 426 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 443 443 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 444 444 \ 445 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo /* CMP,TEST */); \445 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo /* CMP,TEST */); \ 446 446 IEM_MC_COMMIT_EFLAGS(EFlags); \ 447 447 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 464 464 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 465 465 \ 466 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \466 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 467 467 IEM_MC_COMMIT_EFLAGS(EFlags); \ 468 468 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 567 567 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 568 568 \ 569 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo); \569 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 570 570 IEM_MC_COMMIT_EFLAGS(EFlags); \ 571 571 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 588 588 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 589 589 \ 590 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo); \590 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 591 591 IEM_MC_COMMIT_EFLAGS(EFlags); \ 592 592 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 609 609 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 610 610 \ 611 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo); \611 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 612 612 IEM_MC_COMMIT_EFLAGS(EFlags); \ 613 613 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 2755 2755 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_arpl, pu16Dst, u16Src, pEFlags); 2756 2756 2757 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);2757 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 2758 2758 IEM_MC_COMMIT_EFLAGS(EFlags); 2759 2759 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 3991 3991 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 3992 3992 \ 3993 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo); \3993 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 3994 3994 IEM_MC_COMMIT_EFLAGS(EFlags); \ 3995 3995 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4016 4016 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU8, pu8Dst, u8Src, pEFlags); \ 4017 4017 \ 4018 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo); \4018 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4019 4019 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4020 4020 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4062 4062 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU8, pu8Dst, u8Src, pEFlags); \ 4063 4063 \ 4064 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu8Dst,bUnmapInfo); \4064 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 4065 4065 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4066 4066 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4289 4289 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4290 4290 \ 4291 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \4291 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4292 4292 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4293 4293 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4314 4314 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4315 4315 \ 4316 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \4316 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4317 4317 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4318 4318 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4340 4340 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4341 4341 \ 4342 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \4342 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4343 4343 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4344 4344 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4375 4375 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 4376 4376 \ 4377 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \4377 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4378 4378 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4379 4379 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4400 4400 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 4401 4401 \ 4402 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \4402 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4403 4403 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4404 4404 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4425 4425 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 4426 4426 \ 4427 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \4427 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4428 4428 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4429 4429 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4527 4527 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4528 4528 \ 4529 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo); \4529 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 4530 4530 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4531 4531 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4552 4552 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4553 4553 \ 4554 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo); \4554 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 4555 4555 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4556 4556 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4577 4577 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4578 4578 \ 4579 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo); \4579 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 4580 4580 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4581 4581 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4812 4812 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 4813 4813 \ 4814 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \4814 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4815 4815 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4816 4816 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4835 4835 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 4836 4836 \ 4837 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \4837 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4838 4838 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4839 4839 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4858 4858 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 4859 4859 \ 4860 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \4860 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4861 4861 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4862 4862 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4891 4891 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 4892 4892 \ 4893 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \4893 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4894 4894 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4895 4895 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4914 4914 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 4915 4915 \ 4916 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \4916 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4917 4917 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4918 4918 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 4937 4937 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 4938 4938 \ 4939 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \4939 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 4940 4940 IEM_MC_COMMIT_EFLAGS(EFlags); \ 4941 4941 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 5033 5033 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 5034 5034 \ 5035 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo); \5035 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 5036 5036 IEM_MC_COMMIT_EFLAGS(EFlags); \ 5037 5037 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 5056 5056 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 5057 5057 \ 5058 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo); \5058 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 5059 5059 IEM_MC_COMMIT_EFLAGS(EFlags); \ 5060 5060 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 5079 5079 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 5080 5080 \ 5081 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo); \5081 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 5082 5082 IEM_MC_COMMIT_EFLAGS(EFlags); \ 5083 5083 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 5284 5284 else 5285 5285 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u8_unlocked, pu8Mem, pu8Reg); 5286 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Mem,bUnmapInfo);5286 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 5287 5287 IEM_MC_STORE_GREG_U8(IEM_GET_MODRM_REG(pVCpu, bRm), uTmpReg); 5288 5288 … … 5379 5379 else 5380 5380 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u16_unlocked, pu16Mem, pu16Reg); 5381 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Mem,bUnmapInfo);5381 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 5382 5382 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), uTmpReg); 5383 5383 … … 5402 5402 else 5403 5403 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u32_unlocked, pu32Mem, pu32Reg); 5404 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Mem,bUnmapInfo);5404 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 5405 5405 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), uTmpReg); 5406 5406 … … 5425 5425 else 5426 5426 IEM_MC_CALL_VOID_AIMPL_2(iemAImpl_xchg_u64_unlocked, pu64Mem, pu64Reg); 5427 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Mem,bUnmapInfo);5427 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 5428 5428 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), uTmpReg); 5429 5429 … … 8172 8172 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 8173 8173 8174 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo);8174 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8175 8175 IEM_MC_COMMIT_EFLAGS(EFlags); 8176 8176 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8273 8273 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags); 8274 8274 8275 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);8275 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8276 8276 IEM_MC_COMMIT_EFLAGS(EFlags); 8277 8277 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8296 8296 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags); 8297 8297 8298 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);8298 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8299 8299 IEM_MC_COMMIT_EFLAGS(EFlags); 8300 8300 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8319 8319 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags); 8320 8320 8321 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);8321 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8322 8322 IEM_MC_COMMIT_EFLAGS(EFlags); 8323 8323 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8822 8822 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 8823 8823 8824 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo);8824 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8825 8825 IEM_MC_COMMIT_EFLAGS(EFlags); 8826 8826 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8919 8919 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags); 8920 8920 8921 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);8921 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8922 8922 IEM_MC_COMMIT_EFLAGS(EFlags); 8923 8923 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8939 8939 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags); 8940 8940 8941 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);8941 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8942 8942 IEM_MC_COMMIT_EFLAGS(EFlags); 8943 8943 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 8959 8959 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags); 8960 8960 8961 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);8961 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 8962 8962 IEM_MC_COMMIT_EFLAGS(EFlags); 8963 8963 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9024 9024 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU8, pu8Dst, cShiftArg, pEFlags); 9025 9025 9026 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo);9026 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9027 9027 IEM_MC_COMMIT_EFLAGS(EFlags); 9028 9028 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9124 9124 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU16, pu16Dst, cShiftArg, pEFlags); 9125 9125 9126 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);9126 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9127 9127 IEM_MC_COMMIT_EFLAGS(EFlags); 9128 9128 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9145 9145 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU32, pu32Dst, cShiftArg, pEFlags); 9146 9146 9147 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);9147 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9148 9148 IEM_MC_COMMIT_EFLAGS(EFlags); 9149 9149 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9166 9166 IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnNormalU64, pu64Dst, cShiftArg, pEFlags); 9167 9167 9168 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);9168 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9169 9169 IEM_MC_COMMIT_EFLAGS(EFlags); 9170 9170 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9680 9680 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 9681 9681 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r32, pu16Fsw, pr32Dst, pr80Value); 9682 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pr32Dst,bUnmapInfo, u16Fsw);9682 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 9683 9683 IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 9684 9684 } IEM_MC_ELSE() { 9685 9685 IEM_MC_IF_FCW_IM() { 9686 9686 IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(pr32Dst); 9687 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pr32Dst,bUnmapInfo);9687 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 9688 9688 } IEM_MC_ELSE() { 9689 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pr32Dst,bUnmapInfo);9689 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 9690 9690 } IEM_MC_ENDIF(); 9691 9691 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 9719 9719 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 9720 9720 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r32, pu16Fsw, pr32Dst, pr80Value); 9721 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pr32Dst,bUnmapInfo, u16Fsw);9721 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 9722 9722 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 9723 9723 } IEM_MC_ELSE() { 9724 9724 IEM_MC_IF_FCW_IM() { 9725 9725 IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(pr32Dst); 9726 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pr32Dst,bUnmapInfo);9726 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 9727 9727 } IEM_MC_ELSE() { 9728 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pr32Dst,bUnmapInfo);9728 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 9729 9729 } IEM_MC_ENDIF(); 9730 9730 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 10805 10805 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 10806 10806 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i32, pu16Fsw, pi32Dst, pr80Value); 10807 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi32Dst,bUnmapInfo, u16Fsw);10807 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 10808 10808 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 10809 10809 } IEM_MC_ELSE() { 10810 10810 IEM_MC_IF_FCW_IM() { 10811 10811 IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */); 10812 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10812 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 10813 10813 } IEM_MC_ELSE() { 10814 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10814 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 10815 10815 } IEM_MC_ENDIF(); 10816 10816 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 10844 10844 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 10845 10845 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i32, pu16Fsw, pi32Dst, pr80Value); 10846 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi32Dst,bUnmapInfo, u16Fsw);10846 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 10847 10847 IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 10848 10848 } IEM_MC_ELSE() { 10849 10849 IEM_MC_IF_FCW_IM() { 10850 10850 IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */); 10851 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10851 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 10852 10852 } IEM_MC_ELSE() { 10853 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10853 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 10854 10854 } IEM_MC_ENDIF(); 10855 10855 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 10883 10883 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 10884 10884 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i32, pu16Fsw, pi32Dst, pr80Value); 10885 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi32Dst,bUnmapInfo, u16Fsw);10885 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 10886 10886 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 10887 10887 } IEM_MC_ELSE() { 10888 10888 IEM_MC_IF_FCW_IM() { 10889 10889 IEM_MC_STORE_MEM_I32_CONST_BY_REF(pi32Dst, INT32_MIN /* (integer indefinite) */); 10890 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10890 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 10891 10891 } IEM_MC_ELSE() { 10892 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi32Dst,bUnmapInfo);10892 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 10893 10893 } IEM_MC_ENDIF(); 10894 10894 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 10954 10954 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 10955 10955 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r80, pu16Fsw, pr80Dst, pr80Value); 10956 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pr80Dst,bUnmapInfo, u16Fsw);10956 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 10957 10957 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 10958 10958 } IEM_MC_ELSE() { 10959 10959 IEM_MC_IF_FCW_IM() { 10960 10960 IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(pr80Dst); 10961 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pr80Dst,bUnmapInfo);10961 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 10962 10962 } IEM_MC_ELSE() { 10963 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pr80Dst,bUnmapInfo);10963 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 10964 10964 } IEM_MC_ENDIF(); 10965 10965 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 11548 11548 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 11549 11549 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i64, pu16Fsw, pi64Dst, pr80Value); 11550 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi64Dst,bUnmapInfo, u16Fsw);11550 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 11551 11551 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 11552 11552 } IEM_MC_ELSE() { 11553 11553 IEM_MC_IF_FCW_IM() { 11554 11554 IEM_MC_STORE_MEM_I64_CONST_BY_REF(pi64Dst, INT64_MIN /* (integer indefinite) */); 11555 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi64Dst,bUnmapInfo);11555 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 11556 11556 } IEM_MC_ELSE() { 11557 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi64Dst,bUnmapInfo);11557 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 11558 11558 } IEM_MC_ENDIF(); 11559 11559 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 11587 11587 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 11588 11588 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r64, pu16Fsw, pr64Dst, pr80Value); 11589 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pr64Dst,bUnmapInfo, u16Fsw);11589 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 11590 11590 IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 11591 11591 } IEM_MC_ELSE() { 11592 11592 IEM_MC_IF_FCW_IM() { 11593 11593 IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(pr64Dst); 11594 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pr64Dst,bUnmapInfo);11594 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 11595 11595 } IEM_MC_ELSE() { 11596 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pr64Dst,bUnmapInfo);11596 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 11597 11597 } IEM_MC_ENDIF(); 11598 11598 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 11628 11628 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 11629 11629 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_r64, pu16Fsw, pr64Dst, pr80Value); 11630 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pr64Dst,bUnmapInfo, u16Fsw);11630 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 11631 11631 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 11632 11632 } IEM_MC_ELSE() { 11633 11633 IEM_MC_IF_FCW_IM() { 11634 11634 IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(pr64Dst); 11635 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pr64Dst,bUnmapInfo);11635 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 11636 11636 } IEM_MC_ELSE() { 11637 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pr64Dst,bUnmapInfo);11637 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 11638 11638 } IEM_MC_ENDIF(); 11639 11639 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 12168 12168 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 12169 12169 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fistt_r80_to_i16, pu16Fsw, pi16Dst, pr80Value); 12170 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi16Dst,bUnmapInfo, u16Fsw);12170 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 12171 12171 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 12172 12172 } IEM_MC_ELSE() { 12173 12173 IEM_MC_IF_FCW_IM() { 12174 12174 IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */); 12175 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12175 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 12176 12176 } IEM_MC_ELSE() { 12177 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12177 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 12178 12178 } IEM_MC_ENDIF(); 12179 12179 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 12207 12207 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 12208 12208 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i16, pu16Fsw, pi16Dst, pr80Value); 12209 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi16Dst,bUnmapInfo, u16Fsw);12209 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 12210 12210 IEM_MC_UPDATE_FSW_WITH_MEM_OP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 12211 12211 } IEM_MC_ELSE() { 12212 12212 IEM_MC_IF_FCW_IM() { 12213 12213 IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */); 12214 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12214 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 12215 12215 } IEM_MC_ELSE() { 12216 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12216 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 12217 12217 } IEM_MC_ENDIF(); 12218 12218 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 12246 12246 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 12247 12247 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i16, pu16Fsw, pi16Dst, pr80Value); 12248 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi16Dst,bUnmapInfo, u16Fsw);12248 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 12249 12249 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 12250 12250 } IEM_MC_ELSE() { 12251 12251 IEM_MC_IF_FCW_IM() { 12252 12252 IEM_MC_STORE_MEM_I16_CONST_BY_REF(pi16Dst, INT16_MIN /* (integer indefinite) */); 12253 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12253 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 12254 12254 } IEM_MC_ELSE() { 12255 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi16Dst,bUnmapInfo);12255 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 12256 12256 } IEM_MC_ENDIF(); 12257 12257 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 12349 12349 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 12350 12350 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fst_r80_to_d80, pu16Fsw, pd80Dst, pr80Value); 12351 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pd80Dst,bUnmapInfo, u16Fsw);12351 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 12352 12352 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 12353 12353 } IEM_MC_ELSE() { 12354 12354 IEM_MC_IF_FCW_IM() { 12355 12355 IEM_MC_STORE_MEM_INDEF_D80_BY_REF(pd80Dst); 12356 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pd80Dst,bUnmapInfo);12356 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 12357 12357 } IEM_MC_ELSE() { 12358 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pd80Dst,bUnmapInfo);12358 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 12359 12359 } IEM_MC_ENDIF(); 12360 12360 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 12388 12388 IEM_MC_ARG_LOCAL_REF(uint16_t *,pu16Fsw, u16Fsw, 0); 12389 12389 IEM_MC_CALL_FPU_AIMPL_3(iemAImpl_fist_r80_to_i64, pu16Fsw, pi64Dst, pr80Value); 12390 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO( pi64Dst,bUnmapInfo, u16Fsw);12390 IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(bUnmapInfo, u16Fsw); 12391 12391 IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(u16Fsw, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); 12392 12392 } IEM_MC_ELSE() { 12393 12393 IEM_MC_IF_FCW_IM() { 12394 12394 IEM_MC_STORE_MEM_I64_CONST_BY_REF(pi64Dst, INT64_MIN /* (integer indefinite) */); 12395 IEM_MC_MEM_COMMIT_AND_UNMAP_WO( pi64Dst,bUnmapInfo);12395 IEM_MC_MEM_COMMIT_AND_UNMAP_WO(bUnmapInfo); 12396 12396 } IEM_MC_ELSE() { 12397 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO( pi64Dst,bUnmapInfo);12397 IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(bUnmapInfo); 12398 12398 } IEM_MC_ENDIF(); 12399 12399 IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(UINT8_MAX, pVCpu->iem.s.iEffSeg, GCPtrEffDst, pVCpu->iem.s.uFpuOpcode); … … 13015 13015 IEM_MC_CALL_VOID_AIMPL_2(a_fnNormalU8, pu8Dst, pEFlags); \ 13016 13016 \ 13017 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo); \13017 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13018 13018 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13019 13019 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13034 13034 IEM_MC_CALL_VOID_AIMPL_2(a_fnLockedU8, pu8Dst, pEFlags); \ 13035 13035 \ 13036 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo); \13036 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13037 13037 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13038 13038 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13116 13116 IEM_MC_CALL_VOID_AIMPL_2(a_fnNormalU16, pu16Dst, pEFlags); \ 13117 13117 \ 13118 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \13118 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13119 13119 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13120 13120 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13135 13135 IEM_MC_CALL_VOID_AIMPL_2(a_fnNormalU32, pu32Dst, pEFlags); \ 13136 13136 \ 13137 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \13137 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13138 13138 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13139 13139 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13154 13154 IEM_MC_CALL_VOID_AIMPL_2(a_fnNormalU64, pu64Dst, pEFlags); \ 13155 13155 \ 13156 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \13156 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13157 13157 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13158 13158 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13183 13183 IEM_MC_CALL_VOID_AIMPL_2(a_fnLockedU16, pu16Dst, pEFlags); \ 13184 13184 \ 13185 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \13185 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13186 13186 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13187 13187 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13202 13202 IEM_MC_CALL_VOID_AIMPL_2(a_fnLockedU32, pu32Dst, pEFlags); \ 13203 13203 \ 13204 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \13204 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13205 13205 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13206 13206 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13221 13221 IEM_MC_CALL_VOID_AIMPL_2(a_fnLockedU64, pu64Dst, pEFlags); \ 13222 13222 \ 13223 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \13223 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 13224 13224 IEM_MC_COMMIT_EFLAGS(EFlags); \ 13225 13225 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 13278 13278 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u8, pu8Dst, u8Src, pEFlags); 13279 13279 13280 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu8Dst,bUnmapInfo);13280 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); 13281 13281 IEM_MC_COMMIT_EFLAGS(EFlags); 13282 13282 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 13644 13644 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u16, pu16Dst, u16Src, pEFlags); 13645 13645 13646 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo);13646 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); 13647 13647 IEM_MC_COMMIT_EFLAGS(EFlags); 13648 13648 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 13667 13667 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u32, pu32Dst, u32Src, pEFlags); 13668 13668 13669 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo);13669 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); 13670 13670 IEM_MC_COMMIT_EFLAGS(EFlags); 13671 13671 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 13690 13690 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_test_u64, pu64Dst, u64Src, pEFlags); 13691 13691 13692 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo);13692 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); 13693 13693 IEM_MC_COMMIT_EFLAGS(EFlags); 13694 13694 IEM_MC_ADVANCE_RIP_AND_FINISH(); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
r102430 r102433 9052 9052 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 9053 9053 \ 9054 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \9054 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9055 9055 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9056 9056 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9080 9080 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 9081 9081 \ 9082 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \9082 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9083 9083 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9084 9084 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9108 9108 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 9109 9109 \ 9110 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \9110 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9111 9111 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9112 9112 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9146 9146 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 9147 9147 \ 9148 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \9148 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9149 9149 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9150 9150 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9174 9174 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 9175 9175 \ 9176 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \9176 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9177 9177 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9178 9178 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9202 9202 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 9203 9203 \ 9204 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \9204 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 9205 9205 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9206 9206 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9308 9308 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 9309 9309 \ 9310 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo); \9310 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 9311 9311 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9312 9312 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9336 9336 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 9337 9337 \ 9338 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo); \9338 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 9339 9339 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9340 9340 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9364 9364 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 9365 9365 \ 9366 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo); \9366 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 9367 9367 IEM_MC_COMMIT_EFLAGS(EFlags); \ 9368 9368 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 9483 9483 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags); 9484 9484 9485 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);9485 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9486 9486 IEM_MC_COMMIT_EFLAGS(EFlags); 9487 9487 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9508 9508 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags); 9509 9509 9510 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);9510 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9511 9511 IEM_MC_COMMIT_EFLAGS(EFlags); 9512 9512 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9534 9534 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags); 9535 9535 9536 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);9536 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9537 9537 IEM_MC_COMMIT_EFLAGS(EFlags); 9538 9538 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9637 9637 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU16, pu16Dst, u16Src, cShiftArg, pEFlags); 9638 9638 9639 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);9639 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9640 9640 IEM_MC_COMMIT_EFLAGS(EFlags); 9641 9641 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9660 9660 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU32, pu32Dst, u32Src, cShiftArg, pEFlags); 9661 9661 9662 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);9662 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9663 9663 IEM_MC_COMMIT_EFLAGS(EFlags); 9664 9664 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 9683 9683 IEM_MC_CALL_VOID_AIMPL_4(pImpl->pfnNormalU64, pu64Dst, u64Src, cShiftArg, pEFlags); 9684 9684 9685 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);9685 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 9686 9686 IEM_MC_COMMIT_EFLAGS(EFlags); 9687 9687 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 10281 10281 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u8_locked, pu8Dst, pu8Al, u8Src, pEFlags); 10282 10282 10283 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo);10283 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 10284 10284 IEM_MC_COMMIT_EFLAGS(EFlags); 10285 10285 IEM_MC_STORE_GREG_U8(X86_GREG_xAX, u8Al); … … 10416 10416 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u16_locked, pu16Dst, pu16Ax, u16Src, pEFlags); 10417 10417 10418 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);10418 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 10419 10419 IEM_MC_COMMIT_EFLAGS(EFlags); 10420 10420 IEM_MC_STORE_GREG_U16(X86_GREG_xAX, u16Ax); … … 10447 10447 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg_u32_locked, pu32Dst, pu32Eax, u32Src, pEFlags); 10448 10448 10449 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);10449 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 10450 10450 IEM_MC_COMMIT_EFLAGS(EFlags); 10451 10451 … … 10494 10494 #endif 10495 10495 10496 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);10496 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 10497 10497 IEM_MC_COMMIT_EFLAGS(EFlags); 10498 10498 IEM_MC_STORE_GREG_U64(X86_GREG_xAX, u64Rax); … … 10851 10851 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 10852 10852 \ 10853 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \10853 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10854 10854 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10855 10855 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10874 10874 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 10875 10875 \ 10876 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \10876 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10877 10877 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10878 10878 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10897 10897 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 10898 10898 \ 10899 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \10899 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10900 10900 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10901 10901 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10930 10930 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU16, pu16Dst, u16Src, pEFlags); \ 10931 10931 \ 10932 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo); \10932 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10933 10933 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10934 10934 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10953 10953 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU32, pu32Dst, u32Src, pEFlags); \ 10954 10954 \ 10955 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo); \10955 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10956 10956 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10957 10957 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 10976 10976 IEM_MC_CALL_VOID_AIMPL_3(a_fnLockedU64, pu64Dst, u64Src, pEFlags); \ 10977 10977 \ 10978 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo); \10978 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 10979 10979 IEM_MC_COMMIT_EFLAGS(EFlags); \ 10980 10980 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11072 11072 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \ 11073 11073 \ 11074 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu16Dst,bUnmapInfo); \11074 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 11075 11075 IEM_MC_COMMIT_EFLAGS(EFlags); \ 11076 11076 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11095 11095 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \ 11096 11096 \ 11097 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu32Dst,bUnmapInfo); \11097 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 11098 11098 IEM_MC_COMMIT_EFLAGS(EFlags); \ 11099 11099 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11118 11118 IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \ 11119 11119 \ 11120 IEM_MC_MEM_COMMIT_AND_UNMAP_RO( pu64Dst,bUnmapInfo); \11120 IEM_MC_MEM_COMMIT_AND_UNMAP_RO(bUnmapInfo); \ 11121 11121 IEM_MC_COMMIT_EFLAGS(EFlags); \ 11122 11122 IEM_MC_ADVANCE_RIP_AND_FINISH(); \ … … 11638 11638 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u8_locked, pu8Dst, pu8Reg, pEFlags); 11639 11639 11640 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu8Dst,bUnmapInfo);11640 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 11641 11641 IEM_MC_COMMIT_EFLAGS(EFlags); 11642 11642 IEM_MC_STORE_GREG_U8(IEM_GET_MODRM_REG(pVCpu, bRm), u8RegCopy); … … 11742 11742 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u16_locked, pu16Dst, pu16Reg, pEFlags); 11743 11743 11744 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu16Dst,bUnmapInfo);11744 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 11745 11745 IEM_MC_COMMIT_EFLAGS(EFlags); 11746 11746 IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16RegCopy); … … 11770 11770 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u32_locked, pu32Dst, pu32Reg, pEFlags); 11771 11771 11772 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu32Dst,bUnmapInfo);11772 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 11773 11773 IEM_MC_COMMIT_EFLAGS(EFlags); 11774 11774 IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32RegCopy); … … 11798 11798 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_xadd_u64_locked, pu64Dst, pu64Reg, pEFlags); 11799 11799 11800 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64Dst,bUnmapInfo);11800 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 11801 11801 IEM_MC_COMMIT_EFLAGS(EFlags); 11802 11802 IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64RegCopy); … … 12459 12459 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpxchg8b, pu64MemDst, pu64EaxEdx, pu64EbxEcx, pEFlags); 12460 12460 12461 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu64MemDst,bUnmapInfo);12461 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); 12462 12462 IEM_MC_COMMIT_EFLAGS(EFlags); 12463 12463 IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_ZF) { … … 12504 12504 12505 12505 #define BODY_CMPXCHG16B_TAIL \ 12506 IEM_MC_MEM_COMMIT_AND_UNMAP_RW( pu128MemDst,bUnmapInfo); \12506 IEM_MC_MEM_COMMIT_AND_UNMAP_RW(bUnmapInfo); \ 12507 12507 IEM_MC_COMMIT_EFLAGS(EFlags); \ 12508 12508 IEM_MC_IF_EFL_BIT_NOT_SET(X86_EFL_ZF) { \ -
trunk/src/VBox/VMM/include/IEMMc.h
r102430 r102433 2266 2266 */ 2267 2267 #ifndef IEM_WITH_SETJMP 2268 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_ pvMem, a_bMapInfo)IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo))2269 #else 2270 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_ pvMem, a_bMapInfo)iemMemCommitAndUnmapRwJmp(pVCpu, (a_bMapInfo))2268 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo)) 2269 #else 2270 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) iemMemCommitAndUnmapRwJmp(pVCpu, (a_bMapInfo)) 2271 2271 #endif 2272 2272 … … 2275 2275 */ 2276 2276 #ifndef IEM_WITH_SETJMP 2277 # define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_ pvMem, a_bMapInfo)IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo))2278 #else 2279 # define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_ pvMem, a_bMapInfo)iemMemCommitAndUnmapWoJmp(pVCpu, (a_bMapInfo))2277 # define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo)) 2278 #else 2279 # define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) iemMemCommitAndUnmapWoJmp(pVCpu, (a_bMapInfo)) 2280 2280 #endif 2281 2281 … … 2284 2284 */ 2285 2285 #ifndef IEM_WITH_SETJMP 2286 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_ pvMem, a_bMapInfo)IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo))2287 #else 2288 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_ pvMem, a_bMapInfo)iemMemCommitAndUnmapRoJmp(pVCpu, (a_bMapInfo))2286 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) IEM_MC_RETURN_ON_FAILURE(iemMemCommitAndUnmap(pVCpu, a_bMapInfo)) 2287 #else 2288 # define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) iemMemCommitAndUnmapRoJmp(pVCpu, (a_bMapInfo)) 2289 2289 #endif 2290 2290 … … 2300 2300 */ 2301 2301 #ifndef IEM_WITH_SETJMP 2302 # define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_ pvMem, a_bMapInfo, a_u16FSW) do { \2302 # define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) do { \ 2303 2303 if ( !(a_u16FSW & X86_FSW_ES) \ 2304 2304 || !( (a_u16FSW & (X86_FSW_UE | X86_FSW_OE | X86_FSW_IE)) \ … … 2309 2309 } while (0) 2310 2310 #else 2311 # define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_ pvMem, a_bMapInfo, a_u16FSW) do { \2311 # define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) do { \ 2312 2312 if ( !(a_u16FSW & X86_FSW_ES) \ 2313 2313 || !( (a_u16FSW & (X86_FSW_UE | X86_FSW_OE | X86_FSW_IE)) \ … … 2321 2321 /** Rolls back (conceptually only, assumes no writes) and unmaps the guest memory. */ 2322 2322 #ifndef IEM_WITH_SETJMP 2323 # define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_pvMem, a_bMapInfo) \ 2324 iemMemRollbackAndUnmap(pVCpu, a_bMapInfo) 2325 #else 2326 # define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_pvMem, a_bMapInfo) \ 2327 iemMemRollbackAndUnmapWo(pVCpu, a_bMapInfo) 2323 # define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) iemMemRollbackAndUnmap(pVCpu, a_bMapInfo) 2324 #else 2325 # define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) iemMemRollbackAndUnmapWo(pVCpu, a_bMapInfo) 2328 2326 #endif 2329 2327 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r102429 r102433 953 953 #define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) do { CHK_VAR(a_pu128Mem); (a_pu128Mem) = NULL; CHK_PTYPE(RTUINT128U *, a_pu128Mem); CHK_VAR(a_bUnmapInfo); CHK_TYPE(uint8_t, a_bUnmapInfo); a_bUnmapInfo = 1; CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_SEG_IDX(a_iSeg); (void)fMcBegin; } while (0) 954 954 955 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_ pvMem, a_bMapInfo) do { CHK_VAR(a_pvMem);CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0)956 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_ pvMem, a_bMapInfo) do { CHK_VAR(a_pvMem);CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0)957 #define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_ pvMem, a_bMapInfo) do { CHK_VAR(a_pvMem);CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0)958 #define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_ pvMem, a_bMapInfo) do { CHK_VAR(a_pvMem);CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0)959 #define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_ pvMem, a_bMapInfo, a_u16FSW) do { CHK_VAR(a_pvMem);CHK_VAR(a_bMapInfo); CHK_VAR(a_u16FSW); (void)fMcBegin; } while (0)955 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) do { CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0) 956 #define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) do { CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0) 957 #define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) do { CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0) 958 #define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) do { CHK_VAR(a_bMapInfo); CHK_TYPE(uint8_t, a_bMapInfo); (void)fMcBegin; } while (0) 959 #define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) do { CHK_VAR(a_bMapInfo); CHK_VAR(a_u16FSW); (void)fMcBegin; } while (0) 960 960 961 961 #define IEM_MC_CALC_RM_EFF_ADDR(a_GCPtrEff, a_bRm, a_cbImmAndRspOffset) do { (a_GCPtrEff) = 0; CHK_GCPTR(a_GCPtrEff); (void)fMcBegin; } while (0)
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