VirtualBox

Changeset 102436 in vbox for trunk/src/VBox/VMM/include


Ignore:
Timestamp:
Dec 2, 2023 10:09:36 PM (17 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
160579
Message:

VMM/IEM: U8 mem map MCs. bugref:10371

Location:
trunk/src/VBox/VMM/include
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

    r102394 r102436  
    817817DECLHIDDEN(void)            iemNativeRegFreeTmp(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
    818818DECLHIDDEN(void)            iemNativeRegFreeTmpImm(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
     819DECLHIDDEN(void)            iemNativeRegFreeVar(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg, bool fFlushShadows) RT_NOEXCEPT;
    819820DECLHIDDEN(void)            iemNativeRegFreeAndFlushMask(PIEMRECOMPILERSTATE pReNative, uint32_t fHstRegMask) RT_NOEXCEPT;
    820821DECL_HIDDEN_THROW(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off);
     822
     823DECL_HIDDEN_THROW(uint8_t)  iemNativeVarGetStackSlot(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar);
    821824
    822825DECL_HIDDEN_THROW(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,

  • trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

    r102394 r102436  
    6565        pbCodeBuf[off++] = RT_BYTE4(uInfo);
    6666    }
    67 #elif RT_ARCH_ARM64
     67#elif defined(RT_ARCH_ARM64)
    6868    /* nop */
    6969    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    7373#else
    7474# error "port me"
     75#endif
     76    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
     77    return off;
     78}
     79
     80
     81/**
     82 * Emit a breakpoint instruction.
     83 */
     84DECL_INLINE_THROW(uint32_t) iemNativeEmitBrk(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t uInfo)
     85{
     86#ifdef RT_ARCH_AMD64
     87    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
     88    pbCodeBuf[off++] = 0xcc;
     89    RT_NOREF(uInfo);
     90
     91#elif defined(RT_ARCH_ARM64)
     92    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
     93    pu32CodeBuf[off++] = Armv8A64MkInstrBrk(uInfo & UINT32_C(0xffff));
     94
     95#else
     96# error "error"
    7597#endif
    7698    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    … …  
    97119    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iGpr & 7, iGpr & 7);
    98120
    99 #elif RT_ARCH_ARM64
     121#elif defined(RT_ARCH_ARM64)
    100122    /* mov gpr, #0x0 */
    101123    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    151173    }
    152174
    153 #elif RT_ARCH_ARM64
     175#elif defined(RT_ARCH_ARM64)
    154176    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
    155177
    … …  
    223245    pbCodeBuf[off++] = RT_BYTE1(uImm8);
    224246
    225 #elif RT_ARCH_ARM64
     247#elif defined(RT_ARCH_ARM64)
    226248    /* movz gpr, imm16, lsl #0 */
    227249    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    258280    return off;
    259281}
    260 #elif RT_ARCH_ARM64
     282#elif defined(RT_ARCH_ARM64)
    261283/**
    262284 * Common bit of iemNativeEmitLoadGprFromVCpuU64 and friends.
    … …  
    317339    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    318340
    319 #elif RT_ARCH_ARM64
     341#elif defined(RT_ARCH_ARM64)
    320342    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_Ld_Dword, sizeof(uint64_t));
    321343
    … …  
    343365    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    344366
    345 #elif RT_ARCH_ARM64
     367#elif defined(RT_ARCH_ARM64)
    346368    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_Ld_Word, sizeof(uint32_t));
    347369
    … …  
    370392    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    371393
    372 #elif RT_ARCH_ARM64
     394#elif defined(RT_ARCH_ARM64)
    373395    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_Ld_Half, sizeof(uint16_t));
    374396
    … …  
    397419    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    398420
    399 #elif RT_ARCH_ARM64
     421#elif defined(RT_ARCH_ARM64)
    400422    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_Ld_Byte, sizeof(uint8_t));
    401423
    … …  
    424446    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    425447
    426 #elif RT_ARCH_ARM64
     448#elif defined(RT_ARCH_ARM64)
    427449    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_St_Dword, sizeof(uint64_t));
    428450
    … …  
    449471    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    450472
    451 #elif RT_ARCH_ARM64
     473#elif defined(RT_ARCH_ARM64)
    452474    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_St_Word, sizeof(uint32_t));
    453475
    … …  
    475497    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    476498
    477 #elif RT_ARCH_ARM64
     499#elif defined(RT_ARCH_ARM64)
    478500    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_St_Half, sizeof(uint16_t));
    479501
    … …  
    500522    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    501523
    502 #elif RT_ARCH_ARM64
     524#elif defined(RT_ARCH_ARM64)
    503525    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, iGpr, offVCpu, kArmv8A64InstrLdStType_St_Byte, sizeof(uint8_t));
    504526
    … …  
    524546    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    525547
    526 #elif RT_ARCH_ARM64
     548#elif defined(RT_ARCH_ARM64)
    527549    /* Cannot use IEMNATIVE_REG_FIXED_TMP0 for the immediate as that's used by iemNativeEmitGprByVCpuLdSt. */
    528550    uint8_t const idxRegImm = iemNativeRegAllocTmpImm(pReNative, &off, bImm);
    … …  
    599621    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iGprDst & 7, iGprSrc & 7);
    600622
    601 #elif RT_ARCH_ARM64
     623#elif defined(RT_ARCH_ARM64)
    602624    /* mov dst, src;   alias for: orr dst, xzr, src */
    603625    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    629651    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iGprDst & 7, iGprSrc & 7);
    630652
    631 #elif RT_ARCH_ARM64
     653#elif defined(RT_ARCH_ARM64)
    632654    /* mov dst32, src32;   alias for: orr dst32, wzr, src32 */
    633655    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    660682    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iGprDst & 7, iGprSrc & 7);
    661683
    662 #elif RT_ARCH_ARM64
     684#elif defined(RT_ARCH_ARM64)
    663685    /* and gprdst, gprsrc, #0xffff */
    664686    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    699721    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iGprDst & 7, iGprSrc & 7);
    700722
    701 #elif RT_ARCH_ARM64
     723#elif defined(RT_ARCH_ARM64)
    702724    /* and gprdst, gprsrc, #0xff */
    703725    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    744766    pbCodeBuf[off++] = 8;
    745767
    746 #elif RT_ARCH_ARM64
     768#elif defined(RT_ARCH_ARM64)
    747769    /* ubfx gprdst, gprsrc, #8, #8 - gprdst = gprsrc[15:8] */
    748770    uint32_t * const pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    … …  
    790812    }
    791813
    792 #elif RT_ARCH_ARM64
     814#elif defined(RT_ARCH_ARM64)
    793815    if ((uint32_t)iAddend < 4096)
    794816    {
    … …  
    11511173    return off;
    11521174}
    1153 #elif RT_ARCH_ARM64
     1175#elif defined(RT_ARCH_ARM64)
    11541176/**
    11551177 * Common bit of iemNativeEmitLoadGprFromVCpuU64 and friends.
    … …  
    12021224    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    12031225
    1204 #elif RT_ARCH_ARM64
     1226#elif defined(RT_ARCH_ARM64)
    12051227    off = iemNativeEmitGprByGprLdSt(pReNative, off, iGprDst, iGprBase, offDisp, kArmv8A64InstrLdStType_Ld_Dword, sizeof(uint64_t));
    12061228
    … …  
    12281250    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
    12291251
    1230 #elif RT_ARCH_ARM64
     1252#elif defined(RT_ARCH_ARM64)
    12311253    off = iemNativeEmitGprByGprLdSt(pReNative, off, iGprDst, iGprBase, offDisp, kArmv8A64InstrLdStType_Ld_Word, sizeof(uint32_t));
    12321254
    … …  
    15821604#elif defined(RT_ARCH_ARM64)
    15831605    uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
    1584     if (fSetFlags)
     1606    if (!fSetFlags)
    15851607        pu32CodeBuf[off++] = Armv8A64MkInstrAnd(iGprDst, iGprDst, iGprSrc, false /*f64Bit*/);
    15861608    else
    … …  
    26742696
    26752697/**
     2698 * Emits a test for any of the bits from @a fBits in the lower 8 bits of
     2699 * @a iGprSrc, setting CPU flags accordingly.
     2700 */
     2701DECL_INLINE_THROW(uint32_t)
     2702iemNativeEmitTestAnyBitsInGpr8(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint8_t fBits)
     2703{
     2704    Assert(fBits != 0);
     2705
     2706#ifdef RT_ARCH_AMD64
     2707    /* test Eb, imm8 */
     2708    uint8_t * const pbCodeBuf = iemNativeInstrBufEnsure(pReNative, off, 4);
     2709    if (iGprSrc >= 4)
     2710        pbCodeBuf[off++] = iGprSrc >= 8 ? X86_OP_REX_B : X86_OP_REX;
     2711    pbCodeBuf[off++] = 0xf6;
     2712    pbCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, 0, iGprSrc & 7);
     2713    pbCodeBuf[off++] = fBits;
     2714
     2715#elif defined(RT_ARCH_ARM64)
     2716
     2717    /* ands xzr, src, [tmp|#imm] */
     2718    uint32_t uImmR     = 0;
     2719    uint32_t uImmNandS = 0;
     2720    if (Armv8A64ConvertMask32ToImmRImmS(uImm, &uImmNandS, &uImmR))
     2721    {
     2722        uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
     2723        pu32CodeBuf[off++] = Armv8A64MkInstrAndsImm(ARMV8_A64_REG_XZR, iGprDst, uImmNandS, uImmR, false /*f64Bit*/);
     2724    }
     2725    else
     2726    {
     2727        /* Use temporary register for the 64-bit immediate. */
     2728        uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
     2729        uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
     2730        pu32CodeBuf[off++] = Armv8A64MkInstrAnds(ARMV8_A64_REG_XZR, iGprSrc, iTmpReg, false /*f64Bit*/);
     2731        iemNativeRegFreeTmpImm(pReNative, iTmpReg);
     2732    }
     2733
     2734#else
     2735# error "Port me!"
     2736#endif
     2737    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
     2738    return off;
     2739}
     2740
     2741
     2742/**
    26762743 * Emits a jump to @a idxLabel on the condition _any_ of the bits in @a fBits
    26772744 * are set in @a iGprSrc.
    … …  
    28382905
    28392906
     2907/*********************************************************************************************************************************
     2908*   Calls.                                                                                                                       *
     2909*********************************************************************************************************************************/
    28402910
    28412911/**
    … …  
    28662936
    28672937
     2938/**
     2939 * Emits code to load a stack variable into an argument GPR.
     2940 * @throws VERR_IEM_VAR_NOT_INITIALIZED, VERR_IEM_VAR_UNEXPECTED_KIND
     2941 */
     2942DECL_FORCE_INLINE_THROW(uint32_t)
     2943iemNativeEmitLoadArgGregFromStackVar(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxRegArg, uint8_t idxVar,
     2944                                     int32_t offAddend = 0)
     2945{
     2946    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVar);
     2947    AssertStmt(pReNative->Core.aVars[idxVar].enmKind == kIemNativeVarKind_Stack,
     2948               IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_UNEXPECTED_KIND));
     2949
     2950    uint8_t const idxRegVar = pReNative->Core.aVars[idxVar].idxReg;
     2951    if (idxRegVar < RT_ELEMENTS(pReNative->Core.aHstRegs))
     2952    {
     2953        Assert(!(RT_BIT_32(idxRegVar) & IEMNATIVE_CALL_VOLATILE_GREG_MASK));
     2954        if (!offAddend)
     2955            off = iemNativeEmitLoadGprFromGpr(pReNative, off, idxRegArg, idxRegVar);
     2956        else
     2957            off = iemNativeEmitLoadGprFromGprWithAddend(pReNative, off, idxRegArg, idxRegVar, offAddend);
     2958    }
     2959    else
     2960    {
     2961        uint8_t const idxStackSlot = pReNative->Core.aVars[idxVar].idxStackSlot;
     2962        AssertStmt(idxStackSlot != UINT8_MAX, IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_NOT_INITIALIZED));
     2963        off = iemNativeEmitLoadGprByBp(pReNative, off, idxRegArg, iemNativeStackCalcBpDisp(idxStackSlot));
     2964        if (offAddend)
     2965            off = iemNativeEmitAddGprImm(pReNative, off, idxRegArg, offAddend);
     2966    }
     2967    return off;
     2968}
     2969
     2970
     2971/**
     2972 * Emits code to load a stack or immediate variable value into an argument GPR,
     2973 * optional with a addend.
     2974 * @throws VERR_IEM_VAR_NOT_INITIALIZED, VERR_IEM_VAR_UNEXPECTED_KIND
     2975 */
     2976DECL_FORCE_INLINE_THROW(uint32_t)
     2977iemNativeEmitLoadArgGregFromImmOrStackVar(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxRegArg, uint8_t idxVar,
     2978                                          int32_t offAddend = 0)
     2979{
     2980    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVar);
     2981    if (pReNative->Core.aVars[idxVar].enmKind == kIemNativeVarKind_Immediate)
     2982        off = iemNativeEmitLoadGprImm64(pReNative, off, idxRegArg, pReNative->Core.aVars[idxVar].u.uValue + offAddend);
     2983    else
     2984        off = iemNativeEmitLoadArgGregFromStackVar(pReNative, off, idxRegArg, idxVar, offAddend);
     2985    return off;
     2986}
     2987
     2988
     2989/**
     2990 * Emits code to load the variable address into an argument GRP.
     2991 *
     2992 * This only works for uninitialized and stack variables.
     2993 */
     2994DECL_FORCE_INLINE_THROW(uint32_t)
     2995iemNativeEmitLoadArgGregWithVarAddr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxRegArg, uint8_t idxVar,
     2996                                    bool fFlushShadows)
     2997{
     2998    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVar);
     2999    AssertStmt(   pReNative->Core.aVars[idxVar].enmKind == kIemNativeVarKind_Invalid
     3000               || pReNative->Core.aVars[idxVar].enmKind == kIemNativeVarKind_Stack,
     3001               IEMNATIVE_DO_LONGJMP(pReNative, VERR_IEM_VAR_UNEXPECTED_KIND));
     3002
     3003    uint8_t const idxStackSlot   = iemNativeVarGetStackSlot(pReNative, idxVar);
     3004    int32_t const offBpDisp      = iemNativeStackCalcBpDisp(idxStackSlot);
     3005
     3006    uint8_t const idxRegVar      = pReNative->Core.aVars[idxVar].idxReg;
     3007    if (idxRegVar < RT_ELEMENTS(pReNative->Core.aHstRegs))
     3008    {
     3009        off = iemNativeEmitStoreGprByBp(pReNative, off, offBpDisp, idxRegVar);
     3010        iemNativeRegFreeVar(pReNative, idxRegVar, fFlushShadows);
     3011        Assert(pReNative->Core.aVars[idxVar].idxReg == UINT8_MAX);
     3012    }
     3013    Assert(   pReNative->Core.aVars[idxVar].idxStackSlot != UINT8_MAX
     3014           && pReNative->Core.aVars[idxVar].idxReg       == UINT8_MAX);
     3015
     3016    return iemNativeEmitLeaGprByBp(pReNative, off, idxRegArg, offBpDisp);
     3017}
     3018
     3019
    28683020/** @} */
    28693021
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