Changeset 102512 in vbox for trunk/src

Timestamp:

Dec 7, 2023 8:43:12 AM (14 months ago)

Author:

vboxsync

Message:

VMM/IEM: Arm build fix. Fixed jumps in EFLAGS VBOX_STRICT code so they work on arm as well (correct fixed jumps in general to behave the similarly on both targets). bugref:10371

File:

• trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h (modified) (7 diffs)

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -2663 +2663 @@
 /**
  * Emits a Jcc rel32 / B.cc imm19 with a fixed displacement.
- * How @a offJmp is applied is are target specific.
+ *
+ * The @a offTarget is applied x86-style, so zero means the next instruction.
+ * The unit is IEMNATIVEINSTR.
  */
 DECL_INLINE_THROW(uint32_t)
@@ -2688 +2690 @@
 #elif defined(RT_ARCH_ARM64)
     uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-    pu32CodeBuf[off++] = Armv8A64MkInstrBCond(enmCond, offTarget);
+    pu32CodeBuf[off++] = Armv8A64MkInstrBCond(enmCond, offTarget + 1);
 
 #else
@@ -2700 +2702 @@
 /**
  * Emits a JZ/JE rel32 / B.EQ imm19 with a fixed displacement.
- * How @a offJmp is applied is are target specific.
+ *
+ * The @a offTarget is applied x86-style, so zero means the next instruction.
+ * The unit is IEMNATIVEINSTR.
  */
 DECL_INLINE_THROW(uint32_t) iemNativeEmitJzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
@@ -2716 +2720 @@
 /**
  * Emits a JNZ/JNE rel32 / B.NE imm19 with a fixed displacement.
- * How @a offJmp is applied is are target specific.
+ *
+ * The @a offTarget is applied x86-style, so zero means the next instruction.
+ * The unit is IEMNATIVEINSTR.
  */
 DECL_INLINE_THROW(uint32_t) iemNativeEmitJnzToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
@@ -2732 +2738 @@
 /**
  * Emits a JBE/JNA rel32 / B.LS imm19 with a fixed displacement.
- * How @a offJmp is applied is are target specific.
+ *
+ * The @a offTarget is applied x86-style, so zero means the next instruction.
+ * The unit is IEMNATIVEINSTR.
  */
 DECL_INLINE_THROW(uint32_t) iemNativeEmitJbeToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
@@ -2748 +2756 @@
 /**
  * Emits a JA/JNBE rel32 / B.EQ imm19 with a fixed displacement.
- * How @a offJmp is applied is are target specific.
+ *
+ * The @a offTarget is applied x86-style, so zero means the next instruction.
+ * The unit is IEMNATIVEINSTR.
  */
 DECL_INLINE_THROW(uint32_t) iemNativeEmitJaToFixed(PIEMRECOMPILERSTATE pReNative, uint32_t off, int32_t offTarget)
@@ -2970 +2980 @@
     uint32_t uImmR     = 0;
     uint32_t uImmNandS = 0;
-    if (Armv8A64ConvertMask32ToImmRImmS(uImm, &uImmNandS, &uImmR))
+    if (Armv8A64ConvertMask32ToImmRImmS(fBits, &uImmNandS, &uImmR))
     {
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
-        pu32CodeBuf[off++] = Armv8A64MkInstrAndsImm(ARMV8_A64_REG_XZR, iGprDst, uImmNandS, uImmR, false /*f64Bit*/);
+        pu32CodeBuf[off++] = Armv8A64MkInstrAndsImm(ARMV8_A64_REG_XZR, iGprSrc, uImmNandS, uImmR, false /*f64Bit*/);
     }
     else
     {
         /* Use temporary register for the 64-bit immediate. */
-        uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
+        uint8_t iTmpReg = iemNativeRegAllocTmpImm(pReNative, &off, fBits);
         uint32_t *pu32CodeBuf = iemNativeInstrBufEnsure(pReNative, off, 1);
         pu32CodeBuf[off++] = Armv8A64MkInstrAnds(ARMV8_A64_REG_XZR, iGprSrc, iTmpReg, false /*f64Bit*/);