Changeset 102587 in vbox

Timestamp:

Dec 12, 2023 2:13:35 PM (14 months ago)

Author:

vboxsync

Message:

VMM/IEM: Native translation of IEM_MC_SET_RIP_U16_AND_FINISH and friends. bugref:10371

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllN8vePython.py (modified) (1 diff)
• VMMAll/IEMAllN8veRecompiler.cpp (modified) (4 diffs)
• include/IEMN8veRecompiler.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py

@@ -78 +78 @@
     'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  True,  ),
 
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32':               (None, True,  False, ),
-    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64':               (None, True,  False, ),
-
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  False, ),
-    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  False, ),
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32':               (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64':               (None, True,  True,  ),
+
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32_WITH_FLAGS':    (None, True,  True,  ),
+    'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS':    (None, True,  True,  ),
 
     'IEM_MC_CALC_RM_EFF_ADDR_THREADED_16':                       (None, False, True,  ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

@@ -5330 +5330 @@
     Assert(enmEffOpSize == IEMMODE_64BIT || enmEffOpSize == IEMMODE_16BIT);
 
-    /* We speculatively modify PC and may raise #GP(0), so make sure the right value is in CPUMCTX. */
+    /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
     off = iemNativeRegFlushPendingWrites(pReNative, off);
 
@@ -5392 +5392 @@
     Assert(enmEffOpSize == IEMMODE_32BIT || enmEffOpSize == IEMMODE_16BIT);
 
-    /* We speculatively modify PC and may raise #GP(0), so make sure the right value is in CPUMCTX. */
+    /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
     off = iemNativeRegFlushPendingWrites(pReNative, off);
 
@@ -5443 +5443 @@
                                                  uint8_t cbInstr, int32_t offDisp, uint8_t idxInstr)
 {
-    /* We speculatively modify PC and may raise #GP(0), so make sure the right value is in CPUMCTX. */
+    /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
     off = iemNativeRegFlushPendingWrites(pReNative, off);
 
@@ -5467 +5467 @@
 *********************************************************************************************************************************/
 
-/** Sets RIP (may trigger \#GP), finishes the instruction and returns. */
-#define IEM_MC_SET_RIP_U16_AND_FINISH(a_u16NewIP)       return iemRegRipJumpU16AndFinishClearningRF((pVCpu), (a_u16NewIP))
-/** Sets RIP (may trigger \#GP), finishes the instruction and returns. */
-#define IEM_MC_SET_RIP_U32_AND_FINISH(a_u32NewIP)       return iemRegRipJumpU32AndFinishClearningRF((pVCpu), (a_u32NewIP))
-/** Sets RIP (may trigger \#GP), finishes the instruction and returns. */
-#define IEM_MC_SET_RIP_U64_AND_FINISH(a_u64NewIP)       return iemRegRipJumpU64AndFinishClearningRF((pVCpu), (a_u64NewIP))
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for pre-386 targets. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u16NewIP), false /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint16_t))
+
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for 386+ targets. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u16NewIP), false /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint16_t))
+
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for use in 64-bit code. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u16NewIP),  true /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint16_t))
+
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for pre-386 targets that checks and
+ *  clears flags. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) \
+    IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for 386+ targets that checks and
+ *  clears flags. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) \
+    IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+/** Variant of IEM_MC_SET_RIP_U16_AND_FINISH for use in 64-bit code that checks and
+ *  clears flags. */
+#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) \
+    IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+#undef IEM_MC_SET_RIP_U16_AND_FINISH
+
+
+/** Variant of IEM_MC_SET_RIP_U32_AND_FINISH for 386+ targets. */
+#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u32NewEIP), false /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint32_t))
+
+/** Variant of IEM_MC_SET_RIP_U32_AND_FINISH for use in 64-bit code. */
+#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u32NewEIP),  true /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint32_t))
+
+/** Variant of IEM_MC_SET_RIP_U32_AND_FINISH for 386+ targets that checks and
+ *  clears flags. */
+#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) \
+    IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+/** Variant of IEM_MC_SET_RIP_U32_AND_FINISH for use in 64-bit code that checks
+ *  and clears flags. */
+#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) \
+    IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+#undef IEM_MC_SET_RIP_U32_AND_FINISH
+
+
+/** Variant of IEM_MC_SET_RIP_U64_AND_FINISH for use in 64-bit code. */
+#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u64NewEIP) \
+    off = iemNativeEmitRipJumpNoFlags(pReNative, off, (a_u64NewEIP),  true /*f64Bit*/, pCallEntry->idxInstr, sizeof(uint64_t))
+
+/** Variant of IEM_MC_SET_RIP_U64_AND_FINISH for use in 64-bit code that checks
+ *  and clears flags. */
+#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u64NewEIP) \
+    IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u64NewEIP); \
+    off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off)
+
+#undef IEM_MC_SET_RIP_U64_AND_FINISH
+
+
+/** Same as iemRegRipJumpU16AndFinishNoFlags,
+ *  iemRegRipJumpU32AndFinishNoFlags and iemRegRipJumpU64AndFinishNoFlags. */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitRipJumpNoFlags(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarPc, bool f64Bit,
+                            uint8_t idxInstr, uint8_t cbVar)
+{
+    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxVarPc);
+    Assert(pReNative->Core.aVars[idxVarPc].cbVar == cbVar);
+
+    /* We speculatively modify PC and may raise #GP(0), so make sure the right values are in CPUMCTX. */
+    off = iemNativeRegFlushPendingWrites(pReNative, off);
+
+    /* Get a register with the new PC loaded from idxVarPc.
+       Note! This ASSUMES that the high bits of the GPR is zeroed. */
+    uint8_t const idxPcReg = iemNativeVarRegisterAcquireForGuestReg(pReNative, idxVarPc, kIemNativeGstReg_Pc, &off);
+
+    /* Check limit (may #GP(0) + exit TB). */
+    if (!f64Bit)
+        off = iemNativeEmitCheckGpr32AgainstSegLimitMaybeRaiseGp0(pReNative, off, idxPcReg, X86_SREG_CS, idxInstr);
+    /* Check that the address is canonical, raising #GP(0) + exit TB if it isn't. */
+    else if (cbVar > sizeof(uint32_t))
+        off = iemNativeEmitCheckGprCanonicalMaybeRaiseGp0(pReNative, off, idxPcReg, idxInstr);
+
+    /* Store the result. */
+    off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxPcReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.rip));
+
+    /** @todo implictly free the variable? */
+
+    return off;
+}
 
 

trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

@@ -824 +824 @@
 
 DECL_HIDDEN_THROW(uint8_t)  iemNativeVarGetStackSlot(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar);
+DECL_HIDDEN_THROW(uint8_t)  iemNativeVarRegisterAcquireForGuestReg(PIEMRECOMPILERSTATE pReNative, uint8_t idxVar,
+                                                                   IEMNATIVEGSTREG enmGstReg, uint32_t *poff);
 
 DECL_HIDDEN_THROW(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,