Changeset 102630 in vbox for trunk/src

Timestamp:

Dec 18, 2023 8:30:13 AM (17 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

160786

Message:

CPUID: Pass through and by default set the ARAT bit so that Windows 11 can use APIC timers and doesn't die in the absence of HPET (see bugref:10567).

File:

• trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

@@ -1031 +1031 @@
     bool            fNt4LeafLimit;
     bool            fInvariantTsc;
+    bool            fInvariantApic;
     bool            fForceVme;
     bool            fNestedHWVirt;
@@ -1799 +1800 @@
 
     /* Cpuid 6: Digital Thermal Sensor and Power Management Paramenters.
-     * Intel: Various stuff.
-     * AMD: EAX, EBX, EDX - reserved.
+     * Intel: Various thermal and power management related stuff.
+     * AMD: EBX, EDX - reserved.
+     *      EAX - Bit two is ARAT, indicating that APIC timers run at a constant
+     *            rate regardless of processor P-states. Same as Intel.
      *      ECX - Bit zero is EffFreq, indicating MSR_0000_00e7 and MSR_0000_00e8
-     *            present.  Same as intel.
+     *            present.  Same as Intel.
      * VIA: ??
      *
-     * We clear everything here for now.
-     */
-    cpumR3CpuIdZeroLeaf(pCpum, 6);
+     * We clear everything except for the ARAT bit which is important for Windows 11.
+     */
+    uSubLeaf = 0;
+    while ((pCurLeaf = cpumR3CpuIdGetExactLeaf(pCpum, 6, uSubLeaf)) != NULL)
+    {
+        pCurLeaf->uEbx = pCurLeaf->uEcx = pCurLeaf->uEdx = 0;
+        pCurLeaf->uEax &= 0
+                       | X86_CPUID_POWER_EAX_ARAT
+                       ;
+
+        /* Since we emulate the APIC timers, we can normally set the ARAT bit
+         * regardless of whether the host CPU sets it or not. Intel sets the ARAT
+         * bit circa since the Westmere generation, AMD probably only since Zen.
+         * See @bugref{10567}.
+         */
+        if (pConfig->fInvariantApic)
+            pCurLeaf->uEax |= X86_CPUID_POWER_EAX_ARAT;
+
+        uSubLeaf++;
+    }
 
     /* Cpuid 7 + ECX: Structured Extended Feature Flags Enumeration
@@ -2710 +2730 @@
      */
     rc = CFGMR3QueryBoolDef(pCpumCfg, "InvariantTsc", &pConfig->fInvariantTsc, true);
+    AssertLogRelRCReturn(rc, rc);
+
+    /** @cfgm{/CPUM/InvariantApic, boolean, true}
+     * Set the Always Running APIC Timer (ARAT) flag in lea if true; otherwise
+     * pass through the host setting. The Windows 10/11 HAL won't use APIC timers
+     * unless the ARAT bit is set. Note that both Intel and AMD set this bit.
+     */
+    rc = CFGMR3QueryBoolDef(pCpumCfg, "InvariantApic", &pConfig->fInvariantApic, true);
     AssertLogRelRCReturn(rc, rc);