VirtualBox

Changeset 102717 in vbox for trunk/include


Ignore:
Timestamp:
Dec 27, 2023 7:45:49 PM (13 months ago)
Author:
vboxsync
Message:

VBox/VMM: Outlined native TLB lookup code for IEM_MC_MEM_MAP_XXXX on x86 hosts. Untested+disabled. bugref:10371

Location:
trunk/include/iprt
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/iprt/armv8.h

    r102688 r102717  
    31323132
    31333133/**
     3134 * A64: Encodes an EXTR instruction with an immediate.
     3135 *
     3136 * @returns The encoded instruction.
     3137 * @param   iRegResult  The register to store the result in. ZR is valid.
     3138 * @param   iRegLow     The register holding the least significant bits in the
     3139 *                      extraction. ZR is valid.
     3140 * @param   iRegHigh    The register holding the most significant bits in the
     3141 *                      extraction. ZR is valid.
     3142 * @param   uLsb        The bit number of the least significant bit, or where in
     3143 *                      @a iRegLow to start the
     3144 *                      extraction.
     3145 * @param   f64Bit      true for 64-bit GRPs (default), false for 32-bit GPRs.
     3146 */
     3147DECL_FORCE_INLINE(uint32_t) Armv8A64MkInstrExtrImm(uint32_t iRegResult, uint32_t iRegLow, uint32_t iRegHigh, uint32_t uLsb,
     3148                                                   bool f64Bit = true)
     3149{
     3150    Assert(uLsb < (uint32_t)(f64Bit ? 64 : 32)); Assert(iRegHigh < 32); Assert(iRegLow < 32); Assert(iRegResult < 32);
     3151    return ((uint32_t)f64Bit       << 31)
     3152         | UINT32_C(0x13800000)
     3153         | ((uint32_t)f64Bit       << 22) /*N*/
     3154         | (iRegHigh               << 16)
     3155         | (uLsb                   << 10)
     3156         | (iRegLow                <<  5)
     3157         | iRegResult;
     3158}
     3159
     3160
     3161/** A64: Rotates the value of a register (alias for EXTR). */
     3162DECL_FORCE_INLINE(uint32_t) Armv8A64MkInstrRorImm(uint32_t iRegResult, uint32_t iRegSrc, uint32_t cShift, bool f64Bit = true)
     3163{
     3164    return Armv8A64MkInstrExtrImm(iRegResult, iRegSrc, iRegSrc, cShift, f64Bit);
     3165}
     3166
     3167
     3168/**
    31343169 * A64: Encodes either add, adds, sub or subs with unsigned 12-bit immediate.
    31353170 *
  • trunk/include/iprt/x86.h

    r102646 r102717  
    39943994
    39953995/** @name X86DESCATTR masks
     3996 * Fields X86DESCGENERIC::u4Type thru X86DESCGENERIC::u1Granularity (or
     3997 * bits[55:40] if you like).  The X86DESCATTR_UNUSABLE bit is an Intel addition.
    39963998 * @{ */
    39973999#define X86DESCATTR_TYPE            UINT32_C(0x0000000f)
    3998 #define X86DESCATTR_DT              UINT32_C(0x00000010)
     4000#define X86DESCATTR_DT              UINT32_C(0x00000010)    /**< Descriptor type: 0=system, 1=code/data */
    39994001#define X86DESCATTR_DPL             UINT32_C(0x00000060)
    4000 #define X86DESCATTR_DPL_SHIFT       5 /**< Shift count for the DPL value. */
     4002#define X86DESCATTR_DPL_SHIFT       5                       /**< Shift count for the DPL bitfield. */
    40014003#define X86DESCATTR_P               UINT32_C(0x00000080)
    40024004#define X86DESCATTR_LIMIT_HIGH      UINT32_C(0x00000f00)
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