Changeset 102841 in vbox
- Timestamp:
- Jan 11, 2024 1:48:35 PM (11 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompBltIn.cpp
r102756 r102841 71 71 IEM_DECL_NATIVE_HLP_DEF(void, iemNativeHlpMemCodeNewPageTlbMiss,(PVMCPUCC pVCpu)) 72 72 { 73 STAM_COUNTER_INC(&pVCpu->iem.s.StatNativeCodeTlbMissesNewPage); 73 74 pVCpu->iem.s.pbInstrBuf = NULL; 74 75 pVCpu->iem.s.offCurInstrStart = GUEST_PAGE_SIZE; … … 89 90 IEM_DECL_NATIVE_HLP_DEF(RTGCPHYS, iemNativeHlpMemCodeNewPageTlbMissWithOff,(PVMCPUCC pVCpu, uint8_t offInstr)) 90 91 { 92 STAM_COUNTER_INC(&pVCpu->iem.s.StatNativeCodeTlbMissesNewPage); 91 93 pVCpu->iem.s.pbInstrBuf = NULL; 92 94 pVCpu->iem.s.offCurInstrStart = GUEST_PAGE_SIZE - offInstr; -
trunk/src/VBox/VMM/VMMR3/IEMR3.cpp
r102829 r102841 298 298 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.CodeTlb.uTlbPhysRev, STAMTYPE_X64, STAMVISIBILITY_ALWAYS, STAMUNIT_NONE, 299 299 "Code TLB physical revision", "/IEM/CPU%u/CodeTlb-PhysRev", idCpu); 300 STAMR3RegisterF(pVM, &pVCpu->iem.s.CodeTlb.cTlbSlowReadPath, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_ NONE,300 STAMR3RegisterF(pVM, &pVCpu->iem.s.CodeTlb.cTlbSlowReadPath, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 301 301 "Code TLB slow read path", "/IEM/CPU%u/CodeTlb-SlowReads", idCpu); 302 302 … … 317 317 STAMR3RegisterF(pVM, &pVCpu->iem.s.DataTlb.cTlbHits, STAMTYPE_U64_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 318 318 "Data TLB hits", "/IEM/CPU%u/DataTlb-Hits-Other", idCpu); 319 # ifdef VBOX_WITH_IEM_ RECOMPILER320 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForStack, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_ NONE,319 # ifdef VBOX_WITH_IEM_NATIVE_RECOMPILER 320 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForStack, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 321 321 "Data TLB native stack access hits", "/IEM/CPU%u/DataTlb-Hits-Native-Stack", idCpu); 322 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForFetch, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_ NONE,322 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForFetch, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 323 323 "Data TLB native data fetch hits", "/IEM/CPU%u/DataTlb-Hits-Native-Fetch", idCpu); 324 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForStore, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_ NONE,324 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForStore, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 325 325 "Data TLB native data store hits", "/IEM/CPU%u/DataTlb-Hits-Native-Store", idCpu); 326 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForMapped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_ NONE,326 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeTlbHitsForMapped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 327 327 "Data TLB native mapped data hits", "/IEM/CPU%u/DataTlb-Hits-Native-Mapped", idCpu); 328 328 # endif … … 340 340 STAMR3RegisterPctOfSum(pVM->pUVM, STAMVISIBILITY_ALWAYS, STAMUNIT_PPM, szValue, szPat, 341 341 "Data TLB actual miss rate", "/IEM/CPU%u/DataTlb-SafeRate", idCpu); 342 343 # ifdef VBOX_WITH_IEM_NATIVE_RECOMPILER 344 STAMR3RegisterF(pVM, (void *)&pVCpu->iem.s.StatNativeCodeTlbMissesNewPage, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT, 345 "Code TLB native misses on new page", "/IEM/CPU%u/CodeTlb-Misses-New-Page", idCpu); 346 # endif 342 347 # endif 343 348 -
trunk/src/VBox/VMM/include/IEMInternal.h
r102817 r102841 1743 1743 /** Native recompiled execution: TLB hits for mapped accesses. */ 1744 1744 STAMCOUNTER StatNativeTlbHitsForMapped; 1745 uint64_t au64Padding[7]; 1745 /** Native recompiled execution: Code TLB misses for new page. */ 1746 STAMCOUNTER StatNativeCodeTlbMissesNewPage; 1747 uint64_t au64Padding[6]; 1746 1748 /** @} */ 1747 1749
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