- Timestamp:
- Jul 7, 2008 7:54:28 AM (16 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r9669 r10297 719 719 int rc; 720 720 RTCPUID idCpu = RTMpCpuId(); 721 722 Assert(!VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL)); 721 723 722 724 rc = CPUMQueryGuestCtxPtr(pVM, &pCtx); -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r10269 r10297 883 883 pVM->hwaccm.s.svm.idLastCpu = pCpu->idCpu; 884 884 } 885 else 886 Assert(pVM->hwaccm.s.svm.idLastCpu == pCpu->idCpu); 885 887 886 888 /* Make sure we flush the TLB when required. Switch ASID to achieve the same thing, but without actually flushing the whole TLB (which is expensive). */ … … 1544 1546 STAM_COUNTER_INC(&pVM->hwaccm.s.StatFlushTLBCRxChange); 1545 1547 1546 /* * @note Force a TLB flush. SVM requires us to do it manually.*/1547 pVM->hwaccm.s.svm.fForceTLBFlush = true;1548 /* Must be set by PGMSyncCR3 */ 1549 Assert(pVM->hwaccm.s.svm.fForceTLBFlush); 1548 1550 } 1549 1551 if (rc == VINF_SUCCESS)
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