Changeset 103182 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Feb 3, 2024 3:44:12 PM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 161447
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r102445 r103182 232 232 }; 233 233 234 /** Exception type \#4 test configurations, for psll/psra/psrl. */235 /** Test 11:AVX expects success, not AC */236 /** @todo proliferation of exception test config tables is not sustainable, find a better way? */237 static const BS3CPUINSTR3_CONFIG_T g_aXcptConfig4psll[] =238 {239 /*240 * X87 SSE SSE SSE AVX AVX AVX MMX MMX+SSE MMX+AVX AMD/SSE <-- applies to241 * +AVX +AMD/SSE242 * CR0 CR0 CR0 CR4 CR4 XCR0 XCR0 FCW MXCSR243 * MP, EM, TS, OSFXSR, OSXSAVE, SSE, AVX, ES+, fAligned, AC/AM, MM, bXcptMmx, bXcptSse, bXcptAvx */244 { 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_DB }, /* #0 */245 { 1, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_DB }, /* #1 */246 { 0, 1, 0, 1, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_DB }, /* #2 */247 { 0, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_NM, X86_XCPT_NM, X86_XCPT_NM }, /* #3 */248 { 0, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_NM }, /* #4 */249 { 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_UD, X86_XCPT_DB }, /* #5 */250 { 0, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_UD }, /* #6 */251 { 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_UD }, /* #7 */252 { 0, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_UD }, /* #8 */253 { 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, X86_XCPT_MF, X86_XCPT_DB, X86_XCPT_DB }, /* #9 - pending x87 exception */254 /* Memory misalignment and alignment checks: */255 { 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, X86_XCPT_DB, X86_XCPT_GP, X86_XCPT_DB }, /* #10 */256 { 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, X86_XCPT_AC, X86_XCPT_GP, X86_XCPT_DB }, /* #11 */ /* psll special */257 { 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 0, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_DB }, /* #12 */258 /* AMD only: */259 { 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_DB }, /* #13 */260 { 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, X86_XCPT_AC, X86_XCPT_AC, X86_XCPT_AC }, /* #14 */261 };262 263 234 /** Exception type \#5 test configurations, less than 16 byte operands. */ 264 235 static const BS3CPUINSTR3_CONFIG_T g_aXcptConfig5[] = … … 8768 8739 }; 8769 8740 8741 #define SLOW_OK 8742 #undef SLOW_OK 8770 8743 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 8771 8744 { … … 8779 8752 { bs3CpuInstr3_psllw_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8780 8753 { bs3CpuInstr3_vpsllw_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8781 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8754 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8782 8755 { bs3CpuInstr3_vpsllw_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8783 8756 { bs3CpuInstr3_vpsllw_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8784 8757 { bs3CpuInstr3_vpsllw_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8785 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8758 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8786 8759 { bs3CpuInstr3_vpsllw_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8787 8760 { bs3CpuInstr3_vpsllw_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 8796 8769 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8797 8770 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8798 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8771 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8799 8772 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8800 8773 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8801 8774 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8802 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8775 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8803 8776 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8804 8777 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 8813 8786 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8814 8787 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8815 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8788 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8816 8789 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8817 8790 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8818 8791 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8819 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8792 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8820 8793 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8821 8794 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 8832 8805 { bs3CpuInstr3_psllw_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8833 8806 { bs3CpuInstr3_vpsllw_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8834 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8807 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8835 8808 { bs3CpuInstr3_vpsllw_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8836 8809 { bs3CpuInstr3_vpsllw_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8837 8810 { bs3CpuInstr3_vpsllw_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8838 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8811 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8839 8812 { bs3CpuInstr3_vpsllw_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8840 8813 { bs3CpuInstr3_vpsllw_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 8849 8822 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8850 8823 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8851 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8824 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8852 8825 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8853 8826 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8854 8827 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8855 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8828 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8856 8829 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8857 8830 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 8866 8839 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8867 8840 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8868 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8841 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8869 8842 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8870 8843 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8871 8844 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8872 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8845 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8873 8846 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8874 8847 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 8885 8858 { bs3CpuInstr3_psllw_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8886 8859 { bs3CpuInstr3_vpsllw_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8887 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8860 { bs3CpuInstr3_vpsllw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8888 8861 { bs3CpuInstr3_vpsllw_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8889 8862 { bs3CpuInstr3_vpsllw_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 8890 8863 { bs3CpuInstr3_vpsllw_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8891 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },8864 { bs3CpuInstr3_vpsllw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 8892 8865 { bs3CpuInstr3_vpsllw_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 8893 8866 { bs3CpuInstr3_vpsllw_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 8902 8875 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8903 8876 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8904 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8877 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8905 8878 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8906 8879 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8907 8880 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8908 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },8881 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8909 8882 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8910 8883 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 8919 8892 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8920 8893 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8921 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8894 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8922 8895 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8923 8896 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8924 8897 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8925 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },8898 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8926 8899 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8927 8900 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 8930 8903 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 8931 8904 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 8932 g_aXcptConfig4 psll, RT_ELEMENTS(g_aXcptConfig4psll));8905 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 8933 8906 } 8934 8907 … … 9054 9027 { bs3CpuInstr3_psraw_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9055 9028 { bs3CpuInstr3_vpsraw_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9056 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9029 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9057 9030 { bs3CpuInstr3_vpsraw_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9058 9031 { bs3CpuInstr3_vpsraw_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9059 9032 { bs3CpuInstr3_vpsraw_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9060 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9033 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9061 9034 { bs3CpuInstr3_vpsraw_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9062 9035 { bs3CpuInstr3_vpsraw_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9071 9044 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9072 9045 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9073 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9046 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9074 9047 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9075 9048 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9076 9049 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9077 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9050 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9078 9051 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9079 9052 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9090 9063 { bs3CpuInstr3_psraw_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9091 9064 { bs3CpuInstr3_vpsraw_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9092 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9065 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9093 9066 { bs3CpuInstr3_vpsraw_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9094 9067 { bs3CpuInstr3_vpsraw_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9095 9068 { bs3CpuInstr3_vpsraw_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9096 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9069 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9097 9070 { bs3CpuInstr3_vpsraw_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9098 9071 { bs3CpuInstr3_vpsraw_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9107 9080 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9108 9081 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9109 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9082 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9110 9083 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9111 9084 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9112 9085 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9113 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9086 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9114 9087 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9115 9088 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9126 9099 { bs3CpuInstr3_psraw_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9127 9100 { bs3CpuInstr3_vpsraw_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9128 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9101 { bs3CpuInstr3_vpsraw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9129 9102 { bs3CpuInstr3_vpsraw_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9130 9103 { bs3CpuInstr3_vpsraw_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9131 9104 { bs3CpuInstr3_vpsraw_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9132 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9105 { bs3CpuInstr3_vpsraw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9133 9106 { bs3CpuInstr3_vpsraw_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9134 9107 { bs3CpuInstr3_vpsraw_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9143 9116 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9144 9117 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9145 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9118 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9146 9119 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9147 9120 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9148 9121 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9149 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9122 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9150 9123 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9151 9124 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9154 9127 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 9155 9128 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 9156 g_aXcptConfig4 psll, RT_ELEMENTS(g_aXcptConfig4psll));9129 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 9157 9130 } 9158 9131 … … 9331 9304 { bs3CpuInstr3_psrlw_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9332 9305 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9333 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9306 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9334 9307 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9335 9308 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9336 9309 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9337 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9310 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9338 9311 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9339 9312 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9348 9321 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9349 9322 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9350 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9323 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9351 9324 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9352 9325 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9353 9326 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9354 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9327 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9355 9328 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9356 9329 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9365 9338 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9366 9339 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9367 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9340 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9368 9341 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9369 9342 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9370 9343 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9371 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c16, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9344 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9372 9345 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9373 9346 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 9384 9357 { bs3CpuInstr3_psrlw_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9385 9358 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9386 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9359 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9387 9360 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9388 9361 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9389 9362 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9390 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9363 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9391 9364 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9392 9365 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9401 9374 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9402 9375 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9403 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9376 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9404 9377 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9405 9378 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9406 9379 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9407 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9380 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9408 9381 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9409 9382 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9418 9391 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9419 9392 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9420 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9393 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9421 9394 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9422 9395 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9423 9396 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9424 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c32, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9397 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9425 9398 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9426 9399 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 9437 9410 { bs3CpuInstr3_psrlw_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9438 9411 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9439 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9412 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9440 9413 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9441 9414 { bs3CpuInstr3_vpsrlw_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, 9442 9415 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9443 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 },9416 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues16), s_aValues16 }, 9444 9417 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_01), s_aValues16_01 }, 9445 9418 { bs3CpuInstr3_vpsrlw_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues16_12), s_aValues16_12 }, … … 9454 9427 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9455 9428 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9456 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9429 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9457 9430 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9458 9431 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 9459 9432 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9460 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 },9433 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 9461 9434 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 9462 9435 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, … … 9471 9444 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9472 9445 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9473 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9446 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9474 9447 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9475 9448 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 9476 9449 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9477 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c64, 255,RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 },9450 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 9478 9451 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 9479 9452 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, … … 9482 9455 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 9483 9456 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 9484 g_aXcptConfig4 psll, RT_ELEMENTS(g_aXcptConfig4psll));9457 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 9485 9458 } 9486 9459
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