VirtualBox

Ignore:
Timestamp:
Feb 24, 2024 11:05:44 AM (12 months ago)
Author:
vboxsync
Message:

ValidationKit/bootsectors: Implement testcases for vpermilps instructions, bugref:9898

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r102445 r103557  
    36973697 %endif
    36983698
     3699;
     3700; VPERMILPS
     3701;
     3702EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  XMM3
     3703EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  FSxBX
     3704EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  000h
     3705EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  01Bh
     3706EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  0E4h
     3707EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, XMM2,  03Dh
     3708EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, FSxBX, 000h
     3709EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, FSxBX, 01Bh
     3710EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, FSxBX, 0E4h
     3711EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM1, FSxBX, 03Dh
     3712EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  YMM3
     3713EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  FSxBX
     3714EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  000h
     3715EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  01Bh
     3716EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  0E4h
     3717EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, YMM2,  03Dh
     3718EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, FSxBX, 000h
     3719EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, FSxBX, 01Bh
     3720EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, FSxBX, 0E4h
     3721EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM1, FSxBX, 03Dh
     3722 %if TMPL_BITS == 64
     3723EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  XMM10
     3724EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  FSxBX
     3725EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  000h
     3726EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  01Bh
     3727EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  0E4h
     3728EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, XMM9,  03Dh
     3729EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, FSxBX, 000h
     3730EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, FSxBX, 01Bh
     3731EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, FSxBX, 0E4h
     3732EMIT_INSTR_PLUS_ICEBP   vpermilps, XMM8, FSxBX, 03Dh
     3733EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  YMM10
     3734EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  FSxBX
     3735EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  000h
     3736EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  01Bh
     3737EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  0E4h
     3738EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, YMM9,  03Dh
     3739EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, FSxBX, 000h
     3740EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, FSxBX, 01Bh
     3741EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, FSxBX, 0E4h
     3742EMIT_INSTR_PLUS_ICEBP   vpermilps, YMM8, FSxBX, 03Dh
     3743 %endif
     3744
    36993745%endif ; BS3_INSTANTIATING_CMN
    37003746

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r103268 r103557  
    98479847}
    98489848
     9849
     9850/*
     9851 * VPERMILPS - Permute In-Lane of Quadruples of Single Precision Floating-Point Values
     9852 *           - ('Single Precision Floating-Point Values' AKA 'uninterpreted strings of 32-bits')
     9853 */
     9854BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_XMM3_icebp);
     9855BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_FSxBX_icebp);
     9856BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_000h_icebp);
     9857BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_01Bh_icebp);
     9858BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_0E4h_icebp);
     9859BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_XMM2_03Dh_icebp);
     9860BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_FSxBX_000h_icebp);
     9861BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_FSxBX_01Bh_icebp);
     9862BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_FSxBX_0E4h_icebp);
     9863BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_XMM1_FSxBX_03Dh_icebp);
     9864BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_YMM3_icebp);
     9865BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_FSxBX_icebp);
     9866BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_000h_icebp);
     9867BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_01Bh_icebp);
     9868BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_0E4h_icebp);
     9869BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_YMM2_03Dh_icebp);
     9870BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_FSxBX_000h_icebp);
     9871BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_FSxBX_01Bh_icebp);
     9872BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_FSxBX_0E4h_icebp);
     9873BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilps_YMM1_FSxBX_03Dh_icebp);
     9874extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_XMM10_icebp_c64;
     9875extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_FSxBX_icebp_c64;
     9876extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_000h_icebp_c64;
     9877extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_01Bh_icebp_c64;
     9878extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_0E4h_icebp_c64;
     9879extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_XMM9_03Dh_icebp_c64;
     9880extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_FSxBX_000h_icebp_c64;
     9881extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_FSxBX_01Bh_icebp_c64;
     9882extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_FSxBX_0E4h_icebp_c64;
     9883extern FNBS3FAR             bs3CpuInstr3_vpermilps_XMM8_FSxBX_03Dh_icebp_c64;
     9884extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_YMM10_icebp_c64;
     9885extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_FSxBX_icebp_c64;
     9886extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_000h_icebp_c64;
     9887extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_01Bh_icebp_c64;
     9888extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_0E4h_icebp_c64;
     9889extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_YMM9_03Dh_icebp_c64;
     9890extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_FSxBX_000h_icebp_c64;
     9891extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_FSxBX_01Bh_icebp_c64;
     9892extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_FSxBX_0E4h_icebp_c64;
     9893extern FNBS3FAR             bs3CpuInstr3_vpermilps_YMM8_FSxBX_03Dh_icebp_c64;
     9894
     9895BS3_DECL_FAR(uint8_t) bs3CpuInstr3_vpermilps(uint8_t bMode)
     9896{
     9897    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] =
     9898    {
     9899        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000),
     9900            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9901            /* => */ RTUINT256_INIT_C(0xa5a6a7a8a5a6a7a8, 0xa5a6a7a8a5a6a7a8, 0x8586878885868788, 0x8586878885868788) }, /* lo => all 4 slots */
     9902    };
     9903    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues1B[] =
     9904    {
     9905        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000003, 0x0000000000000001, 0x0000000200000003),
     9906            /*src1*/ RTUINT256_INIT_C(0xa5a6a7a8a1a2a3a4, 0xb5b6b7b8b1b2b3b4, 0x8586878881828384, 0x9596979891929394),
     9907            /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, /* reverse 4 slots */
     9908    };
     9909    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesE4[] =
     9910    {
     9911        {   /*src2*/ RTUINT256_INIT_C(0x0000000300000002, 0x0000000100000000, 0x0000000300000002, 0x0000000100000000),
     9912            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9913            /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, /* straight copy */
     9914    };
     9915    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues3D[] =
     9916    {
     9917        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000003, 0x0000000300000001, 0x0000000000000003, 0x0000000300000001),
     9918            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9919            /* => */ RTUINT256_INIT_C(0xa5a6a7a8b1b2b3b4, 0xb1b2b3b4a1a2a3a4, 0x8586878891929394, 0x9192939481828384) }, /* 'weird' order w/dup */
     9920    };
     9921    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesAll[] =
     9922    {
     9923        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000),
     9924            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9925            /* => */ RTUINT256_INIT_C(0xa5a6a7a8a5a6a7a8, 0xa5a6a7a8a5a6a7a8, 0x8586878885868788, 0x8586878885868788) }, /* all 4 of the */
     9926        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000001, 0x0000000200000003, 0x0000000000000001, 0x0000000200000003),
     9927            /*src1*/ RTUINT256_INIT_C(0xa5a6a7a8a1a2a3a4, 0xb5b6b7b8b1b2b3b4, 0x8586878881828384, 0x9596979891929394),
     9928            /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, /* above for testing */
     9929        {   /*src2*/ RTUINT256_INIT_C(0x0000000300000002, 0x0000000100000000, 0x0000000300000002, 0x0000000100000000),
     9930            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9931            /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, /* non-imm8 opcodes, */
     9932        {   /*src2*/ RTUINT256_INIT_C(0x0000000000000003, 0x0000000300000001, 0x0000000000000003, 0x0000000300000001),
     9933            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     9934            /* => */ RTUINT256_INIT_C(0xa5a6a7a8b1b2b3b4, 0xb1b2b3b4a1a2a3a4, 0x8586878891929394, 0x9192939481828384) },
     9935        {   /*src2*/ RTUINT256_INIT_C(0x0000000200000003, 0x0000000100000002, 0x0000000000000003, 0x0000000300000001),   /* plus: permute lo & */
     9936            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),   /* hi 128 bits of ymm */
     9937            /* => */ RTUINT256_INIT_C(0xb5b6b7b8b1b2b3b4, 0xa1a2a3a4b5b6b7b8, 0x8586878891929394, 0x9192939481828384) }, /* reg differently. */
     9938    };
     9939
     9940    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     9941    {
     9942        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9943        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9944        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_000h_icebp_c16,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9945        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_01Bh_icebp_c16,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9946        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_0E4h_icebp_c16,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9947        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_03Dh_icebp_c16,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9948        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9949        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_01Bh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9950        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_0E4h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9951        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_03Dh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9952        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_YMM3_icebp_c16,  255,         RM_REG, T_AVX_256,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9953        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9954        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_000h_icebp_c16,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9955        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_01Bh_icebp_c16,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9956        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_0E4h_icebp_c16,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9957        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_03Dh_icebp_c16,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9958        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9959        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_01Bh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9960        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_0E4h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9961        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_03Dh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9962    };
     9963    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     9964    {
     9965        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9966        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9967        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_000h_icebp_c32,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9968        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_01Bh_icebp_c32,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9969        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_0E4h_icebp_c32,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9970        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_03Dh_icebp_c32,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9971        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9972        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_01Bh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9973        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_0E4h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9974        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_03Dh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9975        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_YMM3_icebp_c32,  255,         RM_REG, T_AVX_256,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9976        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9977        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_000h_icebp_c32,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9978        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_01Bh_icebp_c32,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9979        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_0E4h_icebp_c32,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9980        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_03Dh_icebp_c32,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9981        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9982        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_01Bh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9983        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_0E4h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9984        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_03Dh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9985    };
     9986    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     9987    {
     9988        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9989        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9990        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_000h_icebp_c64,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9991        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_01Bh_icebp_c64,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9992        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_0E4h_icebp_c64,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9993        {  bs3CpuInstr3_vpermilps_XMM1_XMM2_03Dh_icebp_c64,  255,         RM_REG, T_AVX_128,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9994        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     9995        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_01Bh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     9996        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_0E4h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     9997        {  bs3CpuInstr3_vpermilps_XMM1_FSxBX_03Dh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     9998        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_YMM3_icebp_c64,  255,         RM_REG, T_AVX_256,    1, 2,   3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     9999        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     10000        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_000h_icebp_c64,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10001        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_01Bh_icebp_c64,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10002        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_0E4h_icebp_c64,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10003        {  bs3CpuInstr3_vpermilps_YMM1_YMM2_03Dh_icebp_c64,  255,         RM_REG, T_AVX_256,    1, 2,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10004        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10005        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_01Bh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10006        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_0E4h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10007        {  bs3CpuInstr3_vpermilps_YMM1_FSxBX_03Dh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    1, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10008        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128,    8, 9,  10, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     10009        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    8, 9, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     10010        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_000h_icebp_c64,  255,         RM_REG, T_AVX_128,    8, 9,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10011        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_01Bh_icebp_c64,  255,         RM_REG, T_AVX_128,    8, 9,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10012        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_0E4h_icebp_c64,  255,         RM_REG, T_AVX_128,    8, 9,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10013        {  bs3CpuInstr3_vpermilps_XMM8_XMM9_03Dh_icebp_c64,  255,         RM_REG, T_AVX_128,    8, 9,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10014        {  bs3CpuInstr3_vpermilps_XMM8_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    8, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10015        {  bs3CpuInstr3_vpermilps_XMM8_FSxBX_01Bh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    8, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10016        {  bs3CpuInstr3_vpermilps_XMM8_FSxBX_0E4h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    8, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10017        {  bs3CpuInstr3_vpermilps_XMM8_FSxBX_03Dh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,    8, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10018        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX_256,    8, 9,  10, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     10019        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    8, 9, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll },
     10020        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_000h_icebp_c64,  255,         RM_REG, T_AVX_256,    8, 9,   0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10021        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_01Bh_icebp_c64,  255,         RM_REG, T_AVX_256,    8, 9,   0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10022        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_0E4h_icebp_c64,  255,         RM_REG, T_AVX_256,    8, 9,   0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10023        {  bs3CpuInstr3_vpermilps_YMM8_YMM9_03Dh_icebp_c64,  255,         RM_REG, T_AVX_256,    8, 9,   0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10024        {  bs3CpuInstr3_vpermilps_YMM8_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    8, 255, 0, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     10025        {  bs3CpuInstr3_vpermilps_YMM8_FSxBX_01Bh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    8, 255, 0, RT_ELEMENTS(s_aValues1B),  s_aValues1B },
     10026        {  bs3CpuInstr3_vpermilps_YMM8_FSxBX_0E4h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    8, 255, 0, RT_ELEMENTS(s_aValuesE4),  s_aValuesE4 },
     10027        {  bs3CpuInstr3_vpermilps_YMM8_FSxBX_03Dh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256,    8, 255, 0, RT_ELEMENTS(s_aValues3D),  s_aValues3D },
     10028    };
     10029    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     10030    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     10031    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     10032                                        g_aXcptConfig6, RT_ELEMENTS(g_aXcptConfig6));
     10033}
    984910034
    985010035
    … …  
    1485515040        { "vperm2i128/vperm2f128",                          bs3CpuInstr3_vperm2i128_vperm2f128, 0 },
    1485615041#endif
     15042#if defined (ALL_TESTS)
     15043        { "vpermilps",                                      bs3CpuInstr3_vpermilps, 0 },
     15044#endif
    1485715045    };
    1485815046    Bs3TestInit("bs3-cpu-instr-3");
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