Changeset 103559 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Feb 24, 2024 11:07:05 AM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 161909
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac
r103557 r103559 3743 3743 %endif 3744 3744 3745 ; 3746 ; VPERMILPD 3747 ; 3748 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, XMM2, XMM3 3749 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, XMM2, FSxBX 3750 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, XMM2, 000h 3751 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, XMM2, 0E7h 3752 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, XMM2, 091h 3753 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, FSxBX, 000h 3754 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, FSxBX, 0E7h 3755 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM1, FSxBX, 091h 3756 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, YMM2, YMM3 3757 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, YMM2, FSxBX 3758 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, YMM2, 000h 3759 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, YMM2, 0E7h 3760 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, YMM2, 091h 3761 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, FSxBX, 000h 3762 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, FSxBX, 0E7h 3763 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM1, FSxBX, 091h 3764 %if TMPL_BITS == 64 3765 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, XMM9, XMM10 3766 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, XMM9, FSxBX 3767 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, XMM9, 000h 3768 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, XMM9, 0E7h 3769 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, XMM9, 091h 3770 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, FSxBX, 000h 3771 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, FSxBX, 0E7h 3772 EMIT_INSTR_PLUS_ICEBP vpermilpd, XMM8, FSxBX, 091h 3773 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, YMM9, YMM10 3774 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, YMM9, FSxBX 3775 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, YMM9, 000h 3776 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, YMM9, 0E7h 3777 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, YMM9, 091h 3778 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, FSxBX, 000h 3779 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, FSxBX, 0E7h 3780 EMIT_INSTR_PLUS_ICEBP vpermilpd, YMM8, FSxBX, 091h 3781 %endif 3782 3745 3783 %endif ; BS3_INSTANTIATING_CMN 3746 3784 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r103557 r103559 10032 10032 g_aXcptConfig6, RT_ELEMENTS(g_aXcptConfig6)); 10033 10033 } 10034 10035 10036 /* 10037 * VPERMILPD - Permute In-Lane of Pairs of Double Precision Floating-Point Values 10038 * - ('Double Precision Floating-Point Values' AKA 'uninterpreted strings of 64-bits') 10039 */ 10040 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_XMM2_XMM3_icebp); 10041 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_XMM2_FSxBX_icebp); 10042 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_XMM2_000h_icebp); 10043 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_XMM2_0E7h_icebp); 10044 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_XMM2_091h_icebp); 10045 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_FSxBX_000h_icebp); 10046 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_FSxBX_0E7h_icebp); 10047 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_XMM1_FSxBX_091h_icebp); 10048 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_YMM2_YMM3_icebp); 10049 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_YMM2_FSxBX_icebp); 10050 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_YMM2_000h_icebp); 10051 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_YMM2_0E7h_icebp); 10052 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_YMM2_091h_icebp); 10053 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_FSxBX_000h_icebp); 10054 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_FSxBX_0E7h_icebp); 10055 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpermilpd_YMM1_FSxBX_091h_icebp); 10056 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_XMM9_XMM10_icebp_c64; 10057 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_XMM9_FSxBX_icebp_c64; 10058 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_XMM9_000h_icebp_c64; 10059 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_XMM9_0E7h_icebp_c64; 10060 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_XMM9_091h_icebp_c64; 10061 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_FSxBX_000h_icebp_c64; 10062 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_FSxBX_0E7h_icebp_c64; 10063 extern FNBS3FAR bs3CpuInstr3_vpermilpd_XMM8_FSxBX_091h_icebp_c64; 10064 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_YMM9_YMM10_icebp_c64; 10065 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_YMM9_FSxBX_icebp_c64; 10066 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_YMM9_000h_icebp_c64; 10067 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_YMM9_0E7h_icebp_c64; 10068 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_YMM9_091h_icebp_c64; 10069 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_FSxBX_000h_icebp_c64; 10070 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_FSxBX_0E7h_icebp_c64; 10071 extern FNBS3FAR bs3CpuInstr3_vpermilpd_YMM8_FSxBX_091h_icebp_c64; 10072 10073 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_vpermilpd(uint8_t bMode) 10074 { 10075 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] = 10076 { 10077 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000), 10078 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 10079 /* => */ RTUINT256_INIT_C(0xa1a2a3a4a5a6a7a8, 0xa1a2a3a4a5a6a7a8, 0x8182838485868788, 0x8182838485868788) }, /* lo => both slots */ 10080 }; 10081 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesE7[] = 10082 { 10083 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000001, 0x0000000000000001, 0x0000000000000001), /* hi bits ignored; */ 10084 /*src1*/ RTUINT256_INIT_C(0xa5a6a7a8a1a2a3a4, 0xb5b6b7b8b1b2b3b4, 0x8586878881828384, 0x9596979891929394), /* lo bits 0111b == */ 10085 /* => */ RTUINT256_INIT_C(0xb5b6b7b8b1b2b3b4, 0xa5a6a7a8a1a2a3a4, 0x8586878881828384, 0x8586878881828384) }, /* Z.Y.X.W => Y.Z.X.X */ 10086 }; 10087 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues91[] = 10088 { 10089 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000001), /* hi bits ignored; */ 10090 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), /* lo bits 0001b == */ 10091 /* => */ RTUINT256_INIT_C(0xa1a2a3a4a5a6a7a8, 0xa1a2a3a4a5a6a7a8, 0x8182838485868788, 0x9192939495969798) }, /* Z.Y.X.W => Y.Y.W.X */ 10092 }; 10093 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesAll[] = 10094 { 10095 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000), 10096 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 10097 /* => */ RTUINT256_INIT_C(0xa1a2a3a4a5a6a7a8, 0xa1a2a3a4a5a6a7a8, 0x8182838485868788, 0x8182838485868788) }, /* all 3 of the */ 10098 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000002, 0x0000000000000002, 0x0000000000000002), 10099 /*src1*/ RTUINT256_INIT_C(0xa5a6a7a8a1a2a3a4, 0xb5b6b7b8b1b2b3b4, 0x8586878881828384, 0x9596979891929394), 10100 /* => */ RTUINT256_INIT_C(0xb5b6b7b8b1b2b3b4, 0xa5a6a7a8a1a2a3a4, 0x8586878881828384, 0x8586878881828384) }, /* above for testing */ 10101 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000002), 10102 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 10103 /* => */ RTUINT256_INIT_C(0xa1a2a3a4a5a6a7a8, 0xa1a2a3a4a5a6a7a8, 0x8182838485868788, 0x9192939495969798) }, /* non-imm8 opcodes */ 10104 }; 10105 10106 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 10107 { 10108 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10109 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10110 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_000h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10111 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_0E7h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10112 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_091h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10113 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10114 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_0E7h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10115 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_091h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10116 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_YMM3_icebp_c16, 255, RM_REG, T_AVX_256, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10117 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10118 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_000h_icebp_c16, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10119 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_0E7h_icebp_c16, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10120 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_091h_icebp_c16, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10121 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10122 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_0E7h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10123 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_091h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10124 }; 10125 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 10126 { 10127 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10128 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10129 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_000h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10130 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_0E7h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10131 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_091h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10132 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10133 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_0E7h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10134 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_091h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10135 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_YMM3_icebp_c32, 255, RM_REG, T_AVX_256, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10136 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10137 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_000h_icebp_c32, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10138 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_0E7h_icebp_c32, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10139 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_091h_icebp_c32, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10140 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10141 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_0E7h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10142 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_091h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10143 }; 10144 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 10145 { 10146 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10147 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10148 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_000h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10149 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_0E7h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10150 { bs3CpuInstr3_vpermilpd_XMM1_XMM2_091h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10151 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10152 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10153 { bs3CpuInstr3_vpermilpd_XMM1_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10154 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_YMM3_icebp_c64, 255, RM_REG, T_AVX_256, 1, 2, 3, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10155 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 2, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10156 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_000h_icebp_c64, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10157 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_0E7h_icebp_c64, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10158 { bs3CpuInstr3_vpermilpd_YMM1_YMM2_091h_icebp_c64, 255, RM_REG, T_AVX_256, 1, 2, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10159 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10160 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10161 { bs3CpuInstr3_vpermilpd_YMM1_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10162 { bs3CpuInstr3_vpermilpd_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10163 { bs3CpuInstr3_vpermilpd_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10164 { bs3CpuInstr3_vpermilpd_XMM8_XMM9_000h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10165 { bs3CpuInstr3_vpermilpd_XMM8_XMM9_0E7h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10166 { bs3CpuInstr3_vpermilpd_XMM8_XMM9_091h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10167 { bs3CpuInstr3_vpermilpd_XMM8_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10168 { bs3CpuInstr3_vpermilpd_XMM8_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10169 { bs3CpuInstr3_vpermilpd_XMM8_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10170 { bs3CpuInstr3_vpermilpd_YMM8_YMM9_YMM10_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 10, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10171 { bs3CpuInstr3_vpermilpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 8, 9, 255, RT_ELEMENTS(s_aValuesAll), s_aValuesAll }, 10172 { bs3CpuInstr3_vpermilpd_YMM8_YMM9_000h_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10173 { bs3CpuInstr3_vpermilpd_YMM8_YMM9_0E7h_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10174 { bs3CpuInstr3_vpermilpd_YMM8_YMM9_091h_icebp_c64, 255, RM_REG, T_AVX_256, 8, 9, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10175 { bs3CpuInstr3_vpermilpd_YMM8_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 8, 255, 0, RT_ELEMENTS(s_aValues00), s_aValues00 }, 10176 { bs3CpuInstr3_vpermilpd_YMM8_FSxBX_0E7h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 8, 255, 0, RT_ELEMENTS(s_aValuesE7), s_aValuesE7 }, 10177 { bs3CpuInstr3_vpermilpd_YMM8_FSxBX_091h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 8, 255, 0, RT_ELEMENTS(s_aValues91), s_aValues91 }, 10178 }; 10179 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 10180 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 10181 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 10182 g_aXcptConfig6, RT_ELEMENTS(g_aXcptConfig6)); 10183 } 10184 10034 10185 10035 10186 … … 15042 15193 #if defined (ALL_TESTS) 15043 15194 { "vpermilps", bs3CpuInstr3_vpermilps, 0 }, 15195 { "vpermilpd", bs3CpuInstr3_vpermilpd, 0 }, 15044 15196 #endif 15045 15197 };
Note:
See TracChangeset
for help on using the changeset viewer.