Changeset 103641 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Mar 2, 2024 12:45:21 AM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 162001
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
-
bs3-cpu-instr-2-template.c (modified) (29 diffs)
-
bs3-cpu-instr-2-template.mac (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.c
r103611 r103641 73 73 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9b_r8b); \ 74 74 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_r13b); \ 75 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx14_r11b); \ 76 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r11b_DSx12); \ 75 77 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dl_r14b); \ 76 78 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r8b_bl); \ … … 78 80 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8w_cx); \ 79 81 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r15w_r10w); \ 82 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx15_r12w); \ 83 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9w_DSx8); \ 80 84 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r13w_ax); \ 81 85 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _si_r9w); \ … … 84 88 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9d_ecx); \ 85 89 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r13d_r14d); \ 90 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx10_r11d); \ 91 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r14d_DSx12); \ 86 92 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15d_esi); \ 87 93 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _eax_r10d); \ … … 90 96 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_rax); \ 91 97 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rdx_r10); \ 98 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_rax); \ 99 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx12_r8); \ 100 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_DSxBX); \ 101 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_DSx12); \ 92 102 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15_rsi); \ 93 103 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _rbx_r14); 94 104 95 105 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_8_64BIT(a_Ins) \ 96 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _sil_dil), X86_GREG_xSI, X86_GREG_xDI }, \ 97 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9b_r8b), X86_GREG_x9, X86_GREG_x8 }, \ 98 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_r13b), X86_GREG_xAX, X86_GREG_x13 }, 106 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _sil_dil), X86_GREG_xSI, X86_GREG_xDI, false, false }, \ 107 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9b_r8b), X86_GREG_x9, X86_GREG_x8, false, false }, \ 108 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_r13b), X86_GREG_xAX, X86_GREG_x13, false, false }, \ 109 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx14_r11b), X86_GREG_x14, X86_GREG_x11, true, false }, 99 110 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_8_64BIT(a_Ins) \ 100 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dl_r14b), X86_GREG_xDX, X86_GREG_x14 }, \ 101 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r8b_bl), X86_GREG_x8, X86_GREG_xBX }, 111 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dl_r14b), X86_GREG_xDX, X86_GREG_x14, false, false }, \ 112 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r8b_bl), X86_GREG_x8, X86_GREG_xBX, false, false }, \ 113 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r11b_DSx12), X86_GREG_x11, X86_GREG_x12, false, true }, 102 114 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_16_64BIT(a_Ins) \ 103 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8w_cx), X86_GREG_x8, X86_GREG_xCX }, \ 104 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r15w_r10w), X86_GREG_x15, X86_GREG_x10 }, 115 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8w_cx), X86_GREG_x8, X86_GREG_xCX, false, false }, \ 116 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r15w_r10w), X86_GREG_x15, X86_GREG_x10, false, false }, \ 117 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx15_r12w), X86_GREG_x15, X86_GREG_x12, true, false }, 105 118 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_16_64BIT(a_Ins) \ 106 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r13w_ax), X86_GREG_x13, X86_GREG_xAX }, \ 107 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _si_r9w), X86_GREG_xSI, X86_GREG_x9 }, 119 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r13w_ax), X86_GREG_x13, X86_GREG_xAX, false, false }, \ 120 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _si_r9w), X86_GREG_xSI, X86_GREG_x9, false, false }, \ 121 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9w_DSx8), X86_GREG_x9, X86_GREG_x8, false, true }, 108 122 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_32_64BIT(a_Ins) \ 109 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_r8d), X86_GREG_xAX, X86_GREG_x8 }, \ 110 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9d_ecx), X86_GREG_x9, X86_GREG_xCX }, \ 111 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r13d_r14d), X86_GREG_x13, X86_GREG_x14 }, 123 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_r8d), X86_GREG_xAX, X86_GREG_x8, false, false }, \ 124 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9d_ecx), X86_GREG_x9, X86_GREG_xCX, false, false }, \ 125 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r13d_r14d), X86_GREG_x13, X86_GREG_x14, false, false }, \ 126 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx10_r11d), X86_GREG_x10, X86_GREG_x11, true, false }, 112 127 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_32_64BIT(a_Ins) \ 113 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15d_esi), X86_GREG_x15, X86_GREG_xSI }, \ 114 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _eax_r10d), X86_GREG_xAX, X86_GREG_x10 }, 128 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15d_esi), X86_GREG_x15, X86_GREG_xSI, false, false }, \ 129 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _eax_r10d), X86_GREG_xAX, X86_GREG_x10, false, false }, \ 130 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r14d_DSx12), X86_GREG_x14, X86_GREG_x12, false, true }, 115 131 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_64(a_Ins) \ 116 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_rbx), X86_GREG_xAX, X86_GREG_xBX }, \ 117 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_rax), X86_GREG_x8, X86_GREG_xAX }, \ 118 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rdx_r10), X86_GREG_xDX, X86_GREG_x10 }, 132 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_rbx), X86_GREG_xAX, X86_GREG_xBX, false, false }, \ 133 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_rax), X86_GREG_x8, X86_GREG_xAX, false, false }, \ 134 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rdx_r10), X86_GREG_xDX, X86_GREG_x10, false, false }, \ 135 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_rax), X86_GREG_xBX, X86_GREG_xAX, true, false }, \ 136 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx12_r8), X86_GREG_x12, X86_GREG_x8, true, false }, 119 137 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_64(a_Ins) \ 120 138 BS3CPUINSTR2CMNBINTEST_ENTRIES_64(a_Ins) \ 121 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15_rsi), X86_GREG_x15, X86_GREG_xSI }, \ 122 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _rbx_r14), X86_GREG_xBX, X86_GREG_x14 }, 139 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15_rsi), X86_GREG_x15, X86_GREG_xSI, false, false }, \ 140 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _rbx_r14), X86_GREG_xBX, X86_GREG_x14, false, false }, \ 141 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_DSxBX), X86_GREG_xAX, X86_GREG_xBX, false, true }, \ 142 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_DSx12), X86_GREG_x8, X86_GREG_x12, false, true }, 123 143 # else 124 144 # define BS3CPUINSTR2_BINARY_OP_PROTO64(a_Ins) … … 136 156 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_bh); \ 137 157 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_ah); \ 158 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ah); \ 159 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_bl); \ 160 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_DSxBX); \ 161 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_DSxBX); \ 138 162 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dh_cl); \ 139 163 /* 16-bit */ \ 140 164 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _di_si); \ 141 165 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _cx_bp); \ 166 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_si); \ 167 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ax); \ 168 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _si_DSxDI); \ 169 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ax_DSxBX); \ 142 170 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _bp_bx); \ 143 171 /* 32-bit */ \ … … 145 173 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ecx_ebp); \ 146 174 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _edx_edi); \ 175 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_esi); \ 176 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_eax); \ 177 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_DSxBX); \ 178 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ebp_DSxDI); \ 147 179 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _edi_esi) 148 180 149 181 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_8(a_Ins) \ 150 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_dl), X86_GREG_xAX, X86_GREG_xDX }, \ 151 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_bh), X86_GREG_xCX+16, X86_GREG_xBX+16 }, \ 152 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_ah), X86_GREG_xDX, X86_GREG_xAX+16 }, \ 182 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_dl), X86_GREG_xAX, X86_GREG_xDX, false, false }, \ 183 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_bh), X86_GREG_xCX+16, X86_GREG_xBX+16, false, false }, \ 184 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_ah), X86_GREG_xDX, X86_GREG_xAX+16, false, false }, \ 185 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ah), X86_GREG_xBX, X86_GREG_xAX+16, true, false }, \ 186 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_bl), X86_GREG_xDI, X86_GREG_xBX, true, false }, \ 153 187 BS3CPUINSTR2CMNBINTEST_ENTRIES_8_64BIT(a_Ins) 154 188 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_8(a_Ins) \ 155 189 BS3CPUINSTR2CMNBINTEST_ENTRIES_8(a_Ins) \ 156 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dh_cl), X86_GREG_xDX+16, X86_GREG_xCX }, \ 190 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dh_cl), X86_GREG_xDX+16, X86_GREG_xCX, false, false }, \ 191 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_DSxBX), X86_GREG_xDX, X86_GREG_xBX, false, true }, \ 192 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_DSxBX), X86_GREG_xCX+16, X86_GREG_xBX, false, true }, \ 157 193 BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_8_64BIT(a_Ins) 158 194 159 195 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_16(a_Ins) \ 160 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _di_si), X86_GREG_xDI, X86_GREG_xSI }, \ 161 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _cx_bp), X86_GREG_xCX, X86_GREG_xBP }, \ 196 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _di_si), X86_GREG_xDI, X86_GREG_xSI, false, false }, \ 197 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _cx_bp), X86_GREG_xCX, X86_GREG_xBP, false, false }, \ 198 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_si), X86_GREG_xDI, X86_GREG_xSI, true, false }, \ 199 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ax), X86_GREG_xBX, X86_GREG_xAX, true, false }, \ 162 200 BS3CPUINSTR2CMNBINTEST_ENTRIES_16_64BIT(a_Ins) 163 201 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_16(a_Ins) \ 164 202 BS3CPUINSTR2CMNBINTEST_ENTRIES_16(a_Ins) \ 165 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _bp_bx), X86_GREG_xBP, X86_GREG_xBX }, \ 203 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _bp_bx), X86_GREG_xBP, X86_GREG_xBX, false, false }, \ 204 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _si_DSxDI), X86_GREG_xSI, X86_GREG_xDI, false, true }, \ 205 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ax_DSxBX), X86_GREG_xAX, X86_GREG_xBX, false, true }, \ 166 206 BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_16_64BIT(a_Ins) 167 207 168 208 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_32(a_Ins) \ 169 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_ebx), X86_GREG_xAX, X86_GREG_xBX }, \ 170 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ecx_ebp), X86_GREG_xCX, X86_GREG_xBP }, \ 171 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _edx_edi), X86_GREG_xDX, X86_GREG_xDI }, \ 209 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_ebx), X86_GREG_xAX, X86_GREG_xBX, false, false }, \ 210 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ecx_ebp), X86_GREG_xCX, X86_GREG_xBP, false, false }, \ 211 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _edx_edi), X86_GREG_xDX, X86_GREG_xDI, false, false }, \ 212 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_esi), X86_GREG_xDI, X86_GREG_xSI, true, false }, \ 213 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_eax), X86_GREG_xBX, X86_GREG_xAX, true, false }, \ 172 214 BS3CPUINSTR2CMNBINTEST_ENTRIES_32_64BIT(a_Ins) 173 215 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_32(a_Ins) \ 174 216 BS3CPUINSTR2CMNBINTEST_ENTRIES_32(a_Ins) \ 175 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _edi_esi), X86_GREG_xDI, X86_GREG_xSI }, \ 217 { BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _edi_esi), X86_GREG_xDI, X86_GREG_xSI, false, false }, \ 218 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_DSxBX), X86_GREG_xAX, X86_GREG_xBX, false, true }, \ 219 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ebp_DSxDI), X86_GREG_xBP, X86_GREG_xDI, false, true }, \ 176 220 BS3CPUINSTR2CMNBINTEST_ENTRIES_32_64BIT(a_Ins) 177 221 … … 447 491 uint8_t idxDstReg; 448 492 uint8_t idxSrcReg; 493 bool fDstMem; 494 bool fSrcMem; 449 495 } BS3CPUINSTR2CMNBINTEST; 450 496 typedef BS3CPUINSTR2CMNBINTEST const BS3_FAR_DATA *PCBS3CPUINSTR2CMNBINTEST; … … 467 513 static uint8_t \ 468 514 RT_CONCAT(bs3CpuInstr2_CommonBinaryU,a_cBits)(uint8_t bMode, PCBS3CPUINSTR2CMNBINTEST paTests, unsigned cTests, uint16_t fPassthruEfl, \ 469 RT_CONCAT(PCBS3CPUINSTR2BIN,a_cBits) paTestData, unsigned cTestData, bool fCarryIn) \ 515 RT_CONCAT(PCBS3CPUINSTR2BIN,a_cBits) paTestData, unsigned cTestData, bool fCarryIn, \ 516 bool fMaskSrcWhenMemDst) \ 470 517 { \ 471 518 BS3REGCTX Ctx; \ … … 473 520 BS3TRAPFRAME TrapFrame; \ 474 521 unsigned iTest; \ 522 struct \ 523 { \ 524 char achPreGuard[8]; \ 525 a_UIntType uData; \ 526 char achPostGuard[8]; \ 527 } Buf = { { '0','1','2','3','4','5','6','7' }, 0, { '8','9','a','b','c','d','e','f'} }; \ 528 a_UIntType uMemExpect = 0; \ 475 529 \ 476 530 /* Ensure the structures are allocated before we sample the stack pointer. */ \ … … 481 535 * Create test context. \ 482 536 */ \ 483 Bs3RegCtxSaveEx(&Ctx, bMode, 512); \537 Bs3RegCtxSaveEx(&Ctx, bMode, 640); \ 484 538 Ctx.rflags.u32 &= ~X86_EFL_RF; \ 485 539 Bs3MemCpy(&CtxExpect, &Ctx, sizeof(CtxExpect)); \ … … 495 549 unsigned const idxDstReg = paTests[iTest].idxDstReg; \ 496 550 unsigned const idxSrcReg = paTests[iTest].idxSrcReg; \ 497 BS3REG const SavedDst = (&Ctx.rax)[idxDstReg & 15]; \ 498 BS3REG const SavedSrc = (&Ctx.rax)[idxSrcReg & 15]; \ 499 a_UIntType RT_FAR * const puCtxDst = &(&Ctx.rax)[idxDstReg & 15].RT_CONCAT(au,a_cBits)[idxDstReg >> 4]; \ 500 a_UIntType RT_FAR * const puCtxSrc = &(&Ctx.rax)[idxSrcReg & 15].RT_CONCAT(au,a_cBits)[idxSrcReg >> 4]; \ 501 a_UIntType RT_FAR * const puCtxExpectDst = &(&CtxExpect.rax)[idxDstReg & 15].RT_CONCAT(au,a_cBits)[idxDstReg >> 4]; \ 502 a_UIntType RT_FAR * const puCtxExpectSrc = &(&CtxExpect.rax)[idxSrcReg & 15].RT_CONCAT(au,a_cBits)[idxSrcReg >> 4]; \ 551 uint16_t const SavedDs = Ctx.ds; \ 552 BS3REG const SavedDst = (&Ctx.rax)[idxDstReg & 15]; /* saves memptr too */ \ 553 BS3REG const SavedSrc = (&Ctx.rax)[idxSrcReg & 15]; /* ditto */ \ 554 a_UIntType RT_FAR * const puCtxDst = paTests[iTest].fDstMem ? &Buf.uData \ 555 : &(&Ctx.rax)[idxDstReg & 15].RT_CONCAT(au,a_cBits)[idxDstReg >> 4]; \ 556 a_UIntType RT_FAR * const puCtxSrc = paTests[iTest].fSrcMem ? &Buf.uData \ 557 : &(&Ctx.rax)[idxSrcReg & 15].RT_CONCAT(au,a_cBits)[idxSrcReg >> 4]; \ 558 a_UIntType RT_FAR * const puCtxExpectDst = paTests[iTest].fDstMem ? &uMemExpect \ 559 : &(&CtxExpect.rax)[idxDstReg & 15].RT_CONCAT(au,a_cBits)[idxDstReg >> 4]; \ 560 a_UIntType RT_FAR * const puCtxExpectSrc = paTests[iTest].fSrcMem ? &uMemExpect \ 561 : &(&CtxExpect.rax)[idxSrcReg & 15].RT_CONCAT(au,a_cBits)[idxSrcReg >> 4]; \ 562 uint64_t RT_FAR * const puMemPtrReg = paTests[iTest].fDstMem ? &(&Ctx.rax)[idxDstReg & 15].u \ 563 : paTests[iTest].fSrcMem ? &(&Ctx.rax)[idxSrcReg & 15].u : NULL; \ 564 uint64_t RT_FAR * const puMemPtrRegExpt= paTests[iTest].fDstMem ? &(&CtxExpect.rax)[idxDstReg & 15].u \ 565 : paTests[iTest].fSrcMem ? &(&CtxExpect.rax)[idxSrcReg & 15].u : NULL; \ 503 566 unsigned iTestData; \ 504 567 /*Bs3TestPrintf("pfnWorker=%p\n", paTests[iTest].pfnWorker);*/ \ … … 508 571 CtxExpect.cs = Ctx.cs; \ 509 572 \ 573 if (puMemPtrReg) \ 574 CtxExpect.ds = Ctx.ds = Ctx.ss; \ 575 \ 510 576 /* \ 511 577 * Loop over the test data and feed it to the worker. \ … … 514 580 { \ 515 581 unsigned iRecompiler; \ 582 a_UIntType const uSrc = !fMaskSrcWhenMemDst | !paTests[iTest].fDstMem \ 583 ? paTestData[iTestData].uSrc2 : paTestData[iTestData].uSrc2 & (a_cBits - 1); \ 584 *puCtxSrc = uSrc; \ 516 585 *puCtxDst = paTestData[iTestData].uSrc1; \ 517 *puCtx Src = paTestData[iTestData].uSrc2; \586 *puCtxExpectSrc = uSrc; \ 518 587 *puCtxExpectDst = paTestData[iTestData].uResult; \ 519 *puCtxExpectSrc = paTestData[iTestData].uSrc2; \520 588 CtxExpect.rflags.u16 &= ~X86_EFL_STATUS_BITS; \ 521 589 CtxExpect.rflags.u16 |= paTestData[iTestData].fEflOut & X86_EFL_STATUS_BITS; \ 590 if (puMemPtrReg) \ 591 { \ 592 *puMemPtrReg = BS3_FP_OFF(&Buf.uData); \ 593 *puMemPtrRegExpt = BS3_FP_OFF(&Buf.uData); \ 594 } \ 522 595 \ 523 596 /* \ … … 530 603 for (iEflVar = 0; iEflVar < RT_ELEMENTS(g_auEflStatusBitsVars); iEflVar++) \ 531 604 { \ 605 if (paTests[iTest].fDstMem) \ 606 *puCtxDst = paTestData[iTestData].uSrc1; \ 607 \ 532 608 Ctx.rflags.u16 &= ~X86_EFL_STATUS_BITS; \ 533 609 if (!fCarryIn) \ … … 547 623 else if (Bs3TestCheckRegCtxEx(&TrapFrame.Ctx, &CtxExpect, 0 /*cbPcAdjust*/, 0 /*cbSpAdjust*/, \ 548 624 0 /*fExtraEfl*/, "mode", (iTest << 8) | (iTestData & 0xff))) \ 549 continue; \ 625 { \ 626 if (!puMemPtrReg) \ 627 continue; \ 628 if (paTests[iTest].fDstMem && Buf.uData != uMemExpect) \ 629 Bs3TestPrintf("Wrong memory result: %" a_szFmt ", expected %" a_szFmt "\n", Buf.uData, uMemExpect); \ 630 else if (!paTests[iTest].fDstMem && Buf.uData != uSrc) \ 631 Bs3TestPrintf("Memory input result modified: %" a_szFmt ", expected %" a_szFmt "\n", Buf.uData, uSrc); \ 632 else \ 633 continue; \ 634 } \ 550 635 /*else { Bs3RegCtxPrint(&Ctx); Bs3TrapPrintFrame(&TrapFrame); }*/ \ 551 Bs3TestPrintf("iTest=%u iData=%u: uSrc1=%" a_szFmt " uSrc2=%" a_szFmt " %s-> %" a_szFmt "\n", \ 552 iTest, iTestData, paTestData[iTestData].uSrc1, paTestData[iTestData].uSrc2, \ 636 Bs3TestPrintf(#a_cBits ": iTest=%u iData=%u: uSrc1=%" a_szFmt "%s uSrc2=%" a_szFmt "%s %s-> %" a_szFmt "\n", \ 637 iTest, iTestData, paTestData[iTestData].uSrc1, paTests[iTest].fDstMem ? " mem" : "", \ 638 paTestData[iTestData].uSrc2, paTests[iTest].fSrcMem ? " mem" : "", \ 553 639 !fCarryIn ? "" : Ctx.rflags.u16 & X86_EFL_CF ? "CF " : "NC ", \ 554 640 paTestData[iTestData].uResult); \ 555 /*ASMHalt();*/ \ 641 Bs3RegCtxPrint(&Ctx); Bs3TrapPrintFrame(&TrapFrame); \ 642 ASMHalt(); \ 556 643 iRecompiler = ~0U - 1; \ 557 644 break; \ … … 560 647 } \ 561 648 \ 649 /* Restore modified context registers (except EFLAGS). */ \ 650 CtxExpect.ds = Ctx.ds = SavedDs; \ 562 651 (&CtxExpect.rax)[idxDstReg & 15].u = (&Ctx.rax)[idxDstReg & 15].u = SavedDst.u; \ 563 652 (&CtxExpect.rax)[idxSrcReg & 15].u = (&Ctx.rax)[idxSrcReg & 15].u = SavedSrc.u; \ … … 584 673 #endif 585 674 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 586 g_aBs3CpuInstr2_and_TestDataU8, g_cBs3CpuInstr2_and_TestDataU8, false /*fCarryIn*/ );675 g_aBs3CpuInstr2_and_TestDataU8, g_cBs3CpuInstr2_and_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 587 676 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 588 g_aBs3CpuInstr2_and_TestDataU16, g_cBs3CpuInstr2_and_TestDataU16, false /*fCarryIn*/ );677 g_aBs3CpuInstr2_and_TestDataU16, g_cBs3CpuInstr2_and_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 589 678 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 590 g_aBs3CpuInstr2_and_TestDataU32, g_cBs3CpuInstr2_and_TestDataU32, false /*fCarryIn*/ );679 g_aBs3CpuInstr2_and_TestDataU32, g_cBs3CpuInstr2_and_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 591 680 #if ARCH_BITS == 64 592 681 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 593 g_aBs3CpuInstr2_and_TestDataU64, g_cBs3CpuInstr2_and_TestDataU64, false /*fCarryIn*/ );682 g_aBs3CpuInstr2_and_TestDataU64, g_cBs3CpuInstr2_and_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 594 683 #endif 595 684 return 0; … … 606 695 #endif 607 696 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 608 g_aBs3CpuInstr2_or_TestDataU8, g_cBs3CpuInstr2_or_TestDataU8, false /*fCarryIn*/ );697 g_aBs3CpuInstr2_or_TestDataU8, g_cBs3CpuInstr2_or_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 609 698 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 610 g_aBs3CpuInstr2_or_TestDataU16, g_cBs3CpuInstr2_or_TestDataU16, false /*fCarryIn*/ );699 g_aBs3CpuInstr2_or_TestDataU16, g_cBs3CpuInstr2_or_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 611 700 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 612 g_aBs3CpuInstr2_or_TestDataU32, g_cBs3CpuInstr2_or_TestDataU32, false /*fCarryIn*/ );701 g_aBs3CpuInstr2_or_TestDataU32, g_cBs3CpuInstr2_or_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 613 702 #if ARCH_BITS == 64 614 703 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 615 g_aBs3CpuInstr2_or_TestDataU64, g_cBs3CpuInstr2_or_TestDataU64, false /*fCarryIn*/ );704 g_aBs3CpuInstr2_or_TestDataU64, g_cBs3CpuInstr2_or_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 616 705 #endif 617 706 return 0; … … 628 717 #endif 629 718 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 630 g_aBs3CpuInstr2_xor_TestDataU8, g_cBs3CpuInstr2_xor_TestDataU8, false /*fCarryIn*/ );719 g_aBs3CpuInstr2_xor_TestDataU8, g_cBs3CpuInstr2_xor_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 631 720 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 632 g_aBs3CpuInstr2_xor_TestDataU16, g_cBs3CpuInstr2_xor_TestDataU16, false /*fCarryIn*/ );721 g_aBs3CpuInstr2_xor_TestDataU16, g_cBs3CpuInstr2_xor_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 633 722 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 634 g_aBs3CpuInstr2_xor_TestDataU32, g_cBs3CpuInstr2_xor_TestDataU32, false /*fCarryIn*/ );723 g_aBs3CpuInstr2_xor_TestDataU32, g_cBs3CpuInstr2_xor_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 635 724 #if ARCH_BITS == 64 636 725 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 637 g_aBs3CpuInstr2_xor_TestDataU64, g_cBs3CpuInstr2_xor_TestDataU64, false /*fCarryIn*/ );726 g_aBs3CpuInstr2_xor_TestDataU64, g_cBs3CpuInstr2_xor_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 638 727 #endif 639 728 return 0; … … 650 739 #endif 651 740 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 652 g_aBs3CpuInstr2_test_TestDataU8, g_cBs3CpuInstr2_test_TestDataU8, false /*fCarryIn*/ );741 g_aBs3CpuInstr2_test_TestDataU8, g_cBs3CpuInstr2_test_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 653 742 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 654 g_aBs3CpuInstr2_test_TestDataU16, g_cBs3CpuInstr2_test_TestDataU16, false /*fCarryIn*/ );743 g_aBs3CpuInstr2_test_TestDataU16, g_cBs3CpuInstr2_test_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 655 744 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 656 g_aBs3CpuInstr2_test_TestDataU32, g_cBs3CpuInstr2_test_TestDataU32, false /*fCarryIn*/ );745 g_aBs3CpuInstr2_test_TestDataU32, g_cBs3CpuInstr2_test_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 657 746 #if ARCH_BITS == 64 658 747 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 659 g_aBs3CpuInstr2_test_TestDataU64, g_cBs3CpuInstr2_test_TestDataU64, false /*fCarryIn*/ );748 g_aBs3CpuInstr2_test_TestDataU64, g_cBs3CpuInstr2_test_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 660 749 #endif 661 750 return 0; … … 672 761 #endif 673 762 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 674 g_aBs3CpuInstr2_add_TestDataU8, g_cBs3CpuInstr2_add_TestDataU8, false /*fCarryIn*/ );763 g_aBs3CpuInstr2_add_TestDataU8, g_cBs3CpuInstr2_add_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 675 764 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 676 g_aBs3CpuInstr2_add_TestDataU16, g_cBs3CpuInstr2_add_TestDataU16, false /*fCarryIn*/ );765 g_aBs3CpuInstr2_add_TestDataU16, g_cBs3CpuInstr2_add_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 677 766 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 678 g_aBs3CpuInstr2_add_TestDataU32, g_cBs3CpuInstr2_add_TestDataU32, false /*fCarryIn*/ );767 g_aBs3CpuInstr2_add_TestDataU32, g_cBs3CpuInstr2_add_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 679 768 #if ARCH_BITS == 64 680 769 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 681 g_aBs3CpuInstr2_add_TestDataU64, g_cBs3CpuInstr2_add_TestDataU64, false /*fCarryIn*/ );770 g_aBs3CpuInstr2_add_TestDataU64, g_cBs3CpuInstr2_add_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 682 771 #endif 683 772 return 0; … … 694 783 #endif 695 784 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 696 g_aBs3CpuInstr2_adc_TestDataU8, g_cBs3CpuInstr2_adc_TestDataU8, true /*fCarryIn*/ );785 g_aBs3CpuInstr2_adc_TestDataU8, g_cBs3CpuInstr2_adc_TestDataU8, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 697 786 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 698 g_aBs3CpuInstr2_adc_TestDataU16, g_cBs3CpuInstr2_adc_TestDataU16, true /*fCarryIn*/ );787 g_aBs3CpuInstr2_adc_TestDataU16, g_cBs3CpuInstr2_adc_TestDataU16, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 699 788 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 700 g_aBs3CpuInstr2_adc_TestDataU32, g_cBs3CpuInstr2_adc_TestDataU32, true /*fCarryIn*/ );789 g_aBs3CpuInstr2_adc_TestDataU32, g_cBs3CpuInstr2_adc_TestDataU32, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 701 790 #if ARCH_BITS == 64 702 791 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 703 g_aBs3CpuInstr2_adc_TestDataU64, g_cBs3CpuInstr2_adc_TestDataU64, true /*fCarryIn*/ );792 g_aBs3CpuInstr2_adc_TestDataU64, g_cBs3CpuInstr2_adc_TestDataU64, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 704 793 #endif 705 794 return 0; … … 716 805 #endif 717 806 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 718 g_aBs3CpuInstr2_sub_TestDataU8, g_cBs3CpuInstr2_sub_TestDataU8, false /*fCarryIn*/ );807 g_aBs3CpuInstr2_sub_TestDataU8, g_cBs3CpuInstr2_sub_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 719 808 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 720 g_aBs3CpuInstr2_sub_TestDataU16, g_cBs3CpuInstr2_sub_TestDataU16, false /*fCarryIn*/ );809 g_aBs3CpuInstr2_sub_TestDataU16, g_cBs3CpuInstr2_sub_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 721 810 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 722 g_aBs3CpuInstr2_sub_TestDataU32, g_cBs3CpuInstr2_sub_TestDataU32, false /*fCarryIn*/ );811 g_aBs3CpuInstr2_sub_TestDataU32, g_cBs3CpuInstr2_sub_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 723 812 #if ARCH_BITS == 64 724 813 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 725 g_aBs3CpuInstr2_sub_TestDataU64, g_cBs3CpuInstr2_sub_TestDataU64, false /*fCarryIn*/ );814 g_aBs3CpuInstr2_sub_TestDataU64, g_cBs3CpuInstr2_sub_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 726 815 #endif 727 816 return 0; … … 738 827 #endif 739 828 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 740 g_aBs3CpuInstr2_sbb_TestDataU8, g_cBs3CpuInstr2_sbb_TestDataU8, true /*fCarryIn*/ );829 g_aBs3CpuInstr2_sbb_TestDataU8, g_cBs3CpuInstr2_sbb_TestDataU8, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 741 830 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 742 g_aBs3CpuInstr2_sbb_TestDataU16, g_cBs3CpuInstr2_sbb_TestDataU16, true /*fCarryIn*/ );831 g_aBs3CpuInstr2_sbb_TestDataU16, g_cBs3CpuInstr2_sbb_TestDataU16, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 743 832 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 744 g_aBs3CpuInstr2_sbb_TestDataU32, g_cBs3CpuInstr2_sbb_TestDataU32, true /*fCarryIn*/ );833 g_aBs3CpuInstr2_sbb_TestDataU32, g_cBs3CpuInstr2_sbb_TestDataU32, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 745 834 #if ARCH_BITS == 64 746 835 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 747 g_aBs3CpuInstr2_sbb_TestDataU64, g_cBs3CpuInstr2_sbb_TestDataU64, true /*fCarryIn*/ );836 g_aBs3CpuInstr2_sbb_TestDataU64, g_cBs3CpuInstr2_sbb_TestDataU64, true /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 748 837 #endif 749 838 return 0; … … 760 849 #endif 761 850 bs3CpuInstr2_CommonBinaryU8(bMode, s_aTests8, RT_ELEMENTS(s_aTests8), 0 /*fPassthruEfl*/, 762 g_aBs3CpuInstr2_cmp_TestDataU8, g_cBs3CpuInstr2_cmp_TestDataU8, false /*fCarryIn*/ );851 g_aBs3CpuInstr2_cmp_TestDataU8, g_cBs3CpuInstr2_cmp_TestDataU8, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 763 852 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), 0 /*fPassthruEfl*/, 764 g_aBs3CpuInstr2_cmp_TestDataU16, g_cBs3CpuInstr2_cmp_TestDataU16, false /*fCarryIn*/ );853 g_aBs3CpuInstr2_cmp_TestDataU16, g_cBs3CpuInstr2_cmp_TestDataU16, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 765 854 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), 0 /*fPassthruEfl*/, 766 g_aBs3CpuInstr2_cmp_TestDataU32, g_cBs3CpuInstr2_cmp_TestDataU32, false /*fCarryIn*/ );855 g_aBs3CpuInstr2_cmp_TestDataU32, g_cBs3CpuInstr2_cmp_TestDataU32, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 767 856 #if ARCH_BITS == 64 768 857 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), 0 /*fPassthruEfl*/, 769 g_aBs3CpuInstr2_cmp_TestDataU64, g_cBs3CpuInstr2_cmp_TestDataU64, false /*fCarryIn*/ );858 g_aBs3CpuInstr2_cmp_TestDataU64, g_cBs3CpuInstr2_cmp_TestDataU64, false /*fCarryIn*/, false /*fMaskSrcWhenMemDst*/); 770 859 #endif 771 860 return 0; … … 783 872 #endif 784 873 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 785 g_aBs3CpuInstr2_bt_TestDataU16, g_cBs3CpuInstr2_bt_TestDataU16, false /*fCarryIn*/ );874 g_aBs3CpuInstr2_bt_TestDataU16, g_cBs3CpuInstr2_bt_TestDataU16, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 786 875 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 787 g_aBs3CpuInstr2_bt_TestDataU32, g_cBs3CpuInstr2_bt_TestDataU32, false /*fCarryIn*/ );876 g_aBs3CpuInstr2_bt_TestDataU32, g_cBs3CpuInstr2_bt_TestDataU32, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 788 877 #if ARCH_BITS == 64 789 878 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 790 g_aBs3CpuInstr2_bt_TestDataU64, g_cBs3CpuInstr2_bt_TestDataU64, false /*fCarryIn*/ );879 g_aBs3CpuInstr2_bt_TestDataU64, g_cBs3CpuInstr2_bt_TestDataU64, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 791 880 #endif 792 881 return 0; … … 802 891 #endif 803 892 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 804 g_aBs3CpuInstr2_btc_TestDataU16, g_cBs3CpuInstr2_btc_TestDataU16, false /*fCarryIn*/ );893 g_aBs3CpuInstr2_btc_TestDataU16, g_cBs3CpuInstr2_btc_TestDataU16, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 805 894 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 806 g_aBs3CpuInstr2_btc_TestDataU32, g_cBs3CpuInstr2_btc_TestDataU32, false /*fCarryIn*/ );895 g_aBs3CpuInstr2_btc_TestDataU32, g_cBs3CpuInstr2_btc_TestDataU32, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 807 896 #if ARCH_BITS == 64 808 897 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 809 g_aBs3CpuInstr2_btc_TestDataU64, g_cBs3CpuInstr2_btc_TestDataU64, false /*fCarryIn*/ );898 g_aBs3CpuInstr2_btc_TestDataU64, g_cBs3CpuInstr2_btc_TestDataU64, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 810 899 #endif 811 900 return 0; … … 821 910 #endif 822 911 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 823 g_aBs3CpuInstr2_btr_TestDataU16, g_cBs3CpuInstr2_btr_TestDataU16, false /*fCarryIn*/ );912 g_aBs3CpuInstr2_btr_TestDataU16, g_cBs3CpuInstr2_btr_TestDataU16, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 824 913 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 825 g_aBs3CpuInstr2_btr_TestDataU32, g_cBs3CpuInstr2_btr_TestDataU32, false /*fCarryIn*/ );914 g_aBs3CpuInstr2_btr_TestDataU32, g_cBs3CpuInstr2_btr_TestDataU32, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 826 915 #if ARCH_BITS == 64 827 916 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 828 g_aBs3CpuInstr2_btr_TestDataU64, g_cBs3CpuInstr2_btr_TestDataU64, false /*fCarryIn*/ );917 g_aBs3CpuInstr2_btr_TestDataU64, g_cBs3CpuInstr2_btr_TestDataU64, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 829 918 #endif 830 919 return 0; … … 840 929 #endif 841 930 bs3CpuInstr2_CommonBinaryU16(bMode, s_aTests16, RT_ELEMENTS(s_aTests16), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 842 g_aBs3CpuInstr2_bts_TestDataU16, g_cBs3CpuInstr2_bts_TestDataU16, false /*fCarryIn*/ );931 g_aBs3CpuInstr2_bts_TestDataU16, g_cBs3CpuInstr2_bts_TestDataU16, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 843 932 bs3CpuInstr2_CommonBinaryU32(bMode, s_aTests32, RT_ELEMENTS(s_aTests32), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 844 g_aBs3CpuInstr2_bts_TestDataU32, g_cBs3CpuInstr2_bts_TestDataU32, false /*fCarryIn*/ );933 g_aBs3CpuInstr2_bts_TestDataU32, g_cBs3CpuInstr2_bts_TestDataU32, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 845 934 #if ARCH_BITS == 64 846 935 bs3CpuInstr2_CommonBinaryU64(bMode, s_aTests64, RT_ELEMENTS(s_aTests64), BS3CPUINSTR2_BTx_PASSTHRU_EFL, 847 g_aBs3CpuInstr2_bts_TestDataU64, g_cBs3CpuInstr2_bts_TestDataU64, false /*fCarryIn*/ );936 g_aBs3CpuInstr2_bts_TestDataU64, g_cBs3CpuInstr2_bts_TestDataU64, false /*fCarryIn*/, true /*fMaskSrcWhenMemDst*/); 848 937 #endif 849 938 return 0; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.mac
r103611 r103641 87 87 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _ch %+ _bh, %1 ch, bh 88 88 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _dl %+ _ah, %1 dl, ah 89 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxBX %+ _ah, %1 [xBX], ah 90 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxDI %+ _bl, %1 [xDI], bl 89 91 %if %3 != 0 92 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _dl %+ _DSxBX, %1 dl, [xBX] 93 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _ch %+ _DSxBX, %1 ch, [xBX] 90 94 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _dh %+ _cl, ALT_INSTRUCTION8_ %+ %1 dh, cl 91 95 %endif … … 94 98 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r9b %+ _r8b, %1 r9b, r8b 95 99 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _al %+ _r13b, %1 al, r13b 100 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSx14 %+ _r11b, %1 [r14], r11b 96 101 %if %3 != 0 102 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r11b %+ _DSx12, %1 r11b, [r12] 97 103 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _dl %+ _r14b, ALT_INSTRUCTION8_ %+ %1 dl, r14b 98 104 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _r8b %+ _bl, ALT_INSTRUCTION8_ %+ %1 r8b, bl … … 103 109 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _di %+ _si, %1 di, si 104 110 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _cx %+ _bp, %1 cx, bp 111 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxDI %+ _si, %1 [xDI], si 112 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxBX %+ _ax, %1 [xBX], ax 105 113 %if %3 != 0 114 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _si %+ _DSxDI, %1 si, [xDI] 115 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _ax %+ _DSxBX, %1 ax, [xBX] 106 116 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _bp %+ _bx, ALT_INSTRUCTION16_ %+ %1 bp, bx 107 117 %endif … … 109 119 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r8w %+ _cx, %1 r8w, cx 110 120 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r15w %+ _r10w, %1 r15w, r10w 121 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSx15 %+ _r12w, %1 [r15], r12w 111 122 %if %3 != 0 123 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r9w %+ _DSx8, %1 r9w, [r8] 112 124 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _r13w %+ _ax, ALT_INSTRUCTION16_ %+ %1 r13w, ax 113 125 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _si %+ _r9w, ALT_INSTRUCTION16_ %+ %1 si, r9w … … 118 130 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _ecx %+ _ebp, %1 ecx, ebp 119 131 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _edx %+ _edi, %1 edx, edi 132 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxDI %+ _esi, %1 [xDI], esi 133 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxBX %+ _eax, %1 [xBX], eax 120 134 %if %3 != 0 135 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _eax %+ _DSxBX, %1 eax, [xBX] 136 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _ebp %+ _DSxDI, %1 ebp, [xDI] 121 137 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _edi %+ _esi, ALT_INSTRUCTION32_ %+ %1 edi, esi 122 138 %endif … … 125 141 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r9d %+ _ecx, %1 r9d, ecx 126 142 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r13d %+ _r14d, %1 r13d, r14d 143 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSx10 %+ _r11d, %1 [r10], r11d 127 144 %if %3 != 0 145 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r14d %+ _DSx12, %1 r14d, [r12] 128 146 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _r15d %+ _esi, ALT_INSTRUCTION32_ %+ %1 r15d, esi 129 147 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _eax %+ _r10d, ALT_INSTRUCTION32_ %+ %1 eax, r10d … … 135 153 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r8 %+ _rax, %1 r8, rax 136 154 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _rdx %+ _r10, %1 rdx, r10 155 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSxBX %+ _rax, %1 [rbx], rax 156 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _DSx12 %+ _r8, %1 [r12], r8 137 157 %if %3 != 0 158 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _rax %+ _DSxBX, %1 rax, [rbx] 159 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_ %+ %1 %+ _r8 %+ _DSx12, %1 r8, [r12] 138 160 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _r15 %+ _rsi, ALT_INSTRUCTION64_ %+ %1 r15, rsi 139 161 BS3CPUINSTR2_EMIT_INSTR_UD2 bs3CpuInstr2_alt_ %+ %1 %+ _rbx %+ _r14, ALT_INSTRUCTION64_ %+ %1 rbx, r14
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