Changeset 103642 in vbox

Timestamp:

Mar 2, 2024 1:01:44 AM (13 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

162002

Message:

VMM/IEM: Use native emitter for the memory variants in IEMOP_BODY_BINARY_rv_rm when available. bugref:10376

File:

• trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h

@@ -136 +136 @@
             case IEMMODE_16BIT: \
                 IEM_MC_BEGIN(3, 1, a_f16BitMcFlag, 0); \
-                IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
+                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
+                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
+                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t,   u16Src,  1); \
-                IEM_MC_ARG(uint32_t *, pEFlags, 2); \
-                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
-                \
-                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
-                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_FETCH_MEM_U16(u16Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
-                IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
-                IEM_MC_REF_EFLAGS(pEFlags); \
-                IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \
-                \
+                IEM_MC_NATIVE_IF(a_fNativeArchs) { \
+                    IEM_MC_LOCAL(uint16_t,  u16Dst); \
+                    IEM_MC_FETCH_GREG_U16(u16Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
+                    /** @todo IEM_MC_LOCAL_EFLAGS(uEFlags); */ \
+                    IEM_MC_LOCAL(uint32_t,  uEFlags); \
+                    IEM_MC_FETCH_EFLAGS(uEFlags); \
+                    IEM_MC_NATIVE_EMIT_4(RT_CONCAT3(iemNativeEmit_,a_EmitterBasename,_r_r_efl), u16Dst, u16Src, uEFlags, 16); \
+                    IEM_MC_STORE_GREG_U16(IEM_GET_MODRM_REG(pVCpu, bRm), u16Dst); \
+                    IEM_MC_COMMIT_EFLAGS(uEFlags); \
+                } IEM_MC_NATIVE_ELSE() { \
+                    IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
+                    IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
+                    IEM_MC_ARG(uint32_t *, pEFlags, 2); \
+                    IEM_MC_REF_EFLAGS(pEFlags); \
+                    IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU16, pu16Dst, u16Src, pEFlags); \
+                } IEM_MC_NATIVE_ENDIF(); \
                 IEM_MC_ADVANCE_RIP_AND_FINISH(); \
                 IEM_MC_END(); \
@@ -154 +163 @@
             case IEMMODE_32BIT: \
                 IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
-                IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
+                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
+                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
+                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t,   u32Src,  1); \
-                IEM_MC_ARG(uint32_t *, pEFlags, 2); \
-                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
-                \
-                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
-                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_FETCH_MEM_U32(u32Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
-                IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
-                IEM_MC_REF_EFLAGS(pEFlags); \
-                IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \
-                \
-                if (a_fModifiesDstReg) \
-                    IEM_MC_CLEAR_HIGH_GREG_U64(IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
+                IEM_MC_NATIVE_IF(a_fNativeArchs) { \
+                    IEM_MC_LOCAL(uint32_t,  u32Dst); \
+                    IEM_MC_FETCH_GREG_U32(u32Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
+                    /** @todo IEM_MC_LOCAL_EFLAGS(uEFlags); */ \
+                    IEM_MC_LOCAL(uint32_t,  uEFlags); \
+                    IEM_MC_FETCH_EFLAGS(uEFlags); \
+                    IEM_MC_NATIVE_EMIT_4(RT_CONCAT3(iemNativeEmit_,a_EmitterBasename,_r_r_efl), u32Dst, u32Src, uEFlags, 32); \
+                    IEM_MC_STORE_GREG_U32(IEM_GET_MODRM_REG(pVCpu, bRm), u32Dst); \
+                    IEM_MC_COMMIT_EFLAGS(uEFlags); \
+                } IEM_MC_NATIVE_ELSE() { \
+                    IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
+                    IEM_MC_ARG(uint32_t *, pEFlags, 2); \
+                    IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
+                    IEM_MC_REF_EFLAGS(pEFlags); \
+                    IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU32, pu32Dst, u32Src, pEFlags); \
+                    if (a_fModifiesDstReg) \
+                        IEM_MC_CLEAR_HIGH_GREG_U64(IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
+                } IEM_MC_NATIVE_ENDIF(); \
                 IEM_MC_ADVANCE_RIP_AND_FINISH(); \
                 IEM_MC_END(); \
@@ -174 +192 @@
             case IEMMODE_64BIT: \
                 IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
-                IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
+                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
+                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
+                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t,   u64Src,  1); \
-                IEM_MC_ARG(uint32_t *, pEFlags, 2); \
-                IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
-                \
-                IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
-                IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_FETCH_MEM_U64(u64Src, pVCpu->iem.s.iEffSeg, GCPtrEffDst); \
-                IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
-                IEM_MC_REF_EFLAGS(pEFlags); \
-                IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \
-                \
+                IEM_MC_NATIVE_IF(a_fNativeArchs) { \
+                    IEM_MC_LOCAL(uint64_t,  u64Dst); \
+                    IEM_MC_FETCH_GREG_U64(u64Dst, IEM_GET_MODRM_REG(pVCpu, bRm)); \
+                    /** @todo IEM_MC_LOCAL_EFLAGS(uEFlags); */ \
+                    IEM_MC_LOCAL(uint32_t,  uEFlags); \
+                    IEM_MC_FETCH_EFLAGS(uEFlags); \
+                    IEM_MC_NATIVE_EMIT_4(RT_CONCAT3(iemNativeEmit_,a_EmitterBasename,_r_r_efl), u64Dst, u64Src, uEFlags, 64); \
+                    IEM_MC_STORE_GREG_U64(IEM_GET_MODRM_REG(pVCpu, bRm), u64Dst); \
+                    IEM_MC_COMMIT_EFLAGS(uEFlags); \
+                } IEM_MC_NATIVE_ELSE() { \
+                    IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
+                    IEM_MC_ARG(uint32_t *, pEFlags, 2); \
+                    IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_REG(pVCpu, a_bRm)); \
+                    IEM_MC_REF_EFLAGS(pEFlags); \
+                    IEM_MC_CALL_VOID_AIMPL_3(a_fnNormalU64, pu64Dst, u64Src, pEFlags); \
+                } IEM_MC_NATIVE_ENDIF(); \
                 IEM_MC_ADVANCE_RIP_AND_FINISH(); \
                 IEM_MC_END(); \