Changeset 103656 in vbox
- Timestamp:
- Mar 4, 2024 9:24:10 AM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 162016
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/Makefile.kmk
r103654 r103656 386 386 MISCBINS += bs3-cpu-instr-2 387 387 bs3-cpu-instr-2_TEMPLATE = VBoxBS3KitImg 388 bs3-cpu-instr-2_INCS = . 388 bs3-cpu-instr-2_INCS = . $(bs3-cpu-instr-2_0_OUTDIR) 389 389 bs3-cpu-instr-2_DEFS = BS3_CMN_INSTANTIATE_FILE1=bs3-cpu-instr-2-template.c 390 390 bs3-cpu-instr-2_DEFS += BS3_MODE_INSTANTIATE_FILE1=bs3-cpu-instr-2-template.c … … 398 398 bs3kit/bs3-cmn-instantiate.c32 \ 399 399 bs3kit/bs3-cmn-instantiate.c64 400 bs3-cpu-instr-2_CLEANS = $(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm-auto.h 401 402 bs3-cpu-instr-2_bs3kit/bs3-cmn-instantiate-x0.c16_DEPS = $(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm-auto.h 403 bs3-cpu-instr-2_bs3kit/bs3-cmn-instantiate.c32_DEPS = $(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm-auto.h 404 bs3-cpu-instr-2_bs3kit/bs3-cmn-instantiate.c64_DEPS = $(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm-auto.h 405 406 $$(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm-auto.h: \ 407 $$(VBoxBs3Obj2Hdr_1_TARGET) $$(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm.o16 408 $(VBoxBs3Obj2Hdr_1_TARGET) --output "$@" "$(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm.o16" 409 400 410 bs3-cpu-instr-2-template.o:: \ 401 411 $$(bs3-cpu-instr-2_0_OUTDIR)/bs3kit/bs3-cmn-instantiate-x0.o16 \ … … 403 413 $$(bs3-cpu-instr-2_0_OUTDIR)/bs3kit/bs3-cmn-instantiate.o64 \ 404 414 $$(bs3-cpu-instr-2_0_OUTDIR)/bs3-cpu-instr-2-asm.o16 415 416 405 417 406 418 BLDPROGS.amd64 += bs3-cpu-instr-2-gen -
trunk/src/VBox/ValidationKit/bootsectors/VBoxBs3Obj2Hdr.cpp
r103655 r103656 114 114 while (offRec + 1 < cbRec) 115 115 { 116 uint8_t constcch = pbRec[offRec++];116 uint8_t cch = pbRec[offRec++]; 117 117 OMF_CHECK_RET(cch, PUBDEF); 118 118 const char *pchName = (const char *)&pbRec[offRec]; … … 143 143 /* Produce the headerfile output. */ 144 144 if (*pchName == '_') /** @todo add more filtering */ 145 fprintf(pOutput, "extern FNBS3FAR %-*.*s;\n", cch - 1, cch - 1, pchName + 1); 145 { 146 cch -= 1; 147 pchName += 1; 148 149 static const char s_szEndProc[] = "_EndProc"; 150 if ( cch < sizeof(s_szEndProc) 151 || memcmp(&pchName[cch - sizeof(s_szEndProc) + 1], RT_STR_TUPLE(s_szEndProc)) != 0) 152 fprintf(pOutput, "extern FNBS3FAR %-*.*s;\n", cch, cch, pchName); 153 } 146 154 } 147 155 cPubDefs++; … … 254 262 continue; 255 263 } 256 if (strcmp(pszArg, " --output") == 0)264 if (strcmp(pszArg, "output") == 0) 257 265 pszArg = "o"; 258 else if (strcmp(pszArg, " --help") == 0)266 else if (strcmp(pszArg, "help") == 0) 259 267 pszArg = "h"; 260 else if (strcmp(pszArg, " --version") == 0)268 else if (strcmp(pszArg, "version") == 0) 261 269 pszArg = "V"; 262 270 else … … 280 288 case 'o': 281 289 if (*pszArg) 282 psz Output= pszArg;290 pszValue = pszArg; 283 291 else if (i + 1 < argc) 284 psz Output= argv[++i];292 pszValue = argv[++i]; 285 293 else 286 294 { … … 330 338 { 331 339 /* Make sure we've got an output file. */ 332 if (!pszOutput || strcmp(pszOutput, "-") == 0) 333 pOutput = stdout; 334 else 335 { 336 pOutput = fopen(pszOutput, "r"); 337 if (!pOutput) 338 { 339 fprintf(stderr, "error: Failed to open '%s' for writing!\n", pszOutput); 340 return RTEXITCODE_FAILURE; 341 } 342 } 343 340 if (!pOutput) 341 { 342 if (!pszOutput || strcmp(pszOutput, "-") == 0) 343 pOutput = stdout; 344 else 345 { 346 pOutput = fopen(pszOutput, "w"); 347 if (!pOutput) 348 { 349 fprintf(stderr, "error: Failed to open '%s' for writing!\n", pszOutput); 350 return RTEXITCODE_FAILURE; 351 } 352 } 353 } 344 354 345 355 /* Read in the object file and process it. */ -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.c
r103641 r103656 43 43 #include "bs3-cpu-instr-2.h" 44 44 #include "bs3-cpu-instr-2-data.h" 45 #include "bs3-cpu-instr-2-asm-auto.h" 45 46 46 47 … … 68 69 #ifdef BS3_INSTANTIATING_CMN 69 70 # if ARCH_BITS == 64 70 # define BS3CPUINSTR2_BINARY_OP_PROTO64(a_Ins) \71 /* 8-bit */ \72 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _sil_dil); \73 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9b_r8b); \74 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_r13b); \75 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx14_r11b); \76 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r11b_DSx12); \77 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dl_r14b); \78 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r8b_bl); \79 /* 16-bit */ \80 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8w_cx); \81 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r15w_r10w); \82 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx15_r12w); \83 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9w_DSx8); \84 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r13w_ax); \85 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _si_r9w); \86 /* 32-bit */ \87 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_r8d); \88 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r9d_ecx); \89 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r13d_r14d); \90 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx10_r11d); \91 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r14d_DSx12); \92 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15d_esi); \93 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _eax_r10d); \94 /* 64-bit */ \95 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_rbx); \96 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_rax); \97 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rdx_r10); \98 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_rax); \99 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSx12_r8); \100 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _rax_DSxBX); \101 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_DSx12); \102 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _r15_rsi); \103 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _rbx_r14);104 105 71 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_8_64BIT(a_Ins) \ 106 72 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _sil_dil), X86_GREG_xSI, X86_GREG_xDI, false, false }, \ … … 142 108 { BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _r8_DSx12), X86_GREG_x8, X86_GREG_x12, false, true }, 143 109 # else 144 # define BS3CPUINSTR2_BINARY_OP_PROTO64(a_Ins)145 110 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_8_64BIT(aIns) 146 111 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_16_64BIT(aIns) … … 150 115 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_ALT_32_64BIT(aIns) 151 116 # endif 152 # define BS3CPUINSTR2_BINARY_OP_PROTO(a_Ins) \153 BS3CPUINSTR2_BINARY_OP_PROTO64(a_Ins) \154 /* 8-bit */ \155 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _al_dl); \156 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_bh); \157 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_ah); \158 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ah); \159 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_bl); \160 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _dl_DSxBX); \161 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ch_DSxBX); \162 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _dh_cl); \163 /* 16-bit */ \164 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _di_si); \165 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _cx_bp); \166 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_si); \167 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_ax); \168 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _si_DSxDI); \169 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ax_DSxBX); \170 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _bp_bx); \171 /* 32-bit */ \172 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_ebx); \173 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ecx_ebp); \174 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _edx_edi); \175 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxDI_esi); \176 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _DSxBX_eax); \177 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _eax_DSxBX); \178 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_ ## a_Ins ## _ebp_DSxDI); \179 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_alt_ ## a_Ins ## _edi_esi)180 117 181 118 # define BS3CPUINSTR2CMNBINTEST_ENTRIES_8(a_Ins) \ … … 220 157 BS3CPUINSTR2CMNBINTEST_ENTRIES_32_64BIT(a_Ins) 221 158 222 223 BS3CPUINSTR2_BINARY_OP_PROTO(and);224 BS3CPUINSTR2_BINARY_OP_PROTO(or);225 BS3CPUINSTR2_BINARY_OP_PROTO(xor);226 BS3CPUINSTR2_BINARY_OP_PROTO(test);227 228 BS3CPUINSTR2_BINARY_OP_PROTO(add);229 BS3CPUINSTR2_BINARY_OP_PROTO(adc);230 BS3CPUINSTR2_BINARY_OP_PROTO(sub);231 BS3CPUINSTR2_BINARY_OP_PROTO(sbb);232 BS3CPUINSTR2_BINARY_OP_PROTO(cmp);233 234 BS3CPUINSTR2_BINARY_OP_PROTO(bt); /* ignore 8-bit protos */235 BS3CPUINSTR2_BINARY_OP_PROTO(btc);236 BS3CPUINSTR2_BINARY_OP_PROTO(btr);237 BS3CPUINSTR2_BINARY_OP_PROTO(bts);238 239 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mul_xBX_ud2);240 241 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_imul_xBX_ud2);242 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_imul_xCX_xBX_ud2);243 244 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_div_xBX_ud2);245 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_idiv_xBX_ud2);246 247 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_AX_BX_ud2);248 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_EAX_EBX_ud2);249 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_RAX_RBX_ud2);250 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_AX_FSxBX_ud2);251 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_EAX_FSxBX_ud2);252 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsf_RAX_FSxBX_ud2);253 254 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_AX_BX_ud2);255 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_EAX_EBX_ud2);256 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_RAX_RBX_ud2);257 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_AX_FSxBX_ud2);258 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_EAX_FSxBX_ud2);259 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsf_RAX_FSxBX_ud2);260 261 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_AX_BX_ud2);262 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_EAX_EBX_ud2);263 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_RAX_RBX_ud2);264 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_AX_FSxBX_ud2);265 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_EAX_FSxBX_ud2);266 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_tzcnt_RAX_FSxBX_ud2);267 268 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_AX_BX_ud2);269 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_EAX_EBX_ud2);270 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_RAX_RBX_ud2);271 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_AX_FSxBX_ud2);272 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_EAX_FSxBX_ud2);273 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_tzcnt_RAX_FSxBX_ud2);274 275 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_AX_BX_ud2);276 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_EAX_EBX_ud2);277 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_RAX_RBX_ud2);278 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_AX_FSxBX_ud2);279 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_EAX_FSxBX_ud2);280 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bsr_RAX_FSxBX_ud2);281 282 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_AX_BX_ud2);283 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_EAX_EBX_ud2);284 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_RAX_RBX_ud2);285 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_AX_FSxBX_ud2);286 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_EAX_FSxBX_ud2);287 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_bsr_RAX_FSxBX_ud2);288 289 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_AX_BX_ud2);290 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_EAX_EBX_ud2);291 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_RAX_RBX_ud2);292 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_AX_FSxBX_ud2);293 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_EAX_FSxBX_ud2);294 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lzcnt_RAX_FSxBX_ud2);295 296 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_AX_BX_ud2);297 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_EAX_EBX_ud2);298 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_RAX_RBX_ud2);299 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_AX_FSxBX_ud2);300 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_EAX_FSxBX_ud2);301 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_f2_lzcnt_RAX_FSxBX_ud2);302 303 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_RBX_RDX_2_icebp);304 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_EDX_2_icebp);305 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_EDX_2_icebp_L1);306 # if ARCH_BITS == 64307 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_EDX_2_icebp_X1);308 # endif309 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_EDX_2_icebp_V1);310 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_EDX_2_icebp_V15);311 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_RBX_DSxDI_68_icebp);312 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rorx_EBX_DSxDI_36_icebp);313 314 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_andn_RAX_RCX_RBX_icebp);315 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_andn_RAX_RCX_FSxBX_icebp);316 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_andn_EAX_ECX_EBX_icebp);317 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_andn_EAX_ECX_FSxBX_icebp);318 319 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bextr_RAX_RBX_RCX_icebp);320 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bextr_RAX_FSxBX_RCX_icebp);321 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bextr_EAX_EBX_ECX_icebp);322 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bextr_EAX_FSxBX_ECX_icebp);323 324 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bzhi_RAX_RBX_RCX_icebp);325 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bzhi_RAX_FSxBX_RCX_icebp);326 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bzhi_EAX_EBX_ECX_icebp);327 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_bzhi_EAX_FSxBX_ECX_icebp);328 329 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pdep_RAX_RCX_RBX_icebp);330 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pdep_RAX_RCX_FSxBX_icebp);331 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pdep_EAX_ECX_EBX_icebp);332 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pdep_EAX_ECX_FSxBX_icebp);333 334 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pext_RAX_RCX_RBX_icebp);335 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pext_RAX_RCX_FSxBX_icebp);336 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pext_EAX_ECX_EBX_icebp);337 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_pext_EAX_ECX_FSxBX_icebp);338 339 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shlx_RAX_RBX_RCX_icebp);340 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shlx_RAX_FSxBX_RCX_icebp);341 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shlx_EAX_EBX_ECX_icebp);342 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shlx_EAX_FSxBX_ECX_icebp);343 344 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_sarx_RAX_RBX_RCX_icebp);345 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_sarx_RAX_FSxBX_RCX_icebp);346 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_sarx_EAX_EBX_ECX_icebp);347 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_sarx_EAX_FSxBX_ECX_icebp);348 349 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shrx_RAX_RBX_RCX_icebp);350 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shrx_RAX_FSxBX_RCX_icebp);351 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shrx_EAX_EBX_ECX_icebp);352 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_shrx_EAX_FSxBX_ECX_icebp);353 354 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsr_RAX_RBX_icebp);355 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsr_RAX_FSxBX_icebp);356 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsr_EAX_EBX_icebp);357 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsr_EAX_FSxBX_icebp);358 359 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsmsk_RAX_RBX_icebp);360 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsmsk_RAX_FSxBX_icebp);361 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsmsk_EAX_EBX_icebp);362 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsmsk_EAX_FSxBX_icebp);363 364 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsi_RAX_RBX_icebp);365 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsi_RAX_FSxBX_icebp);366 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsi_EAX_EBX_icebp);367 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_blsi_EAX_FSxBX_icebp);368 369 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_RAX_RCX_RBX_RDX_icebp);370 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_RCX_RCX_RBX_RDX_icebp);371 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_RAX_RCX_FSxBX_RDX_icebp);372 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_EAX_ECX_EBX_EDX_icebp);373 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_ECX_ECX_EBX_EDX_icebp);374 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_mulx_EAX_ECX_FSxBX_EDX_icebp);375 376 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_AX_BX_icebp);377 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_EAX_EBX_icebp);378 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_RAX_RBX_icebp);379 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_AX_FSxBX_icebp);380 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_EAX_FSxBX_icebp);381 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_RAX_FSxBX_icebp);382 383 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BL_icebp);384 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_byte_FSxBX_icebp);385 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BX_icebp);386 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_word_FSxBX_icebp);387 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_EBX_icebp);388 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_dword_FSxBX_icebp);389 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_RBX_icebp);390 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp);391 392 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_EBX_icebp);393 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_dword_FSxBX_icebp);394 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_RBX_icebp);395 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_qword_FSxBX_icebp);396 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_EAX_EBX_icebp);397 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_EAX_dword_FSxBX_icebp);398 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_RAX_RBX_icebp);399 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_RAX_qword_FSxBX_icebp);400 401 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_AX_word_FSxBX_icebp);402 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_EAX_dword_FSxBX_icebp);403 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_RAX_qword_FSxBX_icebp);404 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_word_FSxBX_AX_icebp);405 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_dword_FSxBX_EAX_icebp);406 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_movbe_qword_FSxBX_RAX_icebp);407 408 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_cmpxchg8b_FSxDI_icebp);409 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_cmpxchg8b_FSxDI_icebp);410 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_o16_cmpxchg8b_FSxDI_icebp);411 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_o16_cmpxchg8b_FSxDI_icebp);412 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_repz_cmpxchg8b_FSxDI_icebp);413 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_repz_cmpxchg8b_FSxDI_icebp);414 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_repnz_cmpxchg8b_FSxDI_icebp);415 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_repnz_cmpxchg8b_FSxDI_icebp);416 417 # if ARCH_BITS == 64418 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_cmpxchg16b_rdi_ud2);419 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_cmpxchg16b_rdi_ud2);420 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_o16_cmpxchg16b_rdi_ud2);421 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_o16_cmpxchg16b_rdi_ud2);422 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_repz_cmpxchg16b_rdi_ud2);423 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_repz_cmpxchg16b_rdi_ud2);424 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_repnz_cmpxchg16b_rdi_ud2);425 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_lock_repnz_cmpxchg16b_rdi_ud2);426 427 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrfsbase_rbx_ud2);428 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrfsbase_ebx_ud2);429 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrfsbase_rbx_rdfsbase_rcx_ud2);430 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrfsbase_ebx_rdfsbase_ecx_ud2);431 432 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrgsbase_rbx_ud2);433 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrgsbase_ebx_ud2);434 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrgsbase_rbx_rdgsbase_rcx_ud2);435 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_wrgsbase_ebx_rdgsbase_ecx_ud2);436 437 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rdfsbase_rbx_ud2);438 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rdfsbase_ebx_ud2);439 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rdgsbase_rbx_ud2);440 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_rdgsbase_ebx_ud2);441 # endif442 159 #endif 443 160
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