Changeset 103762 in vbox

Timestamp:

Mar 11, 2024 12:34:12 PM (9 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement native emitter for IEM_MC_CLEAR_YREG_128_UP(), bugref:10614

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllInstPython.py (modified) (1 diff)
• VMMAll/IEMAllN8veRecompiler.cpp (modified) (1 diff)
• include/IEMN8veRecompilerEmit.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

@@ -2995 +2995 @@
     'IEM_MC_CLEAR_HIGH_GREG_U64':                                (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_CLEAR_XREG_U32_MASK':                                (McBlock.parseMcGeneric,           True,  True,  False, ),
-    'IEM_MC_CLEAR_YREG_128_UP':                                  (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_CLEAR_YREG_128_UP':                                  (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_COMMIT_EFLAGS':                                      (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_COPY_XREG_U128':                                     (McBlock.parseMcGeneric,           True,  True,  True,  ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

@@ -15178 +15178 @@
 }
 
+
+#define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) \
+    off = iemNativeEmitSimdClearYregHighU128(pReNative, off, a_iYReg)
+
+/** Emits code for IEM_MC_CLEAR_YREG_128_UP. */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSimdClearYregHighU128(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iYReg)
+{
+    uint8_t const idxSimdReg = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg),
+                                                                       kIemNativeGstSimdRegLdStSz_High128, kIemNativeGstRegUse_ForFullWrite);
+
+    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
+    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
+
+    /* Free but don't flush the register. */
+    iemNativeSimdRegFreeTmp(pReNative, idxSimdReg);
+
+    return off;
+}
 
 #endif /* IEMNATIVE_WITH_SIMD_REG_ALLOCATOR */

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -7132 +7132 @@
 }
 
+
+/**
+ * Emits a vecdst[128:255] = 0 store.
+ */
+DECL_FORCE_INLINE(uint32_t)
+iemNativeEmitSimdZeroVecRegHighU128Ex(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecReg)
+{
+#ifdef RT_ARCH_AMD64
+    /* vmovdqa xmm, xmm. This will clear the upper half of ymm */
+    if (iVecReg < 8)
+    {
+        pCodeBuf[off++] = X86_OP_VEX2;
+        pCodeBuf[off++] = 0xf9;
+    }
+    else
+    {
+        pCodeBuf[off++] = X86_OP_VEX3;
+        pCodeBuf[off++] = 0x41;
+        pCodeBuf[off++] = 0x79;
+    }
+    pCodeBuf[off++] = 0x6f;
+    pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iVecReg & 7, iVecReg & 7);
+#elif defined(RT_ARCH_ARM64)
+    /* ASSUMES that there are two adjacent 128-bit registers available for the 256-bit value. */
+    Assert(!(iVecReg & 0x1));
+    /* eor vecreg, vecreg, vecreg */
+    pCodeBuf[off++] = Armv8A64MkVecInstrEor(iVecReg + 1, iVecReg + 1, iVecReg + 1);
+#else
+# error "port me"
+#endif
+    return off;
+}
+
+
+/**
+ * Emits a vecdst[128:255] = 0 store.
+ */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSimdZeroVecRegHighU128(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iVecReg)
+{
+#ifdef RT_ARCH_AMD64
+    off = iemNativeEmitSimdZeroVecRegHighU128Ex(iemNativeInstrBufEnsure(pReNative, off, 7), off, iVecReg);
+#elif defined(RT_ARCH_ARM64)
+    off = iemNativeEmitSimdZeroVecRegHighU128Ex(iemNativeInstrBufEnsure(pReNative, off, 1), off, iVecReg);
+#else
+# error "port me"
+#endif
+    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
+    return off;
+}
+
 #endif /* IEMNATIVE_WITH_SIMD_REG_ALLOCATOR */