- Timestamp:
- Mar 13, 2024 4:28:30 PM (14 months ago)
- svn:sync-xref-src-repo-rev:
- 162205
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r103834 r103835 3140 3140 'IEM_MC_IF_GREG_BIT_SET': (McBlock.parseMcGenericCond, True, False, False, ), 3141 3141 'IEM_MC_IF_LOCAL_IS_Z': (McBlock.parseMcGenericCond, True, False, False, ), 3142 'IEM_MC_IF_MXCSR_XCPT_PENDING': (McBlock.parseMcGenericCond, True, True, False,),3142 'IEM_MC_IF_MXCSR_XCPT_PENDING': (McBlock.parseMcGenericCond, True, True, g_fNativeSimd), 3143 3143 'IEM_MC_IF_RCX_IS_NZ': (McBlock.parseMcGenericCond, True, False, True, ), 3144 3144 'IEM_MC_IF_RCX_IS_NOT_ONE': (McBlock.parseMcGenericCond, True, False, True, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
r103834 r103835 1760 1760 } 1761 1761 1762 1763 #ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR 1764 1765 #define IEM_MC_IF_MXCSR_XCPT_PENDING() \ 1766 off = iemNativeEmitIfMxcsrXcptPending(pReNative, off); \ 1767 do { 1768 1769 /** Emits code for IEM_MC_IF_MXCSR_XCPT_PENDING. */ 1770 DECL_INLINE_THROW(uint32_t) 1771 iemNativeEmitIfMxcsrXcptPending(PIEMRECOMPILERSTATE pReNative, uint32_t off) 1772 { 1773 PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative, &off); 1774 1775 uint8_t const idxGstMxcsrReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_MxCsr, 1776 kIemNativeGstRegUse_Calculation); 1777 uint8_t const idxRegTmp = iemNativeRegAllocTmp(pReNative, &off); 1778 1779 1780 /* mov tmp0, mxcsr */ 1781 off = iemNativeEmitLoadGprFromGpr(pReNative, off, idxRegTmp, idxGstMxcsrReg); 1782 /* tmp0 &= X86_MXCSR_XCPT_FLAGS */ 1783 off = iemNativeEmitAndGprByImm(pReNative, off, idxRegTmp, X86_MXCSR_XCPT_FLAGS); 1784 /* mxcsr &= X86_MXCSR_XCPT_MASK */ 1785 off = iemNativeEmitAndGprByImm(pReNative, off, idxGstMxcsrReg, X86_MXCSR_XCPT_MASK); 1786 /* mxcsr ~= mxcsr */ 1787 off = iemNativeEmitInvBitsGpr(pReNative, off, idxGstMxcsrReg, idxGstMxcsrReg); 1788 /* mxcsr >>= X86_MXCSR_XCPT_MASK_SHIFT */ 1789 off = iemNativeEmitShiftGprRight(pReNative, off, idxGstMxcsrReg, X86_MXCSR_XCPT_MASK_SHIFT); 1790 /* tmp0 &= mxcsr */ 1791 off = iemNativeEmitAndGprByGpr(pReNative, off, idxRegTmp, idxGstMxcsrReg); 1792 1793 off = iemNativeEmitTestIfGprIsZeroAndJmpToLabel(pReNative, off, idxRegTmp, true /*f64Bit*/, pEntry->idxLabelElse); 1794 iemNativeRegFreeTmp(pReNative, idxGstMxcsrReg); 1795 iemNativeRegFreeTmp(pReNative, idxRegTmp); 1796 1797 iemNativeCondStartIfBlock(pReNative, off); 1798 return off; 1799 } 1800 1801 #endif 1762 1802 1763 1803 -
trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h
r103834 r103835 7060 7060 7061 7061 /** 7062 * Emits a gprdst = ~gprsrc store. 7063 */ 7064 DECL_FORCE_INLINE_THROW(uint32_t) 7065 iemNativeEmitInvBitsGprEx(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc, bool f64Bit = true) 7066 { 7067 #ifdef RT_ARCH_AMD64 7068 if (iGprDst != iGprSrc) 7069 { 7070 /* mov gprdst, gprsrc. */ 7071 if (f64Bit) 7072 off = iemNativeEmitLoadGprFromGprEx(pCodeBuf, off, iGprDst, iGprSrc); 7073 else 7074 off = iemNativeEmitLoadGprFromGpr32Ex(pCodeBuf, off, iGprDst, iGprSrc); /* Bits 32:63 are cleared. */ 7075 } 7076 7077 /* not gprdst */ 7078 if (f64Bit || iGprDst >= 8) 7079 pCodeBuf[off++] = (f64Bit ? X86_OP_REX_W : 0) 7080 | (iGprDst >= 8 ? X86_OP_REX_B : 0); 7081 pCodeBuf[off++] = 0xf7; 7082 pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, 2, iGprDst & 7); 7083 #elif defined(RT_ARCH_ARM64) 7084 pCodeBuf[off++] = Armv8A64MkInstrOrn(iGprDst, iGprSrc, ARMV8_A64_REG_XZR, f64Bit); 7085 #else 7086 # error "port me" 7087 #endif 7088 return off; 7089 } 7090 7091 7092 /** 7093 * Emits a gprdst = ~gprsrc store. 7094 */ 7095 DECL_INLINE_THROW(uint32_t) 7096 iemNativeEmitInvBitsGpr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint8_t iGprSrc, bool f64Bit = true) 7097 { 7098 #ifdef RT_ARCH_AMD64 7099 off = iemNativeEmitInvBitsGprEx(iemNativeInstrBufEnsure(pReNative, off, 9), off, iGprDst, iGprSrc, f64Bit); 7100 #elif defined(RT_ARCH_ARM64) 7101 off = iemNativeEmitInvBitsGprEx(iemNativeInstrBufEnsure(pReNative, off, 1), off, iGprDst, iGprSrc, f64Bit); 7102 #else 7103 # error "port me" 7104 #endif 7105 IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off); 7106 return off; 7107 } 7108 7109 7110 /** 7062 7111 * Emits a 128-bit vector register store to a VCpu value. 7063 7112 */
Note:
See TracChangeset
for help on using the changeset viewer.