Changeset 103899 in vbox
- Timestamp:
- Mar 18, 2024 3:57:16 PM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 162271
- Location:
- trunk
- Files:
-
- 4 edited
-
include/VBox/disopcode-x86-amd64.h (modified) (2 diffs)
-
src/VBox/VMM/VMMAll/IEMAllInstPython.py (modified) (6 diffs)
-
src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h (modified) (12 diffs)
-
src/VBox/VMM/include/IEMInternal.h (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/disopcode-x86-amd64.h
r103717 r103899 1432 1432 1433 1433 /* For making IEM / bs3-cpu-generated-1 happy: */ 1434 #define OP_PARM_Ew_WO OP_PARM_Ew /**< Annotates write only operand. */ 1434 1435 #define OP_PARM_Ed_WO OP_PARM_Ed /**< Annotates write only operand. */ 1435 1436 #define OP_PARM_Eq (OP_PARM_E+OP_PARM_q) … … 1469 1470 #define OP_PARM_VqHi_WO OP_PARM_Vdq /**< Annotates that only YMM/XMM[127:64] are written. */ 1470 1471 #define OP_PARM_VqZx_WO OP_PARM_Vq /**< Annotates that the registers get their upper bits cleared */ 1472 #define OP_PARM_Vqq_WO OP_PARM_Vq /**< Annotates write only operand. */ 1471 1473 #define OP_PARM_VsdZx_WO OP_PARM_Vsd /**< Annotates that the registers get their upper bits cleared. */ 1472 1474 #define OP_PARM_VssZx_WO OP_PARM_Vss /**< Annotates that the registers get their upper bits cleared. */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r103898 r103899 238 238 'Eq_WO': ( 'IDX_UseModRM', 'rm', '%Eq', 'Eq', 'RM', ), 239 239 'Ew': ( 'IDX_UseModRM', 'rm', '%Ew', 'Ew', 'RM', ), 240 'Ew_WO': ( 'IDX_UseModRM', 'rm', '%Ew', 'Ew', 'RM', ), 240 241 'Ev': ( 'IDX_UseModRM', 'rm', '%Ev', 'Ev', 'RM', ), 241 242 'Ey': ( 'IDX_UseModRM', 'rm', '%Ey', 'Ey', 'RM', ), … … 256 257 'Wq_WO': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', 'RM', ), 257 258 'WqZxReg_WO': ( 'IDX_UseModRM', 'rm', '%Wq', 'Wq', 'RM', ), 259 'Wqq': ( 'IDX_UseModRM', 'rm', '%Wqq', 'Wqq', 'RM', ), 260 'Wqq_WO': ( 'IDX_UseModRM', 'rm', '%Wqq', 'Wqq', 'RM', ), 258 261 'Wx': ( 'IDX_UseModRM', 'rm', '%Wx', 'Wx', 'RM', ), 259 262 'Wx_WO': ( 'IDX_UseModRM', 'rm', '%Wx', 'Wx', 'RM', ), … … 262 265 'Uq': ( 'IDX_UseModRM', 'rm', '%Uq', 'Uq', 'REG' ), 263 266 'UqHi': ( 'IDX_UseModRM', 'rm', '%Uq', 'UqHi', 'REG' ), 267 'Uqq': ( 'IDX_UseModRM', 'rm', '%Uqq', 'Uqq', 'REG' ), 264 268 'Uss': ( 'IDX_UseModRM', 'rm', '%Uss', 'Uss', 'REG' ), 265 269 'Uss_WO': ( 'IDX_UseModRM', 'rm', '%Uss', 'Uss', 'REG' ), … … 317 321 'VqHi_WO': ( 'IDX_UseModRM', 'reg', '%Vdq', 'VdqHi', '', ), 318 322 'VqZx_WO': ( 'IDX_UseModRM', 'reg', '%Vq', 'VqZx', '', ), 323 'Vqq': ( 'IDX_UseModRM', 'reg', '%Vqq', 'Vqq', '', ), 324 'Vqq_WO': ( 'IDX_UseModRM', 'reg', '%Vqq', 'Vqq', '', ), 319 325 'Vx': ( 'IDX_UseModRM', 'reg', '%Vx', 'Vx', '', ), 320 326 'Vx_WO': ( 'IDX_UseModRM', 'reg', '%Vx', 'Vx', '', ), … … 328 334 'Hq': ( 'IDX_UseModRM', 'vvvv', '%Hq', 'Hq', 'V', ), 329 335 'HqHi': ( 'IDX_UseModRM', 'vvvv', '%Hq', 'HqHi', 'V', ), 336 'Hqq': ( 'IDX_UseModRM', 'vvvv', '%Hqq', 'Hqq', 'V', ), 330 337 'Hx': ( 'IDX_UseModRM', 'vvvv', '%Hx', 'Hx', 'V', ), 331 338 … … 376 383 377 384 ## IEMFORM_XXX mappings. 378 g_kdIemForms = { # sEncoding, [ sWhere1, ... ] opcodesub ), 379 'RM': ( 'ModR/M', [ 'reg', 'rm' ], '', ), 380 'RM_REG': ( 'ModR/M', [ 'reg', 'rm' ], '11 mr/reg', ), 381 'RM_MEM': ( 'ModR/M', [ 'reg', 'rm' ], '!11 mr/reg', ), 382 'RMI': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '', ), 383 'RMI_REG': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '11 mr/reg', ), 384 'RMI_MEM': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '!11 mr/reg', ), 385 'MR': ( 'ModR/M', [ 'rm', 'reg' ], '', ), 386 'MR_REG': ( 'ModR/M', [ 'rm', 'reg' ], '11 mr/reg', ), 387 'MR_MEM': ( 'ModR/M', [ 'rm', 'reg' ], '!11 mr/reg', ), 388 'MRI': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '', ), 389 'MRI_REG': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '11 mr/reg', ), 390 'MRI_MEM': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '!11 mr/reg', ), 391 'M': ( 'ModR/M', [ 'rm', ], '', ), 392 'M_REG': ( 'ModR/M', [ 'rm', ], '', ), 393 'M_MEM': ( 'ModR/M', [ 'rm', ], '', ), 394 'M1': ( 'ModR/M', [ 'rm', '1' ], '', ), 395 'M_CL': ( 'ModR/M', [ 'rm', 'CL' ], '', ), # shl/rcl/ror/++ 396 'MI': ( 'ModR/M', [ 'rm', 'imm' ], '', ), 397 'MI_REG': ( 'ModR/M', [ 'rm', 'imm' ], '11 mr/reg', ), 398 'MI_MEM': ( 'ModR/M', [ 'rm', 'imm' ], '!11 mr/reg', ), 399 'R': ( 'ModR/M', [ 'reg', ], '', ), 400 401 'VEX_RM': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '', ), 402 'VEX_RM_REG': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '11 mr/reg', ), 403 'VEX_RM_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '!11 mr/reg', ), 404 'VEX_MR': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '', ), 405 'VEX_MR_REG': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '11 mr/reg', ), 406 'VEX_MR_MEM': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '!11 mr/reg', ), 407 'VEX_MRI': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '', ), 408 'VEX_MRI_REG': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '11 mr/reg', ), 409 'VEX_MRI_MEM': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '!11 mr/reg', ), 410 'VEX_M': ( 'VEX.ModR/M', [ 'rm', ], '' ), 411 'VEX_M_REG': ( 'VEX.ModR/M', [ 'rm', ], '' ), 412 'VEX_M_MEM': ( 'VEX.ModR/M', [ 'rm', ], '' ), 413 'VEX_R': ( 'VEX.ModR/M', [ 'reg', ], '' ), 414 'VEX_RVM': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '', ), 415 'VEX_RVM_REG': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '11 mr/reg', ), 416 'VEX_RVM_MEM': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '!11 mr/reg', ), 417 'VEX_RMV': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '', ), 418 'VEX_RMV_REG': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '11 mr/reg', ), 419 'VEX_RMV_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '!11 mr/reg', ), 420 'VEX_RMI': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '', ), 421 'VEX_RMI_REG': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '11 mr/reg', ), 422 'VEX_RMI_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '!11 mr/reg', ), 423 'VEX_MVR': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '', ), 424 'VEX_MVR_REG': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '11 mr/reg', ), 425 'VEX_MVR_MEM': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '!11 mr/reg', ), 426 427 'VEX_VM': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '', ), 428 'VEX_VM_REG': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '11 mr/reg', ), 429 'VEX_VM_MEM': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '!11 mr/reg', ), 430 'VEX_VMI': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '', ), 431 'VEX_VMI_REG': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '11 mr/reg', ), 432 'VEX_VMI_MEM': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '!11 mr/reg', ), 433 434 'FIXED': ( 'fixed', None, '', ), 385 g_kdIemForms = { # sEncoding, [ sWhere1, ... ] opcodesub ), 386 'RM': ( 'ModR/M', [ 'reg', 'rm' ], '', ), 387 'RM_REG': ( 'ModR/M', [ 'reg', 'rm' ], '11 mr/reg', ), 388 'RM_MEM': ( 'ModR/M', [ 'reg', 'rm' ], '!11 mr/reg', ), 389 'RMI': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '', ), 390 'RMI_REG': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '11 mr/reg', ), 391 'RMI_MEM': ( 'ModR/M', [ 'reg', 'rm', 'imm' ], '!11 mr/reg', ), 392 'MR': ( 'ModR/M', [ 'rm', 'reg' ], '', ), 393 'MR_REG': ( 'ModR/M', [ 'rm', 'reg' ], '11 mr/reg', ), 394 'MR_MEM': ( 'ModR/M', [ 'rm', 'reg' ], '!11 mr/reg', ), 395 'MRI': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '', ), 396 'MRI_REG': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '11 mr/reg', ), 397 'MRI_MEM': ( 'ModR/M', [ 'rm', 'reg', 'imm' ], '!11 mr/reg', ), 398 'M': ( 'ModR/M', [ 'rm', ], '', ), 399 'M_REG': ( 'ModR/M', [ 'rm', ], '', ), 400 'M_MEM': ( 'ModR/M', [ 'rm', ], '', ), 401 'M1': ( 'ModR/M', [ 'rm', '1' ], '', ), 402 'M_CL': ( 'ModR/M', [ 'rm', 'CL' ], '', ), # shl/rcl/ror/++ 403 'MI': ( 'ModR/M', [ 'rm', 'imm' ], '', ), 404 'MI_REG': ( 'ModR/M', [ 'rm', 'imm' ], '11 mr/reg', ), 405 'MI_MEM': ( 'ModR/M', [ 'rm', 'imm' ], '!11 mr/reg', ), 406 'R': ( 'ModR/M', [ 'reg', ], '', ), 407 408 'VEX_RM': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '', ), 409 'VEX_RM_REG': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '11 mr/reg', ), 410 'VEX_RM_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm' ], '!11 mr/reg', ), 411 'VEX_MR': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '', ), 412 'VEX_MR_REG': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '11 mr/reg', ), 413 'VEX_MR_MEM': ( 'VEX.ModR/M', [ 'rm', 'reg' ], '!11 mr/reg', ), 414 'VEX_MRI': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '', ), 415 'VEX_MRI_REG': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '11 mr/reg', ), 416 'VEX_MRI_MEM': ( 'VEX.ModR/M', [ 'rm', 'reg', 'imm' ], '!11 mr/reg', ), 417 'VEX_M': ( 'VEX.ModR/M', [ 'rm', ], '' ), 418 'VEX_M_REG': ( 'VEX.ModR/M', [ 'rm', ], '' ), 419 'VEX_M_MEM': ( 'VEX.ModR/M', [ 'rm', ], '' ), 420 'VEX_R': ( 'VEX.ModR/M', [ 'reg', ], '' ), 421 'VEX_RVM': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '', ), 422 'VEX_RVM_REG': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '11 mr/reg', ), 423 'VEX_RVM_MEM': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm' ], '!11 mr/reg', ), 424 'VEX_RVMI': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm', 'imm' ], '', ), 425 'VEX_RVMI_REG': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm', 'imm' ], '11 mr/reg', ), 426 'VEX_RVMI_MEM': ( 'VEX.ModR/M', [ 'reg', 'vvvv', 'rm', 'imm' ], '!11 mr/reg', ), 427 'VEX_RMV': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '', ), 428 'VEX_RMV_REG': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '11 mr/reg', ), 429 'VEX_RMV_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm', 'vvvv' ], '!11 mr/reg', ), 430 'VEX_RMI': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '', ), 431 'VEX_RMI_REG': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '11 mr/reg', ), 432 'VEX_RMI_MEM': ( 'VEX.ModR/M', [ 'reg', 'rm', 'imm' ], '!11 mr/reg', ), 433 'VEX_MVR': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '', ), 434 'VEX_MVR_REG': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '11 mr/reg', ), 435 'VEX_MVR_MEM': ( 'VEX.ModR/M', [ 'rm', 'vvvv', 'reg' ], '!11 mr/reg', ), 436 437 'VEX_VM': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '', ), 438 'VEX_VM_REG': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '11 mr/reg', ), 439 'VEX_VM_MEM': ( 'VEX.ModR/M', [ 'vvvv', 'rm' ], '!11 mr/reg', ), 440 'VEX_VMI': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '', ), 441 'VEX_VMI_REG': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '11 mr/reg', ), 442 'VEX_VMI_MEM': ( 'VEX.ModR/M', [ 'vvvv', 'rm', 'imm' ], '!11 mr/reg', ), 443 444 'FIXED': ( 'fixed', None, '', ), 435 445 }; 436 446 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h
r103898 r103899 56 56 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 57 57 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); 58 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); 59 IEM_MC_PREPARE_AVX_USAGE(); 60 58 61 IEM_MC_LOCAL(RTUINT256U, uDst); 59 62 IEM_MC_LOCAL(RTUINT256U, uSrc1); … … 63 66 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); 64 67 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 65 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();66 IEM_MC_PREPARE_AVX_USAGE();67 68 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); 68 69 IEM_MC_FETCH_YREG_U256(uSrc2, IEM_GET_MODRM_RM(pVCpu, bRm)); … … 386 387 FNIEMOP_DEF(iemOp_vpblendd_Vx_Hx_Wx_Ib) 387 388 { 388 IEMOP_MNEMONIC 3(VEX_RVM, VPBLENDD, vpblendd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /* @todo */389 IEMOP_MNEMONIC4(VEX_RVMI, VPBLENDD, vpblendd, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 389 390 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vpblendd); 390 391 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); … … 399 400 FNIEMOP_DEF(iemOp_vpermilps_Vx_Wx_Ib) 400 401 { 401 IEMOP_MNEMONIC3(VEX_RMI, VPERMILPS, vpermilps, Vx , Wx, Ib, DISOPTYPE_HARMLESS, 0); /* @todo */402 IEMOP_MNEMONIC3(VEX_RMI, VPERMILPS, vpermilps, Vx_WO, Wx, Ib, DISOPTYPE_HARMLESS, IEMOPHINT_VEX_V_ZERO); 402 403 IEMOPMEDIAOPTF2IMM8_INIT_VARS(vpermilps); 403 404 return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback)); … … 409 410 FNIEMOP_DEF(iemOp_vpermilpd_Vx_Wx_Ib) 410 411 { 411 IEMOP_MNEMONIC3(VEX_RMI, VPERMILPD, vpermilpd, Vx , Wx, Ib, DISOPTYPE_HARMLESS, 0); /* @todo */412 IEMOP_MNEMONIC3(VEX_RMI, VPERMILPD, vpermilpd, Vx_WO, Wx, Ib, DISOPTYPE_HARMLESS, IEMOPHINT_VEX_V_ZERO); 412 413 IEMOPMEDIAOPTF2IMM8_INIT_VARS(vpermilpd); 413 414 return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback)); … … 418 419 FNIEMOP_DEF(iemOp_vperm2f128_Vqq_Hqq_Wqq_Ib) 419 420 { 420 //IEMOP_MNEMONIC4(VEX_RVM, VPERM2F128, vperm2f128, Vqq, Hqq, Wqq, Ib, DISOPTYPE_HARMLESS, 0); /** @todo */ 421 421 IEMOP_MNEMONIC4(VEX_RVMI, VPERM2F128, vperm2f128, Vqq_WO, Hqq, Wqq, Ib, DISOPTYPE_HARMLESS, 0); 422 422 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 423 423 if (IEM_IS_MODRM_REG_MODE(bRm)) … … 494 494 FNIEMOP_DEF(iemOp_vblendps_Vx_Hx_Wx_Ib) 495 495 { 496 IEMOP_MNEMONIC 3(VEX_RVM, VBLENDPS, vblendps, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /* @todo */496 IEMOP_MNEMONIC4(VEX_RVMI, VBLENDPS, vblendps, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 497 497 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vblendps); 498 498 return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback)); … … 504 504 FNIEMOP_DEF(iemOp_vblendpd_Vx_Hx_Wx_Ib) 505 505 { 506 IEMOP_MNEMONIC 3(VEX_RVM, VBLENDPD, vblendpd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /* @todo */506 IEMOP_MNEMONIC4(VEX_RVMI, VBLENDPD, vblendpd, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 507 507 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vblendpd); 508 508 return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback)); … … 514 514 FNIEMOP_DEF(iemOp_vpblendw_Vx_Hx_Wx_Ib) 515 515 { 516 IEMOP_MNEMONIC 3(VEX_RVM, VPBLENDW, vpblendw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /* @todo */516 IEMOP_MNEMONIC4(VEX_RVMI, VPBLENDW, vpblendw, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 517 517 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vpblendw); 518 518 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); … … 527 527 FNIEMOP_DEF(iemOp_vpalignr_Vx_Hx_Wx_Ib) 528 528 { 529 IEMOP_MNEMONIC 3(VEX_RVM, VPALIGNR, vpalignr, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /* @todo */529 IEMOP_MNEMONIC4(VEX_RVMI, VPALIGNR, vpalignr, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 530 530 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vpalignr); 531 531 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); … … 544 544 FNIEMOP_DEF(iemOp_vpextrw_Ew_Vdq_Ib) 545 545 { 546 IEMOP_MNEMONIC3(VEX_MRI, VPEXTRW, vpextrw, Ew , Vdq, Ib, DISOPTYPE_HARMLESS, IEMOPHINT_VEX_L_ZERO | IEMOPHINT_VEX_V_ZERO);546 IEMOP_MNEMONIC3(VEX_MRI, VPEXTRW, vpextrw, Ew_WO, Vdq, Ib, DISOPTYPE_HARMLESS, IEMOPHINT_VEX_L_ZERO | IEMOPHINT_VEX_V_ZERO); 547 547 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 548 548 if (IEM_IS_MODRM_REG_MODE(bRm)) … … 762 762 FNIEMOP_DEF(iemOp_vmpsadbw_Vx_Hx_Wx_Ib) 763 763 { 764 IEMOP_MNEMONIC 3(VEX_RVM, VMPSADBW, vmpsadbw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); /** @todo */764 IEMOP_MNEMONIC4(VEX_RVMI, VMPSADBW, vmpsadbw, Vx_WO, Hx, Wx, Ib, DISOPTYPE_HARMLESS, 0); 765 765 IEMOPMEDIAOPTF3IMM8_INIT_VARS(vmpsadbw); 766 766 return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Hx_Wx_Ib_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback)); -
trunk/src/VBox/VMM/include/IEMInternal.h
r103898 r103899 2312 2312 /** VEX+ModR/M: reg, vvvv, r/m (memory). */ 2313 2313 #define IEMOPFORM_VEX_RVM_MEM (IEMOPFORM_VEX_RVM | IEMOPFORM_NOT_MOD3) 2314 /** VEX+ModR/M: reg, vvvv, r/m, imm */ 2315 #define IEMOPFORM_VEX_RVMI 22 2316 /** VEX+ModR/M: reg, vvvv, r/m (register), imm. */ 2317 #define IEMOPFORM_VEX_RVMI_REG (IEMOPFORM_VEX_RVMI | IEMOPFORM_MOD3) 2318 /** VEX+ModR/M: reg, vvvv, r/m (memory), imm. */ 2319 #define IEMOPFORM_VEX_RVMI_MEM (IEMOPFORM_VEX_RVMI | IEMOPFORM_NOT_MOD3) 2314 2320 /** VEX+ModR/M: reg, r/m, vvvv */ 2315 #define IEMOPFORM_VEX_RMV 2 22321 #define IEMOPFORM_VEX_RMV 23 2316 2322 /** VEX+ModR/M: reg, r/m, vvvv (register). */ 2317 2323 #define IEMOPFORM_VEX_RMV_REG (IEMOPFORM_VEX_RMV | IEMOPFORM_MOD3) … … 2319 2325 #define IEMOPFORM_VEX_RMV_MEM (IEMOPFORM_VEX_RMV | IEMOPFORM_NOT_MOD3) 2320 2326 /** VEX+ModR/M: reg, r/m, imm8 */ 2321 #define IEMOPFORM_VEX_RMI 2 32327 #define IEMOPFORM_VEX_RMI 24 2322 2328 /** VEX+ModR/M: reg, r/m, imm8 (register). */ 2323 2329 #define IEMOPFORM_VEX_RMI_REG (IEMOPFORM_VEX_RMI | IEMOPFORM_MOD3) … … 2325 2331 #define IEMOPFORM_VEX_RMI_MEM (IEMOPFORM_VEX_RMI | IEMOPFORM_NOT_MOD3) 2326 2332 /** VEX+ModR/M: r/m, vvvv, reg */ 2327 #define IEMOPFORM_VEX_MVR 2 42333 #define IEMOPFORM_VEX_MVR 25 2328 2334 /** VEX+ModR/M: r/m, vvvv, reg (register) */ 2329 2335 #define IEMOPFORM_VEX_MVR_REG (IEMOPFORM_VEX_MVR | IEMOPFORM_MOD3) … … 2331 2337 #define IEMOPFORM_VEX_MVR_MEM (IEMOPFORM_VEX_MVR | IEMOPFORM_NOT_MOD3) 2332 2338 /** VEX+ModR/M+/n: vvvv, r/m */ 2333 #define IEMOPFORM_VEX_VM 2 52339 #define IEMOPFORM_VEX_VM 26 2334 2340 /** VEX+ModR/M+/n: vvvv, r/m (register) */ 2335 2341 #define IEMOPFORM_VEX_VM_REG (IEMOPFORM_VEX_VM | IEMOPFORM_MOD3) … … 2337 2343 #define IEMOPFORM_VEX_VM_MEM (IEMOPFORM_VEX_VM | IEMOPFORM_NOT_MOD3) 2338 2344 /** VEX+ModR/M+/n: vvvv, r/m, imm8 */ 2339 #define IEMOPFORM_VEX_VMI 2 62345 #define IEMOPFORM_VEX_VMI 27 2340 2346 /** VEX+ModR/M+/n: vvvv, r/m, imm8 (register) */ 2341 2347 #define IEMOPFORM_VEX_VMI_REG (IEMOPFORM_VEX_VMI | IEMOPFORM_MOD3)
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