Index: trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAll.cpp	(revision 103907)
+++ trunk/src/VBox/VMM/VMMAll/IEMAll.cpp	(revision 103908)
@@ -7211,4 +7211,12 @@
 #include "IEMAllMemRWTmpl.cpp.h"
 
+#define TMPL_MEM_TYPE           RTUINT128U
+#define TMPL_MEM_TYPE_ALIGN     (sizeof(RTUINT128U) - 1)
+#define TMPL_MEM_MAP_FLAGS_ADD  (IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE)
+#define TMPL_MEM_FN_SUFF        U128AlignedSse
+#define TMPL_MEM_FMT_TYPE       "%.16Rhxs"
+#define TMPL_MEM_FMT_DESC       "dqword"
+#include "IEMAllMemRWTmpl.cpp.h"
+
 #define TMPL_MEM_TYPE       RTUINT128U
 #define TMPL_MEM_TYPE_ALIGN 0
@@ -7274,63 +7282,4 @@
 #endif
     return rc;
-}
-#endif
-
-
-/**
- * Fetches a data dqword (double qword) at an aligned address, generally SSE
- * related.
- *
- * Raises \#GP(0) if not aligned.
- *
- * @returns Strict VBox status code.
- * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
- * @param   pu128Dst            Where to return the qword.
- * @param   iSegReg             The index of the segment register to use for
- *                              this access.  The base and limits are checked.
- * @param   GCPtrMem            The address of the guest memory.
- */
-VBOXSTRICTRC iemMemFetchDataU128AlignedSse(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT
-{
-    /* The lazy approach for now... */
-    uint8_t      bUnmapInfo;
-    PCRTUINT128U pu128Src;
-    VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu128Src, &bUnmapInfo, sizeof(*pu128Src), iSegReg, GCPtrMem,
-                                IEM_ACCESS_DATA_R, (sizeof(*pu128Src) - 1) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE);
-    if (rc == VINF_SUCCESS)
-    {
-        pu128Dst->au64[0] = pu128Src->au64[0];
-        pu128Dst->au64[1] = pu128Src->au64[1];
-        rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo);
-        Log(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
-    }
-    return rc;
-}
-
-
-#ifdef IEM_WITH_SETJMP
-/**
- * Fetches a data dqword (double qword) at an aligned address, generally SSE
- * related, longjmp on error.
- *
- * Raises \#GP(0) if not aligned.
- *
- * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
- * @param   pu128Dst            Where to return the qword.
- * @param   iSegReg             The index of the segment register to use for
- *                              this access.  The base and limits are checked.
- * @param   GCPtrMem            The address of the guest memory.
- */
-void iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg,
-                                      RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP
-{
-    /* The lazy approach for now... */
-    uint8_t      bUnmapInfo;
-    PCRTUINT128U pu128Src = (PCRTUINT128U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu128Src), iSegReg, GCPtrMem, IEM_ACCESS_DATA_R,
-                                                       (sizeof(*pu128Src) - 1) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE);
-    pu128Dst->au64[0] = pu128Src->au64[0];
-    pu128Dst->au64[1] = pu128Src->au64[1];
-    iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
-    Log(("IEM RD dqword %d|%RGv: %.16Rhxs\n", iSegReg, GCPtrMem, pu128Dst));
 }
 #endif
Index: trunk/src/VBox/VMM/VMMAll/IEMAllMemRWTmpl.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllMemRWTmpl.cpp.h	(revision 103907)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllMemRWTmpl.cpp.h	(revision 103908)
@@ -43,4 +43,7 @@
 # error "TMPL_MEM_FMT_DESC is undefined"
 #endif
+#ifndef TMPL_MEM_MAP_FLAGS_ADD
+# define TMPL_MEM_MAP_FLAGS_ADD  (0)
+#endif
 
 
@@ -58,5 +61,5 @@
     TMPL_MEM_TYPE const *puSrc;
     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puSrc, &bUnmapInfo, sizeof(*puSrc), iSegReg, GCPtrMem,
-                                IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN);
+                                IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -82,5 +85,5 @@
     uint8_t              bUnmapInfo;
     TMPL_MEM_TYPE const *pSrc = (TMPL_MEM_TYPE const *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pSrc), iSegReg, GCPtrMem,
-                                                                    IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN);
+                                                                    IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     *pDst = *pSrc;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -96,5 +99,5 @@
     uint8_t              bUnmapInfo;
     TMPL_MEM_TYPE const *puSrc = (TMPL_MEM_TYPE const *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*puSrc), iSegReg, GCPtrMem,
-                                                                     IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN);
+                                                                     IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     TMPL_MEM_TYPE const  uRet = *puSrc;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -124,5 +127,5 @@
     TMPL_MEM_TYPE *puDst;
     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puDst, &bUnmapInfo, sizeof(*puDst),
-                                iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN);
+                                iSegReg, GCPtrMem, IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -170,5 +173,5 @@
     uint8_t        bUnmapInfo;
     TMPL_MEM_TYPE *puDst = (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*puDst), iSegReg, GCPtrMem,
-                                                         IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN);
+                                                         IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
 #ifdef TMPL_MEM_BY_REF
     *puDst = *pValue;
@@ -203,5 +206,5 @@
     *pbUnmapInfo = 1 | ((IEM_ACCESS_TYPE_READ  | IEM_ACCESS_TYPE_WRITE) << 4); /* zero is for the TLB hit */
     return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, pbUnmapInfo, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem,
-                                         IEM_ACCESS_DATA_ATOMIC, TMPL_MEM_TYPE_ALIGN);
+                                         IEM_ACCESS_DATA_ATOMIC, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
 }
 
@@ -227,5 +230,5 @@
     *pbUnmapInfo = 1 | ((IEM_ACCESS_TYPE_READ  | IEM_ACCESS_TYPE_WRITE) << 4); /* zero is for the TLB hit */
     return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, pbUnmapInfo, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem,
-                                         IEM_ACCESS_DATA_RW, TMPL_MEM_TYPE_ALIGN);
+                                         IEM_ACCESS_DATA_RW, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
 }
 
@@ -251,5 +254,5 @@
     *pbUnmapInfo = 1 | (IEM_ACCESS_TYPE_WRITE << 4); /* zero is for the TLB hit */
     return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, pbUnmapInfo, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem,
-                                         IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN);
+                                         IEM_ACCESS_DATA_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
 }
 
@@ -275,5 +278,5 @@
     *pbUnmapInfo = 1 | (IEM_ACCESS_TYPE_READ << 4); /* zero is for the TLB hit */
     return (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, pbUnmapInfo, sizeof(TMPL_MEM_TYPE), iSegReg, GCPtrMem,
-                                         IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN);
+                                         IEM_ACCESS_DATA_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
 }
 
@@ -303,5 +306,5 @@
     TMPL_MEM_TYPE const *puSrc;
     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puSrc, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN);
+                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -344,5 +347,5 @@
     TMPL_MEM_TYPE *puDst;
     VBOXSTRICTRC   rc = iemMemMap(pVCpu, (void **)&puDst, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                  IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN);
+                                  IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -384,5 +387,5 @@
     TMPL_MEM_TYPE const *puSrc;
     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puSrc, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN);
+                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -422,5 +425,5 @@
     TMPL_MEM_TYPE *puDst;
     VBOXSTRICTRC   rc = iemMemMap(pVCpu, (void **)&puDst, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                  IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN);
+                                  IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -461,5 +464,5 @@
     TMPL_MEM_TYPE const *puSrc;
     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&puSrc, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN);
+                                IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     if (rc == VINF_SUCCESS)
     {
@@ -494,5 +497,5 @@
     uint8_t        bUnmapInfo;
     TMPL_MEM_TYPE *puDst = (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrMem,
-                                                         IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN);
+                                                         IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     *puDst = uValue;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -527,5 +530,5 @@
             /* WORD per intel specs. */
             uint16_t *puDst = (uint16_t *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(uint16_t), X86_SREG_SS, GCPtrMem,
-                                                       IEM_ACCESS_STACK_W, sizeof(uint16_t) - 1); /** @todo 2 or 4 alignment check for PUSH SS? */
+                                                       IEM_ACCESS_STACK_W, (sizeof(uint16_t) - 1) | TMPL_MEM_MAP_FLAGS_ADD); /** @todo 2 or 4 alignment check for PUSH SS? */
             *puDst = (uint16_t)uValue;
             iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -539,5 +542,5 @@
              *        something for the CPU profile... Hope not.) */
             uint32_t *puDst = (uint32_t *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(uint32_t), X86_SREG_SS, GCPtrMem,
-                                                       IEM_ACCESS_STACK_W, sizeof(uint32_t) - 1);
+                                                       IEM_ACCESS_STACK_W, (sizeof(uint32_t) - 1) | TMPL_MEM_MAP_FLAGS_ADD);
             *puDst = (uint16_t)uValue | (pVCpu->cpum.GstCtx.eflags.u & (UINT32_C(0xffff0000) & ~X86_EFL_RAZ_MASK));
             iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -549,5 +552,5 @@
         /* DWORD per spec. */
         uint32_t *puDst = (uint32_t *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(uint32_t), X86_SREG_SS, GCPtrMem,
-                                                   IEM_ACCESS_STACK_W, sizeof(uint32_t) - 1);
+                                                   IEM_ACCESS_STACK_W, (sizeof(uint32_t) - 1) | TMPL_MEM_MAP_FLAGS_ADD);
         *puDst = uValue;
         iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -570,5 +573,5 @@
     uint8_t              bUnmapInfo;
     TMPL_MEM_TYPE const *puSrc = (TMPL_MEM_TYPE const *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS,
-                                                                     GCPtrMem, IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN);
+                                                                     GCPtrMem, IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     TMPL_MEM_TYPE const  uValue = *puSrc;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -596,5 +599,5 @@
     uint8_t        bUnmapInfo;
     TMPL_MEM_TYPE *puDst = (TMPL_MEM_TYPE *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS, GCPtrTop,
-                                                         IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN);
+                                                         IEM_ACCESS_STACK_W, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     *puDst = uValue;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -623,5 +626,5 @@
     uint8_t              bUnmapInfo;
     TMPL_MEM_TYPE const *puSrc = (TMPL_MEM_TYPE const *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(TMPL_MEM_TYPE), X86_SREG_SS,
-                                                                     GCPtrTop, IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN);
+                                                                     GCPtrTop, IEM_ACCESS_STACK_R, TMPL_MEM_TYPE_ALIGN | TMPL_MEM_MAP_FLAGS_ADD);
     TMPL_MEM_TYPE const  uValue = *puSrc;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -664,5 +667,5 @@
     uint8_t   bUnmapInfo;
     uint16_t *puDst = (uint16_t *)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(uint16_t), X86_SREG_SS, GCPtrTop,
-                                               IEM_ACCESS_STACK_W, sizeof(uint16_t) - 1); /** @todo 2 or 4 alignment check for PUSH SS? */
+                                               IEM_ACCESS_STACK_W, (sizeof(uint16_t) - 1) | TMPL_MEM_MAP_FLAGS_ADD); /** @todo 2 or 4 alignment check for PUSH SS? */
     *puDst = (uint16_t)uValue;
     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
@@ -686,3 +689,4 @@
 #undef TMPL_MEM_FMT_DESC
 #undef TMPL_WITH_PUSH_SREG
-
+#undef TMPL_MEM_MAP_FLAGS_ADD
+
Index: trunk/src/VBox/VMM/include/IEMInline.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMInline.h	(revision 103907)
+++ trunk/src/VBox/VMM/include/IEMInline.h	(revision 103908)
@@ -4091,4 +4091,20 @@
 #undef TMPL_MEM_NO_MAPPING
 
+
+/* Every template reyling on unaligned accesses inside a page not being okay should go below. */
+#undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK
+#define TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK(a_pVCpu, a_GCPtrEff, a_TmplMemType) 0
+
+#define TMPL_MEM_NO_MAPPING
+#define TMPL_MEM_TYPE       RTUINT128U
+#define TMPL_MEM_TYPE_ALIGN 15
+#define TMPL_MEM_TYPE_SIZE  16
+#define TMPL_MEM_FN_SUFF    U128AlignedSse
+#define TMPL_MEM_FMT_TYPE   "%.16Rhxs"
+#define TMPL_MEM_FMT_DESC   "dqword"
+#include "../VMMAll/IEMAllMemRWTmplInline.cpp.h"
+#undef  TMPL_MEM_NO_MAPPING
+
+
 #undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK
 
Index: trunk/src/VBox/VMM/include/IEMInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMInternal.h	(revision 103907)
+++ trunk/src/VBox/VMM/include/IEMInternal.h	(revision 103908)
@@ -5492,6 +5492,6 @@
 void            iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemFetchDataU128NoAcJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
+void            iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
 # endif
-void            iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
@@ -5522,6 +5522,6 @@
 void            iemMemStoreDataU64SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemStoreDataU128SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
-void            iemMemStoreDataU128NoAcSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
-void            iemMemStoreDataU128AlignedSseSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
+void            iemMemStoreDataU128NoAcSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U pu128Value) IEM_NOEXCEPT_MAY_LONGJMP;
+void            iemMemStoreDataU128AlignedSseSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U pu128Value) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemStoreDataU256SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
 void            iemMemStoreDataU256NoAcSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
