VirtualBox

Changeset 103916 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Mar 19, 2024 1:11:09 PM (11 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
162290
Message:

VMM/IEM: Convert iemMemStoreDataU256NoAc()/iemMemStoreDataU256NoAcJmp() to use the memory RW template and implement native emitters for IEM_MC_FETCH_MEM_U256_NO_AC()/IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(), bugref:10614

Location:
trunk/src/VBox/VMM
Files:
9 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r103908 r103916  
    72267226#include "IEMAllMemRWTmpl.cpp.h"
    72277227
     7228#define TMPL_MEM_TYPE       RTUINT256U
     7229#define TMPL_MEM_TYPE_ALIGN 0
     7230#define TMPL_MEM_FN_SUFF    U256NoAc
     7231#define TMPL_MEM_FMT_TYPE   "%.32Rhxs"
     7232#define TMPL_MEM_FMT_DESC   "qqword"
     7233#include "IEMAllMemRWTmpl.cpp.h"
     7234
    72287235/**
    72297236 * Fetches a data dword and zero extends it to a qword.
    … …  
    72827289#endif
    72837290    return rc;
    7284 }
    7285 #endif
    7286 
    7287 
    7288 /**
    7289  * Fetches a data oword (octo word), generally AVX related.
    7290  *
    7291  * @returns Strict VBox status code.
    7292  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7293  * @param   pu256Dst            Where to return the qword.
    7294  * @param   iSegReg             The index of the segment register to use for
    7295  *                              this access.  The base and limits are checked.
    7296  * @param   GCPtrMem            The address of the guest memory.
    7297  */
    7298 VBOXSTRICTRC iemMemFetchDataU256NoAc(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT
    7299 {
    7300     /* The lazy approach for now... */
    7301     uint8_t      bUnmapInfo;
    7302     PCRTUINT256U pu256Src;
    7303     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu256Src, &bUnmapInfo, sizeof(*pu256Src), iSegReg, GCPtrMem,
    7304                                 IEM_ACCESS_DATA_R, 0 /* NO_AC variant */);
    7305     if (rc == VINF_SUCCESS)
    7306     {
    7307         pu256Dst->au64[0] = pu256Src->au64[0];
    7308         pu256Dst->au64[1] = pu256Src->au64[1];
    7309         pu256Dst->au64[2] = pu256Src->au64[2];
    7310         pu256Dst->au64[3] = pu256Src->au64[3];
    7311         rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo);
    7312         Log(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7313     }
    7314     return rc;
    7315 }
    7316 
    7317 
    7318 #ifdef IEM_WITH_SETJMP
    7319 /**
    7320  * Fetches a data oword (octo word), generally AVX related.
    7321  *
    7322  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7323  * @param   pu256Dst            Where to return the qword.
    7324  * @param   iSegReg             The index of the segment register to use for
    7325  *                              this access.  The base and limits are checked.
    7326  * @param   GCPtrMem            The address of the guest memory.
    7327  */
    7328 void iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP
    7329 {
    7330     /* The lazy approach for now... */
    7331     uint8_t      bUnmapInfo;
    7332     PCRTUINT256U pu256Src = (PCRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Src), iSegReg, GCPtrMem,
    7333                                                        IEM_ACCESS_DATA_R, 0 /* NO_AC variant */);
    7334     pu256Dst->au64[0] = pu256Src->au64[0];
    7335     pu256Dst->au64[1] = pu256Src->au64[1];
    7336     pu256Dst->au64[2] = pu256Src->au64[2];
    7337     pu256Dst->au64[3] = pu256Src->au64[3];
    7338     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
    7339     Log(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    73407291}
    73417292#endif
    … …  
    75727523 */
    75737524void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP
    7574 {
    7575     /* The lazy approach for now... */
    7576     uint8_t     bUnmapInfo;
    7577     PRTUINT256U pu256Dst = (PRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem,
    7578                                                      IEM_ACCESS_DATA_W, 0 /* NO_AC variant */);
    7579     pu256Dst->au64[0] = pu256Value->au64[0];
    7580     pu256Dst->au64[1] = pu256Value->au64[1];
    7581     pu256Dst->au64[2] = pu256Value->au64[2];
    7582     pu256Dst->au64[3] = pu256Value->au64[3];
    7583     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
    7584     Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7585 }
    7586 #endif
    7587 
    7588 
    7589 /**
    7590  * Stores a data qqword.
    7591  *
    7592  * @returns Strict VBox status code.
    7593  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7594  * @param   iSegReg             The index of the segment register to use for
    7595  *                              this access.  The base and limits are checked.
    7596  * @param   GCPtrMem            The address of the guest memory.
    7597  * @param   pu256Value          Pointer to the value to store.
    7598  */
    7599 VBOXSTRICTRC iemMemStoreDataU256NoAc(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT
    7600 {
    7601     /* The lazy approach for now... */
    7602     uint8_t      bUnmapInfo;
    7603     PRTUINT256U  pu256Dst;
    7604     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu256Dst, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem,
    7605                                 IEM_ACCESS_DATA_W, 0 /* NO_AC variant */);
    7606     if (rc == VINF_SUCCESS)
    7607     {
    7608         pu256Dst->au64[0] = pu256Value->au64[0];
    7609         pu256Dst->au64[1] = pu256Value->au64[1];
    7610         pu256Dst->au64[2] = pu256Value->au64[2];
    7611         pu256Dst->au64[3] = pu256Value->au64[3];
    7612         rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo);
    7613         Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7614     }
    7615     return rc;
    7616 }
    7617 
    7618 
    7619 #ifdef IEM_WITH_SETJMP
    7620 /**
    7621  * Stores a data qqword, longjmp on error.
    7622  *
    7623  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7624  * @param   iSegReg             The index of the segment register to use for
    7625  *                              this access.  The base and limits are checked.
    7626  * @param   GCPtrMem            The address of the guest memory.
    7627  * @param   pu256Value          Pointer to the value to store.
    7628  */
    7629 void iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP
    76307525{
    76317526    /* The lazy approach for now... */

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

    r103911 r103916  
    30693069    'IEM_MC_FETCH_MEM_U256':                                     (McBlock.parseMcGeneric,           True,  True,  False, ),
    30703070    'IEM_MC_FETCH_MEM_U256_ALIGN_AVX':                           (McBlock.parseMcGeneric,           True,  True,  False, ),
    3071     'IEM_MC_FETCH_MEM_U256_NO_AC':                               (McBlock.parseMcGeneric,           True,  True,  False, ),
     3071    'IEM_MC_FETCH_MEM_U256_NO_AC':                               (McBlock.parseMcGeneric,           True,  True,  g_fNativeSimd),
    30723072    'IEM_MC_FETCH_MEM_U32':                                      (McBlock.parseMcGeneric,           True,  True,  True,  ),
    30733073    'IEM_MC_FETCH_MEM_U32_DISP':                                 (McBlock.parseMcGeneric,           True,  True,  True,  ), #bounds only

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py

    r103911 r103916  
    149149    'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64':                                  (None, True,  True,  True,  ),
    150150    'IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX':                              (None, True,  True,  False, ),
    151     'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC':                                  (None, True,  True,  False, ),
     151    'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC':                                  (None, True,  True,  g_fNativeSimd),
    152152    'IEM_MC_FETCH_MEM_FLAT_U256':                                        (None, True,  True,  False, ),
    153153    'IEM_MC_FETCH_MEM_FLAT_U32':                                         (None, True,  True,  True,  ),

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

    r103911 r103916  
    47154715                           && (pfnFunction == UINT64_C(0xc000b000a0009000))));
    47164716                break;
     4717            case sizeof(RTUINT256U):
     4718                Assert(enmOp == kIemNativeEmitMemOp_Store || enmOp == kIemNativeEmitMemOp_Fetch);
     4719                Assert(   (   enmOp == kIemNativeEmitMemOp_Fetch
     4720                           && (pfnFunction == (uintptr_t)iemNativeHlpMemFlatFetchDataU256NoAc))
     4721                       || (   enmOp == kIemNativeEmitMemOp_Store
     4722                           && (pfnFunction == UINT64_C(0xc000b000a0009000))));
     4723                break;
    47174724#endif
    47184725        }
    … …  
    47654772                           && (   pfnFunction == (uintptr_t)iemNativeHlpMemFetchDataU128AlignedSse
    47664773                               || pfnFunction == (uintptr_t)iemNativeHlpMemFetchDataU128NoAc))
     4774                       || (   enmOp == kIemNativeEmitMemOp_Store
     4775                           && (pfnFunction == UINT64_C(0xc000b000a0009000))));
     4776                break;
     4777            case sizeof(RTUINT256U):
     4778                Assert(enmOp == kIemNativeEmitMemOp_Store || enmOp == kIemNativeEmitMemOp_Fetch);
     4779                Assert(   (   enmOp == kIemNativeEmitMemOp_Fetch
     4780                           && (pfnFunction == (uintptr_t)iemNativeHlpMemFetchDataU256NoAc))
    47674781                       || (   enmOp == kIemNativeEmitMemOp_Store
    47684782                           && (pfnFunction == UINT64_C(0xc000b000a0009000))));
    … …  
    50795093                        off = iemNativeEmitLoadGprByGprU64Ex(pCodeBuf, off, idxRegValueFetch, idxRegMemResult);
    50805094                        break;
     5095#ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR
    50815096                    case sizeof(RTUINT128U):
    50825097                        /*
    5083                          * No need to back the register with the stack, this is done by the generic variable handling
     5098                         * No need to sync back the register with the stack, this is done by the generic variable handling
    50845099                         * code if there is a register assigned to a variable and the stack must be accessed.
    50855100                         */
    50865101                        off = iemNativeEmitLoadVecRegByGprU128Ex(pCodeBuf, off, idxRegValueFetch, idxRegMemResult);
    50875102                        break;
     5103                    case sizeof(RTUINT256U):
     5104                        /*
     5105                         * No need to sync back the register with the stack, this is done by the generic variable handling
     5106                         * code if there is a register assigned to a variable and the stack must be accessed.
     5107                         */
     5108                        off = iemNativeEmitLoadVecRegByGprU256Ex(pCodeBuf, off, idxRegValueFetch, idxRegMemResult);
     5109                        break;
     5110#endif
    50885111                    default:
    50895112                        AssertFailed();
    … …  
    53715394                                               sizeof(RTUINT128U), sizeof(RTUINT128U) - 1, kIemNativeEmitMemOp_Fetch, \
    53725395                                               (uintptr_t)iemNativeHlpMemFlatFetchDataU128NoAc, pCallEntry->idxInstr)
     5396
     5397/* 256-bit segmented: */
     5398#define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \
     5399    off = iemNativeEmitMemFetchStoreDataCommon(pReNative, off, a_u256Dst, a_iSeg, a_GCPtrMem, \
     5400                                               sizeof(RTUINT256U), sizeof(RTUINT256U) - 1, kIemNativeEmitMemOp_Fetch, \
     5401                                               (uintptr_t)iemNativeHlpMemFetchDataU256NoAc, pCallEntry->idxInstr)
     5402
     5403/* 256-bit flat: */
     5404#define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) \
     5405    off = iemNativeEmitMemFetchStoreDataCommon(pReNative, off, a_u256Dst, UINT8_MAX, a_GCPtrMem, \
     5406                                               sizeof(RTUINT256U), sizeof(RTUINT256U) - 1, kIemNativeEmitMemOp_Fetch, \
     5407                                               (uintptr_t)iemNativeHlpMemFlatFetchDataU256NoAc, pCallEntry->idxInstr)
    53735408#endif
    53745409

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

    r103913 r103916  
    18961896#endif
    18971897}
     1898
     1899
     1900/**
     1901 * Used by TB code to load 256-bit data w/ segmentation.
     1902 */
     1903IEM_DECL_NATIVE_HLP_DEF(void, iemNativeHlpMemFetchDataU256NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t iSegReg, PRTUINT256U pu256Dst))
     1904{
     1905#ifdef IEMNATIVE_WITH_TLB_LOOKUP_FETCH
     1906    iemMemFetchDataU256NoAcSafeJmp(pVCpu, pu256Dst, iSegReg, GCPtrMem);
     1907#else
     1908    iemMemFetchDataU256NoAcJmp(pVCpu, pu256Dst, iSegReg, GCPtrMem);
     1909#endif
     1910}
    18981911#endif
    18991912
    … …  
    22172230#else
    22182231    return iemMemFlatFetchDataU128NoAcJmp(pVCpu, pu128Dst, UINT8_MAX, GCPtrMem);
     2232#endif
     2233}
     2234
     2235
     2236/**
     2237 * Used by TB code to load unsigned 256-bit data w/ flat address.
     2238 */
     2239IEM_DECL_NATIVE_HLP_DEF(void, iemNativeHlpMemFlatFetchDataU256NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, PRTUINT256U pu256Dst))
     2240{
     2241#ifdef IEMNATIVE_WITH_TLB_LOOKUP_FETCH
     2242    return iemMemFetchDataU256NoAcSafeJmp(pVCpu, pu256Dst, UINT8_MAX, GCPtrMem);
     2243#else
     2244    return iemMemFlatFetchDataU256NoAcJmp(pVCpu, pu256Dst, UINT8_MAX, GCPtrMem);
    22192245#endif
    22202246}

  • trunk/src/VBox/VMM/include/IEMInline.h

    r103908 r103916  
    41064106#undef  TMPL_MEM_NO_MAPPING
    41074107
     4108#define TMPL_MEM_NO_MAPPING
     4109#define TMPL_MEM_TYPE       RTUINT256U
     4110#define TMPL_MEM_TYPE_ALIGN 0
     4111#define TMPL_MEM_TYPE_SIZE  32
     4112#define TMPL_MEM_FN_SUFF    U256NoAc
     4113#define TMPL_MEM_FMT_TYPE   "%.32Rhxs"
     4114#define TMPL_MEM_FMT_DESC   "qqword"
     4115#include "../VMMAll/IEMAllMemRWTmplInline.cpp.h"
     4116#undef TMPL_MEM_NO_MAPPING
    41084117
    41094118#undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK

  • trunk/src/VBox/VMM/include/IEMInternal.h

    r103909 r103916  
    54885488void            iemMemFetchDataU128NoAcJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    54895489void            iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5490void            iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    54905491# endif
    54915492void            iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    5492 void            iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    54935493void            iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    54945494#endif
    … …  
    55315531void            iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55325532void            iemMemStoreDataNoAcU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
     5533void            iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55335534#endif
    55345535void            iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55355536void            iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    5536 void            iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55375537void            iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55385538#endif

  • trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

    r103911 r103916  
    16481648IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFetchDataU128AlignedSse,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t iSegReg, PRTUINT128U pu128Dst));
    16491649IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFetchDataU128NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t iSegReg, PRTUINT128U pu128Dst));
     1650IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFetchDataU256NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t iSegReg, PRTUINT256U pu256Dst));
    16501651#endif
    16511652IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemStoreDataU8,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t iSegReg, uint8_t u8Value));
    … …  
    16741675IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFlatFetchDataU128AlignedSse,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, PRTUINT128U pu128Dst));
    16751676IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFlatFetchDataU128NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, PRTUINT128U pu128Dst));
     1677IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFlatFetchDataU256NoAc,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, PRTUINT256U pu256Dst));
    16761678#endif
    16771679IEM_DECL_NATIVE_HLP_PROTO(void,     iemNativeHlpMemFlatStoreDataU8,(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint8_t u8Value));

  • trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

    r103911 r103916  
    24642464}
    24652465
     2466# ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR
     2467/**
     2468 * Common bit of iemNativeEmitLoadVecRegByGprU128 and friends.
     2469 *
     2470 * @note Odd and large @a offDisp values requires a temporary, unless it's a
     2471 *       load and @a iGprReg differs from @a iGprBase.  Will assert / throw if
     2472 *       caller does not heed this.
     2473 *
     2474 * @note DON'T try this with prefetch.
     2475 */
     2476DECL_FORCE_INLINE_THROW(uint32_t)
     2477iemNativeEmitVecRegByGprLdStEx(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecReg, uint8_t iGprBase, int32_t offDisp,
     2478                               ARMV8A64INSTRLDSTTYPE enmOperation, unsigned cbData, uint8_t iGprTmp = UINT8_MAX)
     2479{
     2480    if ((uint32_t)offDisp < _4K * cbData && !((uint32_t)offDisp & (cbData - 1)))
     2481    {
     2482        /* Use the unsigned variant of ldr Wt, [<Xn|SP>, #off]. */
     2483        pCodeBuf[off++] = Armv8A64MkInstrStLdRUOff(enmOperation, iVecReg, iGprBase, (uint32_t)offDisp / cbData);
     2484    }
     2485    else if (   !ARMV8A64INSTRLDSTTYPE_IS_STORE(enmOperation)
     2486             || iGprTmp != UINT8_MAX)
     2487    {
     2488        /* The offset is too large, so we must load it into a register and use
     2489           ldr Wt, [<Xn|SP>, (<Wm>|<Xm>)]. */
     2490        /** @todo reduce by offVCpu by >> 3 or >> 2? if it saves instructions? */
     2491        off = iemNativeEmitLoadGprImmEx(pCodeBuf, off, iGprTmp, (int64_t)offDisp);
     2492        pCodeBuf[off++] = Armv8A64MkInstrStLdRegIdx(enmOperation, iVecReg, iGprBase, iGprTmp);
     2493    }
     2494    else
     2495# ifdef IEM_WITH_THROW_CATCH
     2496        AssertFailedStmt(IEMNATIVE_DO_LONGJMP(NULL, VERR_IEM_IPE_9));
     2497# else
     2498        AssertReleaseFailedStmt(off = UINT32_MAX);
     2499# endif
     2500    return off;
     2501}
     2502# endif
     2503
    24662504#endif /* RT_ARCH_ARM64 */
    24672505
    … …  
    28782916
    28792917#elif defined(RT_ARCH_ARM64)
    2880     off = iemNativeEmitGprByGprLdStEx(pCodeBuf, off, iVecRegDst, iGprBase, offDisp,
    2881                                       kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U), iGprTmp);
     2918    off = iemNativeEmitVecRegByGprLdStEx(pCodeBuf, off, iVecRegDst, iGprBase, offDisp,
     2919                                         kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U), iGprTmp);
    28822920
    28832921#else
    … …  
    29002938#elif defined(RT_ARCH_ARM64)
    29012939    off = iemNativeEmitGprByGprLdSt(pReNative, off, iVecRegDst, iGprBase, offDisp, kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U));
     2940
     2941#else
     2942# error "port me"
     2943#endif
     2944    return off;
     2945}
     2946
     2947
     2948/**
     2949 * Emits a 256-bit vector register load via a GPR base address with a displacement.
     2950 *
     2951 * @note ARM64: Misaligned @a offDisp values and values not in the
     2952 *       -0x7ff8...0x7ff8 range will require a temporary register (@a iGprTmp) if
     2953 *       @a iGprReg and @a iGprBase are the same. Will assert / throw if caller
     2954 *       does not heed this.
     2955 */
     2956DECL_FORCE_INLINE_THROW(uint32_t)
     2957iemNativeEmitLoadVecRegByGprU256Ex(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecRegDst, uint8_t iGprBase,
     2958                                   int32_t offDisp = 0, uint8_t iGprTmp = UINT8_MAX)
     2959{
     2960#ifdef RT_ARCH_AMD64
     2961    /* vmovdqu reg256, mem256 */
     2962    pCodeBuf[off++] = X86_OP_VEX3;
     2963    pCodeBuf[off++] =   (iVecRegDst < 8 ? X86_OP_VEX3_BYTE1_R : 0)
     2964                      | X86_OP_VEX3_BYTE1_X
     2965                      | (iGprBase < 8 ? X86_OP_VEX3_BYTE1_B : 0)
     2966                      | UINT8_C(0x01);
     2967    pCodeBuf[off++] = X86_OP_VEX3_BYTE2_MAKE_NO_VVVV(false /*f64BitOpSz*/, true /*f256BitAvx*/, X86_OP_VEX2_BYTE1_P_0F3H);
     2968    pCodeBuf[off++] = 0x6f;
     2969    off = iemNativeEmitGprByGprDisp(pCodeBuf, off, iVecRegDst, iGprBase, offDisp);
     2970    RT_NOREF(iGprTmp);
     2971
     2972#elif defined(RT_ARCH_ARM64)
     2973    Assert(!(iVecRegDst & 0x1));
     2974    off = iemNativeEmitVecRegByGprLdStEx(pCodeBuf, off, iVecRegDst, iGprBase, offDisp,
     2975                                         kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U), iGprTmp);
     2976    off = iemNativeEmitVecRegByGprLdStEx(pCodeBuf, off, iVecRegDst + 1, iGprBase, offDisp + sizeof(RTUINT128U),
     2977                                         kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U), iGprTmp);
     2978#else
     2979# error "port me"
     2980#endif
     2981    return off;
     2982}
     2983
     2984
     2985/**
     2986 * Emits a 256-bit GPR load via a GPR base address with a displacement.
     2987 */
     2988DECL_INLINE_THROW(uint32_t)
     2989iemNativeEmitLoadVecRegByGprU256(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iVecRegDst, uint8_t iGprBase, int32_t offDisp)
     2990{
     2991#ifdef RT_ARCH_AMD64
     2992    off = iemNativeEmitLoadVecRegByGprU128Ex(iemNativeInstrBufEnsure(pReNative, off, 8), off, iVecRegDst, iGprBase, offDisp);
     2993    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
     2994
     2995#elif defined(RT_ARCH_ARM64)
     2996    Assert(!(iVecRegDst & 0x1));
     2997    off = iemNativeEmitGprByGprLdSt(pReNative, off, iVecRegDst, iGprBase, offDisp,
     2998                                    kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U));
     2999    off = iemNativeEmitGprByGprLdSt(pReNative, off, iVecRegDst + 1, iGprBase, offDisp + sizeof(RTUINT128U),
     3000                                    kArmv8A64InstrLdStType_Ld_Vr_128, sizeof(RTUINT128U));
    29023001
    29033002#else
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