Changeset 103919 in vbox
- Timestamp:
- Mar 19, 2024 1:52:22 PM (13 months ago)
- svn:sync-xref-src-repo-rev:
- 162293
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r103917 r103919 3358 3358 'IEM_MC_STORE_XREG_XMM_U64': (McBlock.parseMcGeneric, True, True, False, ), 3359 3359 'IEM_MC_STORE_YREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 3360 'IEM_MC_STORE_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False,),3360 'IEM_MC_STORE_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3361 3361 'IEM_MC_STORE_YREG_U256_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3362 3362 'IEM_MC_STORE_YREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
r103917 r103919 7109 7109 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForFullWrite); 7110 7110 7111 uint8_t const idxVarReg = iemNativeVar RegisterAcquire(pReNative, idxDstVar, &off);7111 uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxDstVar, &off); 7112 7112 7113 7113 off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg); … … 7116 7116 /* Free but don't flush the source register. */ 7117 7117 iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst); 7118 iemNativeVar RegisterRelease(pReNative, idxDstVar);7118 iemNativeVarSimdRegisterRelease(pReNative, idxDstVar); 7119 7119 7120 7120 return off; … … 7303 7303 /* Free but don't flush the register. */ 7304 7304 iemNativeSimdRegFreeTmp(pReNative, idxSimdReg); 7305 7306 return off; 7307 } 7308 7309 7310 #define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) \ 7311 off = iemNativeEmitSimdStoreYregU128ZxVlmax(pReNative, off, a_iYRegDst, a_u128Src) 7312 7313 /** Emits code for IEM_MC_STORE_YREG_U128_ZX_VLMAX. */ 7314 DECL_INLINE_THROW(uint32_t) 7315 iemNativeEmitSimdStoreYregU128ZxVlmax(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iYReg, uint8_t idxSrcVar) 7316 { 7317 IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxSrcVar); 7318 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxSrcVar, sizeof(RTUINT128U)); 7319 7320 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iYReg), 7321 kIemNativeGstSimdRegLdStSz_256, kIemNativeGstRegUse_ForFullWrite); 7322 7323 uint8_t const idxVarReg = iemNativeVarSimdRegisterAcquire(pReNative, idxSrcVar, &off); 7324 7325 off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg); 7326 off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst); 7327 IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg); 7328 IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg); 7329 7330 /* Free but don't flush the source register. */ 7331 iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst); 7332 iemNativeVarSimdRegisterRelease(pReNative, idxSrcVar); 7305 7333 7306 7334 return off;
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