VirtualBox

Changeset 103951 in vbox


Ignore:
Timestamp:
Mar 20, 2024 11:59:02 AM (13 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
162327
Message:

VMM/IEM: Rename iemMemFetchDataU256AlignedSse(Jmp) to iemMemFetchDataU256AlignedAvx(Jmp) and adjust the microcode statements, convert the code to be instantiated by the memory RW templates, bugref:10614

Location:
trunk/src/VBox/VMM
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r103916 r103951  
    72337233#include "IEMAllMemRWTmpl.cpp.h"
    72347234
     7235#define TMPL_MEM_TYPE           RTUINT256U
     7236#define TMPL_MEM_TYPE_ALIGN     (sizeof(RTUINT256U) - 1)
     7237#define TMPL_MEM_MAP_FLAGS_ADD  IEM_MEMMAP_F_ALIGN_GP
     7238#define TMPL_MEM_FN_SUFF        U256AlignedAvx
     7239#define TMPL_MEM_FMT_TYPE       "%.32Rhxs"
     7240#define TMPL_MEM_FMT_DESC       "qqword"
     7241#include "IEMAllMemRWTmpl.cpp.h"
     7242
    72357243/**
    72367244 * Fetches a data dword and zero extends it to a qword.
    … …  
    72917299}
    72927300#endif
    7293 
    7294 
    7295 /**
    7296  * Fetches a data oword (octo word) at an aligned address, generally AVX
    7297  * related.
    7298  *
    7299  * Raises \#GP(0) if not aligned.
    7300  *
    7301  * @returns Strict VBox status code.
    7302  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7303  * @param   pu256Dst            Where to return the qword.
    7304  * @param   iSegReg             The index of the segment register to use for
    7305  *                              this access.  The base and limits are checked.
    7306  * @param   GCPtrMem            The address of the guest memory.
    7307  */
    7308 VBOXSTRICTRC iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT
    7309 {
    7310     /* The lazy approach for now... */
    7311     uint8_t      bUnmapInfo;
    7312     PCRTUINT256U pu256Src;
    7313     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu256Src, &bUnmapInfo, sizeof(*pu256Src), iSegReg, GCPtrMem,
    7314                                 IEM_ACCESS_DATA_R, (sizeof(*pu256Src) - 1) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE);
    7315     if (rc == VINF_SUCCESS)
    7316     {
    7317         pu256Dst->au64[0] = pu256Src->au64[0];
    7318         pu256Dst->au64[1] = pu256Src->au64[1];
    7319         pu256Dst->au64[2] = pu256Src->au64[2];
    7320         pu256Dst->au64[3] = pu256Src->au64[3];
    7321         rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo);
    7322         Log(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7323     }
    7324     return rc;
    7325 }
    7326 
    7327 
    7328 #ifdef IEM_WITH_SETJMP
    7329 /**
    7330  * Fetches a data oword (octo word) at an aligned address, generally AVX
    7331  * related, longjmp on error.
    7332  *
    7333  * Raises \#GP(0) if not aligned.
    7334  *
    7335  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7336  * @param   pu256Dst            Where to return the qword.
    7337  * @param   iSegReg             The index of the segment register to use for
    7338  *                              this access.  The base and limits are checked.
    7339  * @param   GCPtrMem            The address of the guest memory.
    7340  */
    7341 void iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg,
    7342                                       RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP
    7343 {
    7344     /* The lazy approach for now... */
    7345     uint8_t      bUnmapInfo;
    7346     PCRTUINT256U pu256Src = (PCRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Src), iSegReg, GCPtrMem, IEM_ACCESS_DATA_R,
    7347                                                        (sizeof(*pu256Src) - 1) | IEM_MEMMAP_F_ALIGN_GP | IEM_MEMMAP_F_ALIGN_SSE);
    7348     pu256Dst->au64[0] = pu256Src->au64[0];
    7349     pu256Dst->au64[1] = pu256Src->au64[1];
    7350     pu256Dst->au64[2] = pu256Src->au64[2];
    7351     pu256Dst->au64[3] = pu256Src->au64[3];
    7352     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
    7353     Log(("IEM RD qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7354 }
    7355 #endif
    7356 
    73577301
    73587302
    … …  
    75287472    PRTUINT256U pu256Dst = (PRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem,
    75297473                                                     IEM_ACCESS_DATA_W, 0 /* NO_AC variant */);
    7530     pu256Dst->au64[0] = pu256Value->au64[0];
    7531     pu256Dst->au64[1] = pu256Value->au64[1];
    7532     pu256Dst->au64[2] = pu256Value->au64[2];
    7533     pu256Dst->au64[3] = pu256Value->au64[3];
    7534     iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo);
    7535     Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7536 }
    7537 #endif
    7538 
    7539 
    7540 /**
    7541  * Stores a data dqword, AVX \#GP(0) aligned.
    7542  *
    7543  * @returns Strict VBox status code.
    7544  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7545  * @param   iSegReg             The index of the segment register to use for
    7546  *                              this access.  The base and limits are checked.
    7547  * @param   GCPtrMem            The address of the guest memory.
    7548  * @param   pu256Value          Pointer to the value to store.
    7549  */
    7550 VBOXSTRICTRC iemMemStoreDataU256AlignedAvx(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT
    7551 {
    7552     /* The lazy approach for now... */
    7553     uint8_t      bUnmapInfo;
    7554     PRTUINT256U  pu256Dst;
    7555     VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu256Dst, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem,
    7556                                 IEM_ACCESS_DATA_W, (sizeof(*pu256Dst) - 1) | IEM_MEMMAP_F_ALIGN_GP);
    7557     if (rc == VINF_SUCCESS)
    7558     {
    7559         pu256Dst->au64[0] = pu256Value->au64[0];
    7560         pu256Dst->au64[1] = pu256Value->au64[1];
    7561         pu256Dst->au64[2] = pu256Value->au64[2];
    7562         pu256Dst->au64[3] = pu256Value->au64[3];
    7563         rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo);
    7564         Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst));
    7565     }
    7566     return rc;
    7567 }
    7568 
    7569 
    7570 #ifdef IEM_WITH_SETJMP
    7571 /**
    7572  * Stores a data dqword, AVX aligned.
    7573  *
    7574  * @returns Strict VBox status code.
    7575  * @param   pVCpu               The cross context virtual CPU structure of the calling thread.
    7576  * @param   iSegReg             The index of the segment register to use for
    7577  *                              this access.  The base and limits are checked.
    7578  * @param   GCPtrMem            The address of the guest memory.
    7579  * @param   pu256Value          Pointer to the value to store.
    7580  */
    7581 void iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem,
    7582                                       PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP
    7583 {
    7584     /* The lazy approach for now... */
    7585     uint8_t     bUnmapInfo;
    7586     PRTUINT256U pu256Dst = (PRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem,
    7587                                                      IEM_ACCESS_DATA_W, (sizeof(*pu256Dst) - 1) | IEM_MEMMAP_F_ALIGN_GP);
    75887474    pu256Dst->au64[0] = pu256Value->au64[0];
    75897475    pu256Dst->au64[1] = pu256Value->au64[1];

  • trunk/src/VBox/VMM/include/IEMInline.h

    r103916 r103951  
    41164116#undef TMPL_MEM_NO_MAPPING
    41174117
     4118#define TMPL_MEM_NO_MAPPING
     4119#define TMPL_MEM_TYPE       RTUINT256U
     4120#define TMPL_MEM_TYPE_ALIGN 31
     4121#define TMPL_MEM_TYPE_SIZE  32
     4122#define TMPL_MEM_FN_SUFF    U256AlignedAvx
     4123#define TMPL_MEM_FMT_TYPE   "%.32Rhxs"
     4124#define TMPL_MEM_FMT_DESC   "qqword"
     4125#include "../VMMAll/IEMAllMemRWTmplInline.cpp.h"
     4126#undef TMPL_MEM_NO_MAPPING
     4127
    41184128#undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK
    41194129

  • trunk/src/VBox/VMM/include/IEMInternal.h

    r103927 r103951  
    54805480VBOXSTRICTRC    iemMemFetchDataU256(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
    54815481VBOXSTRICTRC    iemMemFetchDataU256NoAc(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
    5482 VBOXSTRICTRC    iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
     5482VBOXSTRICTRC    iemMemFetchDataU256AlignedAvx(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
    54835483VBOXSTRICTRC    iemMemFetchDataXdtr(PVMCPUCC pVCpu, uint16_t *pcbLimit, PRTGCPTR pGCPtrBase, uint8_t iSegReg,
    54845484                                    RTGCPTR GCPtrMem, IEMMODE enmOpSize) RT_NOEXCEPT;
    … …  
    54975497void            iemMemFetchDataU256SafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    54985498void            iemMemFetchDataU256NoAcSafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    5499 void            iemMemFetchDataU256AlignedSseSafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5499void            iemMemFetchDataU256AlignedAvxSafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    55005500# if 0 /* these are inlined now */
    55015501uint8_t         iemMemFetchDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    … …  
    55115511void            iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    55125512void            iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
     5513void            iemMemFetchDataU256AlignedAvxJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    55135514# endif
    55145515void            iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    5515 void            iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
    55165516#endif
    55175517
    … …  
    55545554void            iemMemStoreDataNoAcU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55555555void            iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
     5556void            iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55565557#endif
    55575558void            iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55585559void            iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    5559 void            iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
    55605560#endif
    55615561

  • trunk/src/VBox/VMM/include/IEMMc.h

    r103936 r103951  
    11791179    IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)))
    11801180# define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \
    1181     IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedSse(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)))
     1181    IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedAvx(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)))
    11821182
    11831183# define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \
    … …  
    11861186    IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)))
    11871187# define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \
    1188     IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedSse(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)))
     1188    IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedAvx(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)))
    11891189#else
    11901190# define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) \
    … …  
    11931193    iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))
    11941194# define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \
    1195     iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))
     1195    iemMemFetchDataU256AlignedAvxJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))
    11961196
    11971197# define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \
    … …  
    12001200    iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))
    12011201# define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \
    1202     iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))
     1202    iemMemFetchDataU256AlignedAvxJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))
    12031203
    12041204# define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) \
    1205     iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem))
     1205    iemMemFlatFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_GCPtrMem))
    12061206# define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) \
    1207     iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem))
     1207    iemMemFlatFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_GCPtrMem))
    12081208# define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) \
    1209     iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem))
     1209    iemMemFlatFetchDataU256AlignedAvxJmp(pVCpu, &(a_u256Dst), (a_GCPtrMem))
    12101210
    12111211# define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) \
    1212     iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem))
     1212    iemMemFlatFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_GCPtrMem))
    12131213# define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) \
    1214     iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem))
     1214    iemMemFlatFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_GCPtrMem))
    12151215# define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) \
    1216     iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem))
     1216    iemMemFlatFetchDataU256AlignedAvxJmp(pVCpu, &(a_YmmDst).ymm, (a_GCPtrMem))
    12171217#endif
    12181218
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