Changeset 103979 in vbox
- Timestamp:
- Mar 21, 2024 9:31:47 AM (12 months ago)
- svn:sync-xref-src-repo-rev:
- 162359
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
-
IEMAllInstPython.py (modified) (3 diffs)
-
IEMAllN8veRecompFuncs.h (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r103973 r103979 2977 2977 'IEM_MC_AND_ARG_U32': (McBlock.parseMcGeneric, False, False, False, ), 2978 2978 'IEM_MC_AND_ARG_U64': (McBlock.parseMcGeneric, False, False, False, ), 2979 'IEM_MC_AND_GREG_U16': (McBlock.parseMcGeneric, True, True, False,),2980 'IEM_MC_AND_GREG_U32': (McBlock.parseMcGeneric, True, True, False,),2981 'IEM_MC_AND_GREG_U64': (McBlock.parseMcGeneric, True, True, False,),2982 'IEM_MC_AND_GREG_U8': (McBlock.parseMcGeneric, True, True, False,),2979 'IEM_MC_AND_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 2980 'IEM_MC_AND_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 2981 'IEM_MC_AND_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 2982 'IEM_MC_AND_GREG_U8': (McBlock.parseMcGeneric, True, True, True, ), 2983 2983 'IEM_MC_AND_LOCAL_U16': (McBlock.parseMcGeneric, False, False, True, ), 2984 2984 'IEM_MC_AND_LOCAL_U32': (McBlock.parseMcGeneric, False, False, True, ), … … 3171 3171 'IEM_MC_IF_FPUREG_NOT_EMPTY': (McBlock.parseMcGenericCond, True, True, False, ), 3172 3172 'IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80': (McBlock.parseMcGenericCond, True, True, False, ), 3173 'IEM_MC_IF_GREG_BIT_SET': (McBlock.parseMcGenericCond, True, False, False,),3173 'IEM_MC_IF_GREG_BIT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 3174 3174 'IEM_MC_IF_LOCAL_IS_Z': (McBlock.parseMcGenericCond, True, False, True, ), 3175 3175 'IEM_MC_IF_MXCSR_XCPT_PENDING': (McBlock.parseMcGenericCond, True, True, g_fNativeSimd), … … 3249 3249 'IEM_MC_NATIVE_ENDIF': (McBlock.parseMcGenericCond, False, False, True, ), 3250 3250 'IEM_MC_OR_2LOCS_U32': (McBlock.parseMcGeneric, False, False, False, ), 3251 'IEM_MC_OR_GREG_U16': (McBlock.parseMcGeneric, True, True, False,),3252 'IEM_MC_OR_GREG_U32': (McBlock.parseMcGeneric, True, True, False,),3253 'IEM_MC_OR_GREG_U64': (McBlock.parseMcGeneric, True, True, False,),3254 'IEM_MC_OR_GREG_U8': (McBlock.parseMcGeneric, True, True, False,),3251 'IEM_MC_OR_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3252 'IEM_MC_OR_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3253 'IEM_MC_OR_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3254 'IEM_MC_OR_GREG_U8': (McBlock.parseMcGeneric, True, True, True, ), 3255 3255 'IEM_MC_OR_LOCAL_U16': (McBlock.parseMcGeneric, False, False, True, ), 3256 3256 'IEM_MC_OR_LOCAL_U32': (McBlock.parseMcGeneric, False, False, True, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
r103973 r103979 1904 1904 1905 1905 1906 #define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) \ 1907 off = iemNativeEmitIfGregBitSet(pReNative, off, a_iGReg, a_iBitNo); \ 1908 do { 1909 1910 /** Emits code for IEM_MC_IF_GREG_BIT_SET. */ 1911 DECL_INLINE_THROW(uint32_t) 1912 iemNativeEmitIfGregBitSet(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGReg, uint8_t iBitNo) 1913 { 1914 PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative, &off); 1915 Assert(iGReg < 16); 1916 1917 uint8_t const idxGstFullReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(iGReg), 1918 kIemNativeGstRegUse_ReadOnly); 1919 1920 off = iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfNoneSet(pReNative, off, idxGstFullReg, RT_BIT_64(iBitNo), pEntry->idxLabelElse); 1921 1922 iemNativeRegFreeTmp(pReNative, idxGstFullReg); 1923 1924 iemNativeCondStartIfBlock(pReNative, off); 1925 return off; 1926 } 1927 1928 1906 1929 #ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR 1907 1930 … … 3303 3326 3304 3327 #endif 3328 3329 IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off); 3330 3331 off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxGstTmpReg, RT_UOFFSETOF_DYN(VMCPU, cpum.GstCtx.aGRegs[iGReg])); 3332 3333 iemNativeRegFreeTmp(pReNative, idxGstTmpReg); 3334 return off; 3335 } 3336 3337 3338 #define IEM_MC_AND_GREG_U8(a_iGReg, a_u8Mask) \ 3339 off = iemNativeEmitAndGReg(pReNative, off, a_iGReg, a_u8Mask, sizeof(uint8_t)) 3340 3341 #define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Mask) \ 3342 off = iemNativeEmitAndGReg(pReNative, off, a_iGReg, a_u16Mask, sizeof(uint16_t)) 3343 3344 #define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Mask) \ 3345 off = iemNativeEmitAndGReg(pReNative, off, a_iGReg, a_u32Mask, sizeof(uint32_t)) 3346 3347 #define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Mask) \ 3348 off = iemNativeEmitAndGReg(pReNative, off, a_iGReg, a_u64Mask, sizeof(uint64_t)) 3349 3350 /** Emits code for IEM_MC_AND_GREG_U8, IEM_MC_AND_GREG_U16, IEM_MC_AND_GREG_U32 and IEM_MC_AND_GREG_U64. */ 3351 DECL_INLINE_THROW(uint32_t) 3352 iemNativeEmitAndGReg(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGReg, uint64_t uMask, uint8_t cbMask) 3353 { 3354 #ifdef VBOX_STRICT 3355 switch (cbMask) 3356 { 3357 case sizeof(uint8_t): Assert((uint8_t)uMask == uMask); break; 3358 case sizeof(uint16_t): Assert((uint16_t)uMask == uMask); break; 3359 case sizeof(uint32_t): Assert((uint32_t)uMask == uMask); break; 3360 case sizeof(uint64_t): break; 3361 default: AssertFailedBreak(); 3362 } 3363 #endif 3364 3365 uint8_t const idxGstTmpReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(iGReg), 3366 kIemNativeGstRegUse_ForUpdate); 3367 3368 switch (cbMask) 3369 { 3370 case sizeof(uint8_t): /* Leaves the higher bits untouched. */ 3371 off = iemNativeEmitAndGprByImm(pReNative, off, idxGstTmpReg, uMask | UINT64_C(0xffffffffffffff00)); 3372 break; 3373 case sizeof(uint16_t): /* Leaves the higher bits untouched. */ 3374 off = iemNativeEmitAndGprByImm(pReNative, off, idxGstTmpReg, uMask | UINT64_C(0xffffffffffff0000)); 3375 break; 3376 case sizeof(uint32_t): /* Zeroes the high 32 bits of the guest register. */ 3377 off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxGstTmpReg, uMask); 3378 break; 3379 case sizeof(uint64_t): 3380 off = iemNativeEmitAndGprByImm(pReNative, off, idxGstTmpReg, uMask); 3381 break; 3382 default: AssertFailedBreak(); 3383 } 3384 3385 IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off); 3386 3387 off = iemNativeEmitStoreGprToVCpuU64(pReNative, off, idxGstTmpReg, RT_UOFFSETOF_DYN(VMCPU, cpum.GstCtx.aGRegs[iGReg])); 3388 3389 iemNativeRegFreeTmp(pReNative, idxGstTmpReg); 3390 return off; 3391 } 3392 3393 3394 #define IEM_MC_OR_GREG_U8(a_iGReg, a_u8Mask) \ 3395 off = iemNativeEmitOrGReg(pReNative, off, a_iGReg, a_u8Mask, sizeof(uint8_t)) 3396 3397 #define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Mask) \ 3398 off = iemNativeEmitOrGReg(pReNative, off, a_iGReg, a_u16Mask, sizeof(uint16_t)) 3399 3400 #define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Mask) \ 3401 off = iemNativeEmitOrGReg(pReNative, off, a_iGReg, a_u32Mask, sizeof(uint32_t)) 3402 3403 #define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Mask) \ 3404 off = iemNativeEmitOrGReg(pReNative, off, a_iGReg, a_u64Mask, sizeof(uint64_t)) 3405 3406 /** Emits code for IEM_MC_OR_GREG_U8, IEM_MC_OR_GREG_U16, IEM_MC_OR_GREG_U32 and IEM_MC_OR_GREG_U64. */ 3407 DECL_INLINE_THROW(uint32_t) 3408 iemNativeEmitOrGReg(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGReg, uint64_t uMask, uint8_t cbMask) 3409 { 3410 #ifdef VBOX_STRICT 3411 switch (cbMask) 3412 { 3413 case sizeof(uint8_t): Assert((uint8_t)uMask == uMask); break; 3414 case sizeof(uint16_t): Assert((uint16_t)uMask == uMask); break; 3415 case sizeof(uint32_t): Assert((uint32_t)uMask == uMask); break; 3416 case sizeof(uint64_t): break; 3417 default: AssertFailedBreak(); 3418 } 3419 #endif 3420 3421 uint8_t const idxGstTmpReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(iGReg), 3422 kIemNativeGstRegUse_ForUpdate); 3423 3424 switch (cbMask) 3425 { 3426 case sizeof(uint8_t): /* Leaves the higher bits untouched. */ 3427 case sizeof(uint16_t): 3428 case sizeof(uint64_t): 3429 off = iemNativeEmitOrGprByImm(pReNative, off, idxGstTmpReg, uMask); 3430 break; 3431 case sizeof(uint32_t): /* Zeroes the high 32 bits of the guest register. */ 3432 off = iemNativeEmitOrGpr32ByImm(pReNative, off, idxGstTmpReg, uMask); 3433 break; 3434 default: AssertFailedBreak(); 3435 } 3305 3436 3306 3437 IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
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