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Changeset 103990 in vbox for trunk/include/iprt


Ignore:
Timestamp:
Mar 21, 2024 2:23:23 PM (12 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
162375
Message:

VMM/IEM: Fix the SIMD guest register value checking, cnt operates on byte elements so the generated code would only actually check the low 64-bit instead of the whole 128-bit for matching values, use uaddlv instead which sums up all byte values and stores the result in the low 16-bit of the vector register. The result should be zero for matching values, bugref:10614

File:
1 edited

Legend:

Unmodified
Added
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  • trunk/include/iprt/armv8.h

    r103860 r103990  
    42444244
    42454245
     4246/** Armv8 vector unsigned sum long across vector element size.    */
     4247typedef enum ARMV8INSTRVECUADDLVSZ
     4248{
     4249    kArmv8InstrUAddLVSz_8B  = 0,                 /**<  8 x 8-bit. */
     4250    kArmv8InstrUAddLVSz_16B = RT_BIT_32(30),     /**< 16 x 8-bit. */
     4251    kArmv8InstrUAddLVSz_4H  = 1,                 /**<  4 x 16-bit. */
     4252    kArmv8InstrUAddLVSz_8H  = RT_BIT_32(30) | 1, /**<  8 x 16-bit. */
     4253    kArmv8InstrUAddLVSz_4S  = RT_BIT_32(30) | 2, /**<  4 x 32-bit. */
     4254} ARMV8INSTRVECUADDLVSZ;
     4255
     4256
     4257/**
     4258 * A64: Encodes UADDLV (vector, register).
     4259 *
     4260 * @returns The encoded instruction.
     4261 * @param   iVecRegDst  The vector register to put the result into.
     4262 * @param   iVecRegSrc  The vector source register.
     4263 * @param   enmSz       Element size.
     4264 */
     4265DECL_FORCE_INLINE(uint32_t) Armv8A64MkVecInstrUAddLV(uint32_t iVecRegDst, uint32_t iVecRegSrc, ARMV8INSTRVECUADDLVSZ enmSz)
     4266{
     4267    Assert(iVecRegDst < 32); Assert(iVecRegSrc < 32);
     4268
     4269    return UINT32_C(0x2e303800)
     4270         | ((uint32_t)enmSz)
     4271         | (iVecRegSrc << 5)
     4272         | iVecRegDst;
     4273}
     4274
     4275
    42464276/** @} */
    42474277
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