Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstCommon.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstCommon.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstCommon.cpp.h	(revision 104018)
@@ -897,5 +897,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint16_t, u16Value);
@@ -907,5 +907,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Value);
@@ -917,5 +917,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Value);
@@ -941,5 +941,5 @@
             if (iSegReg >= X86_SREG_FS || !IEM_IS_32BIT_CODE(pVCpu)) /* IEM_CIMPL_F_XXX flag are combined for whole MC block, */
             {                                                        /* thus the duplication. */
-                IEM_MC_BEGIN(5, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(RTGCPTR,       GCPtrEff);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -963,5 +963,5 @@
             else
             {
-                IEM_MC_BEGIN(5, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(RTGCPTR,       GCPtrEff);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -987,5 +987,5 @@
             if (iSegReg >= X86_SREG_FS || !IEM_IS_32BIT_CODE(pVCpu))
             {
-                IEM_MC_BEGIN(5, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(RTGCPTR,       GCPtrEff);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -1009,5 +1009,5 @@
             else
             {
-                IEM_MC_BEGIN(5, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(RTGCPTR,       GCPtrEff);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -1031,5 +1031,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(5, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(uint16_t,        uSel,                                    0);
             IEM_MC_ARG(uint64_t,        offSeg,                                  1);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstCommonBodyMacros.h	(revision 104018)
@@ -47,5 +47,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(1, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_STORE_GREG_U16_CONST(IEM_GET_MODRM_RM(pVCpu, a_bRm), 0); \
@@ -59,5 +59,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_STORE_GREG_U32_CONST(IEM_GET_MODRM_RM(pVCpu, a_bRm), 0); \
@@ -71,5 +71,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(1, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_STORE_GREG_U64_CONST(IEM_GET_MODRM_RM(pVCpu, a_bRm), 0); \
@@ -101,5 +101,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, a_f16BitMcFlag, 0); \
+                IEM_MC_BEGIN(a_f16BitMcFlag, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t,        u16Src,  1); \
@@ -124,5 +124,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t,        u32Src,  1); \
@@ -148,5 +148,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t,        u64Src,  1); \
@@ -181,5 +181,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 1, a_f16BitMcFlag, 0); \
+                IEM_MC_BEGIN(a_f16BitMcFlag, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -206,5 +206,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -232,5 +232,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -276,5 +276,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t,        u16Src,  1); \
@@ -298,5 +298,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t,        u32Src,  1); \
@@ -320,5 +320,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t,        u64Src,  1); \
@@ -352,5 +352,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 1, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -376,5 +376,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -400,5 +400,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h	(revision 104018)
@@ -68,5 +68,5 @@
         && pVCpu->iem.s.uRexReg == pVCpu->iem.s.uRexB) \
     { \
-        IEM_MC_BEGIN(0, 1, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_STORE_GREG_U8_CONST(IEM_GET_MODRM_REG(pVCpu, a_bRm), 0); \
@@ -89,5 +89,5 @@
     if (IEM_IS_MODRM_REG_MODE(a_bRm)) \
     { \
-        IEM_MC_BEGIN(3, 0, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint8_t,         u8Src,   1); \
@@ -119,5 +119,5 @@
         if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK) || (pVCpu->iem.s.fExec & IEM_F_X86_DISREGARD_LOCK)) \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,  pu8Dst,           0); \
             IEM_MC_ARG(uint8_t,    u8Src,            1); \
@@ -139,5 +139,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,  pu8Dst,           0); \
             IEM_MC_ARG(uint8_t,    u8Src,            1); \
@@ -170,5 +170,5 @@
     if (IEM_IS_MODRM_REG_MODE(a_bRm)) \
     { \
-        IEM_MC_BEGIN(3, 0, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint8_t,         u8Src,   1); \
@@ -199,5 +199,5 @@
         if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK)) \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -244,5 +244,5 @@
     if (IEM_IS_MODRM_REG_MODE(a_bRm)) \
     { \
-        IEM_MC_BEGIN(3, 0, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint8_t,         u8Src,   1); \
@@ -270,5 +270,5 @@
          * We're accessing memory. \
          */ \
-        IEM_MC_BEGIN(3, 1, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -304,5 +304,5 @@
     if (IEM_IS_MODRM_REG_MODE(a_bRm)) \
     { \
-        IEM_MC_BEGIN(3, 0, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint8_t,         u8Src,   1); \
@@ -329,5 +329,5 @@
          * We're accessing memory. \
          */ \
-        IEM_MC_BEGIN(3, 1, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -367,5 +367,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t,   u16Src,  1); \
@@ -390,5 +390,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t,   u32Src,  1); \
@@ -414,5 +414,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t,        u64Src,  1); \
@@ -451,5 +451,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *, pu16Dst,          0); \
                     IEM_MC_ARG(uint16_t,   u16Src,           1); \
@@ -471,5 +471,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *, pu32Dst,          0); \
                     IEM_MC_ARG(uint32_t,   u32Src,           1); \
@@ -491,5 +491,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *, pu64Dst,          0); \
                     IEM_MC_ARG(uint64_t,   u64Src,           1); \
@@ -521,5 +521,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *, pu16Dst,          0); \
                     IEM_MC_ARG(uint16_t,   u16Src,           1); \
@@ -541,5 +541,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *, pu32Dst,          0); \
                     IEM_MC_ARG(uint32_t,   u32Src,           1); \
@@ -561,5 +561,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *, pu64Dst,          0); \
                     IEM_MC_ARG(uint64_t,   u64Src,           1); \
@@ -599,5 +599,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t,   u16Src,  1); \
@@ -621,5 +621,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t,   u32Src,  1); \
@@ -643,5 +643,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t,        u64Src,  1); \
@@ -679,5 +679,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -707,5 +707,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -735,5 +735,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, a_bRm, 0); \
@@ -779,5 +779,5 @@
  */
 #define IEMOP_BODY_BINARY_AL_Ib(a_InsNm, a_fNativeArchs) \
-    IEM_MC_BEGIN(3, 3, 0, 0); \
+    IEM_MC_BEGIN(0, 0); \
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -810,5 +810,5 @@
         case IEMMODE_16BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -835,5 +835,5 @@
         case IEMMODE_32BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
             uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -861,5 +861,5 @@
         case IEMMODE_64BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -897,5 +897,5 @@
         case IEMMODE_16BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -921,5 +921,5 @@
         case IEMMODE_32BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
             uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -945,5 +945,5 @@
         case IEMMODE_64BIT: \
         { \
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -2033,5 +2033,5 @@
     { \
         case IEMMODE_16BIT: \
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG(uint16_t *,  pu16Dst, 0); \
@@ -2045,5 +2045,5 @@
             \
         case IEMMODE_32BIT: \
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG(uint32_t *,  pu32Dst, 0); \
@@ -2476,5 +2476,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint16_t, u16Value);
@@ -2486,5 +2486,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Value);
@@ -2496,5 +2496,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Value);
@@ -2560,5 +2560,5 @@
 
     /* 8086 works differently wrt to 'push sp' compared to 80186 and later. */
-    IEM_MC_BEGIN(0, 1, IEM_MC_F_ONLY_8086, 0);
+    IEM_MC_BEGIN(IEM_MC_F_ONLY_8086, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t, u16Value);
@@ -2616,5 +2616,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_POP_GREG_U16(iReg);
@@ -2624,5 +2624,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_POP_GREG_U32(iReg);
@@ -2632,5 +2632,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_POP_GREG_U64(iReg);
@@ -2852,5 +2852,5 @@
             if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
             {
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_186 | IEM_MC_F_NOT_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_186 | IEM_MC_F_NOT_64BIT, 0);
                 IEM_MC_ARG(uint16_t,    u16Index,       0); /* Note! All operands are actually signed. Lazy unsigned bird. */
                 IEM_MC_ARG(uint16_t,    u16LowerBounds, 1);
@@ -2870,5 +2870,5 @@
             else /* 32-bit operands */
             {
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
                 IEM_MC_ARG(uint32_t,    u32Index,       0); /* Note! All operands are actually signed. Lazy unsigned bird. */
                 IEM_MC_ARG(uint32_t,    u32LowerBounds, 1);
@@ -2934,5 +2934,5 @@
     {
         /* Register */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_286 | IEM_MC_F_NOT_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286 | IEM_MC_F_NOT_64BIT, 0);
         IEMOP_HLP_DECODED_NL_2(OP_ARPL, IEMOPFORM_MR_REG, OP_PARM_Ew, OP_PARM_Gw, DISOPTYPE_HARMLESS);
         IEM_MC_ARG(uint16_t *,      pu16Dst,    0);
@@ -2951,5 +2951,5 @@
     {
         /* Memory */
-        IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_286 | IEM_MC_F_NOT_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286 | IEM_MC_F_NOT_64BIT, 0);
         IEM_MC_ARG(uint16_t *, pu16Dst,          0);
         IEM_MC_ARG(uint16_t,   u16Src,           1);
@@ -2992,5 +2992,5 @@
              * Register to register.
              */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Value);
@@ -3005,5 +3005,5 @@
              * We're loading a register from memory.
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t, u64Value);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -3123,5 +3123,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_186, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
             uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -3133,5 +3133,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
             uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -3143,5 +3143,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -3177,5 +3177,5 @@
                 /* register operand */
                 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_186, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t,              u16Tmp);
@@ -3194,5 +3194,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_186, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
@@ -3224,5 +3224,5 @@
                 /* register operand */
                 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t,      u32Tmp);
@@ -3242,5 +3242,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
@@ -3272,5 +3272,5 @@
                 /* register operand */
                 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t,              u64Tmp);
@@ -3290,5 +3290,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
@@ -3331,5 +3331,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_186, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL_CONST(uint16_t, uValue, (int16_t)i8Imm);
@@ -3339,5 +3339,5 @@
             break;
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL_CONST(uint32_t, uValue, (int32_t)i8Imm);
@@ -3347,5 +3347,5 @@
             break;
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL_CONST(uint64_t, uValue, (int64_t)i8Imm);
@@ -3378,5 +3378,5 @@
             {
                 /* register operand */
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_186, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
                 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -3398,5 +3398,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_186, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0);
 
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
@@ -3429,5 +3429,5 @@
                 /* register operand */
                 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t,      u32Tmp);
@@ -3447,5 +3447,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
@@ -3477,5 +3477,5 @@
                 /* register operand */
                 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t,      u64Tmp);
@@ -3495,5 +3495,5 @@
             {
                 /* memory operand */
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
@@ -3855,5 +3855,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
@@ -3876,5 +3876,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
@@ -3896,5 +3896,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
@@ -3917,5 +3917,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
@@ -3938,5 +3938,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
@@ -3959,5 +3959,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
@@ -3980,5 +3980,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
@@ -4001,5 +4001,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
@@ -4022,5 +4022,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
@@ -4043,5 +4043,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
@@ -4064,5 +4064,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
@@ -4085,5 +4085,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
@@ -4106,5 +4106,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
@@ -4127,5 +4127,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
@@ -4148,5 +4148,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
@@ -4169,5 +4169,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
@@ -4188,5 +4188,5 @@
     { \
         /* register target */ \
-        IEM_MC_BEGIN(3, 2, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4214,5 +4214,5 @@
         if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK) || (pVCpu->iem.s.fExec & IEM_F_X86_DISREGARD_LOCK)) \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -4235,5 +4235,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,                 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -4261,5 +4261,5 @@
     { \
         /* register target */ \
-        IEM_MC_BEGIN(3, 2, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4286,5 +4286,5 @@
         if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK) || (pVCpu->iem.s.fExec & IEM_F_X86_DISREGARD_LOCK)) \
         { \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -4448,5 +4448,5 @@
             case IEMMODE_16BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4474,5 +4474,5 @@
             case IEMMODE_32BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4501,5 +4501,5 @@
             case IEMMODE_64BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4537,5 +4537,5 @@
                 case IEMMODE_16BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2); \
@@ -4561,5 +4561,5 @@
                 case IEMMODE_32BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); \
@@ -4585,5 +4585,5 @@
                 case IEMMODE_64BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -4617,5 +4617,5 @@
                 case IEMMODE_16BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2); \
@@ -4641,5 +4641,5 @@
                 case IEMMODE_32BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); \
@@ -4665,5 +4665,5 @@
                 case IEMMODE_64BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); \
@@ -4702,5 +4702,5 @@
             case IEMMODE_16BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4727,5 +4727,5 @@
             case IEMMODE_32BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4752,5 +4752,5 @@
             case IEMMODE_64BIT: \
             { \
-                IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
@@ -4787,5 +4787,5 @@
                 case IEMMODE_16BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2); \
@@ -4815,5 +4815,5 @@
                 case IEMMODE_32BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); \
@@ -4843,5 +4843,5 @@
                 case IEMMODE_64BIT: \
                 { \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4); \
@@ -5024,5 +5024,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fRegNativeArchs) { \
@@ -5047,5 +5047,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fRegNativeArchs) { \
@@ -5071,5 +5071,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fRegNativeArchs) { \
@@ -5106,5 +5106,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5128,5 +5128,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5150,5 +5150,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5179,5 +5179,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5201,5 +5201,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5223,5 +5223,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5261,5 +5261,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fNativeArchs) { \
@@ -5283,5 +5283,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fNativeArchs) { \
@@ -5305,5 +5305,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_NATIVE_IF(a_fNativeArchs) { \
@@ -5339,5 +5339,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5365,5 +5365,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5391,5 +5391,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -5565,5 +5565,5 @@
         && pVCpu->iem.s.uRexReg == pVCpu->iem.s.uRexB)
     {
-        IEM_MC_BEGIN(3, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint8_t,         u8Src,   1);
@@ -5609,5 +5609,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(3, 0, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint16_t,   u16Src,  1);
@@ -5629,5 +5629,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t,   u32Src,  1);
@@ -5649,5 +5649,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint64_t,        u64Src,  1);
@@ -5689,5 +5689,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_LOCAL(uint8_t, uTmp1);
@@ -5708,5 +5708,5 @@
          */
 #define IEMOP_XCHG_BYTE(a_fnWorker, a_Style) \
-            IEM_MC_BEGIN(2, 4, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
             IEM_MC_LOCAL(uint8_t, bUnmapInfo); \
@@ -5754,5 +5754,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, uTmp1);
@@ -5769,5 +5769,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, uTmp1);
@@ -5784,5 +5784,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, uTmp1);
@@ -5811,5 +5811,5 @@
                 { \
                     case IEMMODE_16BIT: \
-                        IEM_MC_BEGIN(2, 4, 0, 0); \
+                        IEM_MC_BEGIN(0, 0); \
                         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                         IEM_MC_LOCAL(uint8_t,  bUnmapInfo); \
@@ -5831,5 +5831,5 @@
                     \
                     case IEMMODE_32BIT: \
-                        IEM_MC_BEGIN(2, 4, IEM_MC_F_MIN_386, 0); \
+                        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                         IEM_MC_LOCAL(uint8_t,  bUnmapInfo); \
@@ -5851,5 +5851,5 @@
                     \
                     case IEMMODE_64BIT: \
-                        IEM_MC_BEGIN(2, 4, IEM_MC_F_64BIT, 0); \
+                        IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst); \
                         IEM_MC_LOCAL(uint8_t,  bUnmapInfo); \
@@ -5900,5 +5900,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_LOCAL(uint8_t, u8Value);
@@ -5913,5 +5913,5 @@
          * We're writing a register to memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint8_t, u8Value);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -5943,5 +5943,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Value);
@@ -5953,5 +5953,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Value);
@@ -5963,5 +5963,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Value);
@@ -5983,5 +5983,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(uint16_t, u16Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -5995,5 +5995,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6007,5 +6007,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6038,5 +6038,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_LOCAL(uint8_t, u8Value);
@@ -6051,5 +6051,5 @@
          * We're loading a register from memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint8_t, u8Value);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6081,5 +6081,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Value);
@@ -6091,5 +6091,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Value);
@@ -6101,5 +6101,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Value);
@@ -6121,5 +6121,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(uint16_t, u16Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6133,5 +6133,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6145,5 +6145,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -6202,5 +6202,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Value);
@@ -6212,5 +6212,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Value);
@@ -6222,5 +6222,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Value);
@@ -6243,5 +6243,5 @@
         pVCpu->iem.s.enmEffOpSize = pVCpu->iem.s.enmDefOpSize = IEMMODE_16BIT;
 #endif
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint16_t,  u16Value);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffDst);
@@ -6271,5 +6271,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -6286,5 +6286,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -6301,5 +6301,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -6352,5 +6352,5 @@
     {
 #define IEMOP_MOV_SW_EV_REG_BODY(a_fCImplFlags) \
-            IEM_MC_BEGIN(2, 0, 0, a_fCImplFlags); \
+            IEM_MC_BEGIN(0, a_fCImplFlags); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG_CONST(uint8_t, iSRegArg, iSegReg, 0); \
@@ -6393,5 +6393,5 @@
          */
 #define IEMOP_MOV_SW_EV_MEM_BODY(a_fCImplFlags) \
-            IEM_MC_BEGIN(2, 1, 0, a_fCImplFlags); \
+            IEM_MC_BEGIN(0, a_fCImplFlags); \
             IEM_MC_ARG_CONST(uint8_t, iSRegArg, iSegReg, 0); \
             IEM_MC_ARG(uint16_t,      u16Value,          1); \
@@ -6468,5 +6468,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(2, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                        1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2 << 8);
@@ -6478,5 +6478,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                        1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4 << 8);
@@ -6488,5 +6488,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                        1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 8 << 8);
@@ -6638,5 +6638,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint16_t, u16Tmp1);
@@ -6651,5 +6651,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Tmp1);
@@ -6664,5 +6664,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Tmp1);
@@ -6712,5 +6712,5 @@
         IEMOP_MNEMONIC(nop, "nop");
     /** @todo testcase: lock nop; lock pause */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING();
     IEM_MC_ADVANCE_RIP_AND_FINISH();
@@ -6798,5 +6798,5 @@
         case IEMMODE_16BIT:
             IEMOP_MNEMONIC(cbw, "cbw");
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 7) {
@@ -6811,5 +6811,5 @@
         case IEMMODE_32BIT:
             IEMOP_MNEMONIC(cwde, "cwde");
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 15) {
@@ -6824,5 +6824,5 @@
         case IEMMODE_64BIT:
             IEMOP_MNEMONIC(cdqe, "cdqe");
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 31) {
@@ -6849,5 +6849,5 @@
         case IEMMODE_16BIT:
             IEMOP_MNEMONIC(cwd, "cwd");
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 15) {
@@ -6862,5 +6862,5 @@
         case IEMMODE_32BIT:
             IEMOP_MNEMONIC(cdq, "cdq");
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 31) {
@@ -6875,5 +6875,5 @@
         case IEMMODE_64BIT:
             IEMOP_MNEMONIC(cqo, "cqo");
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 63) {
@@ -6918,5 +6918,5 @@
 {
     IEMOP_MNEMONIC(wait, "wait");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE();
@@ -6964,5 +6964,5 @@
         && !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLahfSahf)
         IEMOP_RAISE_INVALID_OPCODE_RET();
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint32_t, u32Flags);
@@ -6990,5 +6990,5 @@
         && !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLahfSahf)
         IEMOP_RAISE_INVALID_OPCODE_RET();
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint8_t, u8Flags);
@@ -7039,5 +7039,5 @@
      * Fetch AL.
      */
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint8_t, u8Tmp);
@@ -7068,5 +7068,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint16_t, u16Tmp);
@@ -7079,5 +7079,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7090,5 +7090,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7120,5 +7120,5 @@
      * Store AL.
      */
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint8_t, u8Tmp);
@@ -7149,5 +7149,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint16_t, u16Tmp);
@@ -7160,5 +7160,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7171,5 +7171,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7187,5 +7187,5 @@
 /** Macro used by iemOp_movsb_Xb_Yb and iemOp_movswd_Xv_Yv */
 #define IEM_MOVS_CASE(ValBits, AddrBits, a_fMcFlags) \
-        IEM_MC_BEGIN(0, 2, a_fMcFlags, 0); \
+        IEM_MC_BEGIN(a_fMcFlags, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_LOCAL(uint##ValBits##_t, uValue); \
@@ -7385,5 +7385,5 @@
 /** Macro used by iemOp_cmpsb_Xb_Yb and iemOp_cmpswd_Xv_Yv */
 #define IEM_CMPS_CASE(ValBits, AddrBits, a_fMcFlags) \
-        IEM_MC_BEGIN(3, 3, a_fMcFlags, 0); \
+        IEM_MC_BEGIN(a_fMcFlags, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         \
@@ -7721,5 +7721,5 @@
 /** Macro used by iemOp_stosb_Yb_AL and iemOp_stoswd_Yv_eAX */
 #define IEM_STOS_CASE(ValBits, AddrBits, a_fMcFlags) \
-        IEM_MC_BEGIN(0, 2, a_fMcFlags, 0); \
+        IEM_MC_BEGIN(a_fMcFlags, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_LOCAL(uint##ValBits##_t, uValue); \
@@ -7902,5 +7902,5 @@
 /** Macro used by iemOp_lodsb_AL_Xb and iemOp_lodswd_eAX_Xv */
 #define IEM_LODS_CASE(ValBits, AddrBits, a_fMcFlags) \
-        IEM_MC_BEGIN(0, 2, a_fMcFlags, 0); \
+        IEM_MC_BEGIN(a_fMcFlags, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_LOCAL(uint##ValBits##_t, uValue); \
@@ -8096,5 +8096,5 @@
 /** Macro used by iemOp_scasb_AL_Xb and iemOp_scaswd_eAX_Xv */
 #define IEM_SCAS_CASE(ValBits, AddrBits, a_fMcFlags) \
-        IEM_MC_BEGIN(3, 2, a_fMcFlags, 0); \
+        IEM_MC_BEGIN(a_fMcFlags, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint##ValBits##_t *, puRax,   0); \
@@ -8381,5 +8381,5 @@
 {
     uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_STORE_GREG_U8_CONST(iFixedReg, u8Imm);
@@ -8477,5 +8477,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8486,5 +8486,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8495,5 +8495,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(&u64Imm); /* 64-bit immediate! */
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8603,5 +8603,5 @@
             /* register */ \
             uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift); \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_186, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,            0); \
@@ -8617,5 +8617,5 @@
         { \
             /* memory */ \
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_186, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -8751,5 +8751,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_186, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_186, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint16_t *,      pu16Dst,           0); \
@@ -8764,5 +8764,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,           0); \
@@ -8778,5 +8778,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,           0); \
@@ -8799,5 +8799,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -8821,5 +8821,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                      IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -8843,5 +8843,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -9185,5 +9185,5 @@
         /* register access */
         uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_STORE_GREG_U8_CONST(IEM_GET_MODRM_RM(pVCpu, bRm), u8Imm);
@@ -9194,5 +9194,5 @@
     {
         /* memory access. */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1);
@@ -9222,5 +9222,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 0, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9231,5 +9231,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9240,5 +9240,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -9257,5 +9257,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 2);
@@ -9268,5 +9268,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
@@ -9279,5 +9279,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 4);
@@ -9481,5 +9481,5 @@
         { \
             /* register */ \
-            IEM_MC_BEGIN(3, 0, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,             0); \
@@ -9495,5 +9495,5 @@
         { \
             /* memory */ \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,             0); \
             IEM_MC_ARG_CONST(uint8_t,   cShiftArg,/*=*/1,   1); \
@@ -9617,5 +9617,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 0, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint16_t *,      pu16Dst,           0); \
@@ -9630,5 +9630,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,           0); \
@@ -9644,5 +9644,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,           0); \
@@ -9665,5 +9665,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *,      pu16Dst,            0); \
                     IEM_MC_ARG_CONST(uint8_t,   cShiftArg,/*=1*/1,  1); \
@@ -9684,5 +9684,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,            0); \
                     IEM_MC_ARG_CONST(uint8_t,   cShiftArg,/*=1*/1,  1); \
@@ -9703,5 +9703,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,            0); \
                     IEM_MC_ARG_CONST(uint8_t,   cShiftArg,/*=1*/1,  1); \
@@ -9845,5 +9845,5 @@
         { \
             /* register */ \
-            IEM_MC_BEGIN(3, 0, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
             IEM_MC_ARG(uint8_t *,   pu8Dst,     0); \
@@ -9860,5 +9860,5 @@
         { \
             /* memory */ \
-            IEM_MC_BEGIN(3, 3, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,   pu8Dst,          0); \
             IEM_MC_ARG(uint8_t,     cShiftArg,       1); \
@@ -9983,5 +9983,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 0, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint8_t,         cShiftArg,  1); \
@@ -10002,5 +10002,5 @@
                     \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,    0); \
@@ -10017,5 +10017,5 @@
                     \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,    0); \
@@ -10039,5 +10039,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *,  pu16Dst,    0); \
                     IEM_MC_ARG(uint8_t,     cShiftArg,  1); \
@@ -10059,5 +10059,5 @@
                     \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *,  pu32Dst,    0); \
                     IEM_MC_ARG(uint8_t,     cShiftArg,  1); \
@@ -10079,5 +10079,5 @@
                     \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *,  pu64Dst,    0); \
                     IEM_MC_ARG(uint8_t,     cShiftArg,  1); \
@@ -10251,5 +10251,5 @@
     IEMOP_HLP_NO_64BIT();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
@@ -10272,5 +10272,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(2, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint8_t,  u8Tmp);
@@ -10285,5 +10285,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint8_t,  u8Tmp);
@@ -10298,5 +10298,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint8_t,  u8Tmp);
@@ -10324,5 +10324,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -10355,5 +10355,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -10386,5 +10386,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpuNoStore_st0_stN_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -10481,5 +10481,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m32r, uint8_t, bRm, PFNIEMAIMPLFPUR32, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -10530,5 +10530,5 @@
     IEMOP_MNEMONIC(fcom_st0_m32r, "fcom st0,m32r");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -10563,5 +10563,5 @@
     IEMOP_MNEMONIC(fcomp_st0_m32r, "fcomp st0,m32r");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -10670,5 +10670,5 @@
     IEMOP_MNEMONIC(fld_m32r, "fld m32r");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -10700,5 +10700,5 @@
 {
     IEMOP_MNEMONIC(fst_m32r, "fst m32r");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -10739,5 +10739,5 @@
 {
     IEMOP_MNEMONIC(fstp_m32r, "fstp m32r");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -10778,5 +10778,5 @@
 {
     IEMOP_MNEMONIC(fldenv, "fldenv m14/28byte");
-    IEM_MC_BEGIN(3, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,                 GCPtrEffSrc,                                    2);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -10798,5 +10798,5 @@
 {
     IEMOP_MNEMONIC(fldcw_m2byte, "fldcw m2byte");
-    IEM_MC_BEGIN(1, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -10819,5 +10819,5 @@
 {
     IEMOP_MNEMONIC(fstenv, "fstenv m14/m28byte");
-    IEM_MC_BEGIN(3, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,                 GCPtrEffDst,                                    2);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -10839,5 +10839,5 @@
 {
     IEMOP_MNEMONIC(fnstcw_m2byte, "fnstcw m2byte");
-    IEM_MC_BEGIN(2, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_LOCAL(uint16_t,              u16Fcw);
@@ -10857,5 +10857,5 @@
 {
     IEMOP_MNEMONIC(fnop, "fnop");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -10876,5 +10876,5 @@
     /** @todo Testcase: Check if this raises \#MF?  Intel mentioned it not. AMD
      *        indicates that it does. */
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,          pr80Value);
@@ -10902,5 +10902,5 @@
     /** @todo Testcase: Check if this raises \#MF?  Intel mentioned it not. AMD
      *        indicates that it does. */
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,          pr80Value1);
@@ -10935,5 +10935,5 @@
     if (!iDstReg)
     {
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_LOCAL_CONST(uint16_t,        u16Fsw, /*=*/ 0);
@@ -10953,5 +10953,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_LOCAL(PCRTFLOAT80U,          pr80Value);
@@ -10982,5 +10982,5 @@
 FNIEMOP_DEF_1(iemOpHlpFpu_st0, PFNIEMAIMPLFPUR80UNARY, pfnAImpl)
 {
-    IEM_MC_BEGIN(2, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -11023,5 +11023,5 @@
 {
     IEMOP_MNEMONIC(ftst_st0, "ftst st0");
-    IEM_MC_BEGIN(2, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -11048,5 +11048,5 @@
 {
     IEMOP_MNEMONIC(fxam_st0, "fxam st0");
-    IEM_MC_BEGIN(2, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -11073,5 +11073,5 @@
 FNIEMOP_DEF_1(iemOpHlpFpuPushConstant, PFNIEMAIMPLFPUR80LDCONST, pfnAImpl)
 {
-    IEM_MC_BEGIN(1, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -11171,5 +11171,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_stN_st0_pop, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -11210,5 +11210,5 @@
 FNIEMOP_DEF_1(iemOpHlpFpuReplace_st0_push, PFNIEMAIMPLFPUR80UNARYTWO, pfnAImpl)
 {
-    IEM_MC_BEGIN(2, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULTTWO,           FpuResTwo);
@@ -11270,5 +11270,5 @@
     /** @todo Testcase: Check whether FOP, FPUIP and FPUCS are affected by
      *        FINCSTP and FDECSTP. */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -11292,5 +11292,5 @@
     /** @todo Testcase: Check whether FOP, FPUIP and FPUCS are affected by
      *        FINCSTP and FDECSTP. */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -11459,5 +11459,5 @@
 {
     IEMOP_MNEMONIC(fcmovb_st0_stN, "fcmovb st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -11485,5 +11485,5 @@
 {
     IEMOP_MNEMONIC(fcmove_st0_stN, "fcmove st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -11511,5 +11511,5 @@
 {
     IEMOP_MNEMONIC(fcmovbe_st0_stN, "fcmovbe st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -11537,5 +11537,5 @@
 {
     IEMOP_MNEMONIC(fcmovu_st0_stN, "fcmovu st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -11567,5 +11567,5 @@
 FNIEMOP_DEF_1(iemOpHlpFpuNoStore_st0_st1_pop_pop, PFNIEMAIMPLFPUR80FSW, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -11607,5 +11607,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m32i, uint8_t, bRm, PFNIEMAIMPLFPUI32, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -11656,5 +11656,5 @@
     IEMOP_MNEMONIC(ficom_st0_m32i, "ficom st0,m32i");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,                  u16Fsw);
@@ -11689,5 +11689,5 @@
     IEMOP_MNEMONIC(ficomp_st0_m32i, "ficomp st0,m32i");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,                  u16Fsw);
@@ -11797,5 +11797,5 @@
     IEMOP_MNEMONIC(fild_m32i, "fild m32i");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -11828,5 +11828,5 @@
 {
     IEMOP_MNEMONIC(fisttp_m32i, "fisttp m32i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -11867,5 +11867,5 @@
 {
     IEMOP_MNEMONIC(fist_m32i, "fist m32i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -11906,5 +11906,5 @@
 {
     IEMOP_MNEMONIC(fistp_m32i, "fistp m32i");
-    IEM_MC_BEGIN(3, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -11946,5 +11946,5 @@
     IEMOP_MNEMONIC(fld_m80r, "fld m80r");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -11977,5 +11977,5 @@
 {
     IEMOP_MNEMONIC(fstp_m80r, "fstp m80r");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12016,5 +12016,5 @@
 {
     IEMOP_MNEMONIC(fcmovnb_st0_stN, "fcmovnb st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -12042,5 +12042,5 @@
 {
     IEMOP_MNEMONIC(fcmovne_st0_stN, "fcmovne st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -12068,5 +12068,5 @@
 {
     IEMOP_MNEMONIC(fcmovnbe_st0_stN, "fcmovnbe st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -12094,5 +12094,5 @@
 {
     IEMOP_MNEMONIC(fcmovnnu_st0_stN, "fcmovnnu st0,stN");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,      pr80ValueN);
@@ -12120,5 +12120,5 @@
 {
     IEMOP_MNEMONIC(fneni, "fneni (8087/ign)");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -12132,5 +12132,5 @@
 {
     IEMOP_MNEMONIC(fndisi, "fndisi (8087/ign)");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -12144,5 +12144,5 @@
 {
     IEMOP_MNEMONIC(fnclex, "fnclex");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -12168,5 +12168,5 @@
 {
     IEMOP_MNEMONIC(fnsetpm, "fnsetpm (80287/ign)");   /* set protected mode on fpu. */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -12181,5 +12181,5 @@
     IEMOP_MNEMONIC(frstpm, "frstpm (80287XL/ign)"); /* reset pm, back to real mode. */
 #if 0 /* #UDs on newer CPUs */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -12275,5 +12275,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_stN_st0, uint8_t, bRm, PFNIEMAIMPLFPUR80, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -12355,5 +12355,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_ST0_m64r, uint8_t, bRm, PFNIEMAIMPLFPUR64, pfnImpl)
 {
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -12403,5 +12403,5 @@
     IEMOP_MNEMONIC(fcom_st0_m64r, "fcom st0,m64r");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -12436,5 +12436,5 @@
     IEMOP_MNEMONIC(fcomp_st0_m64r, "fcomp st0,m64r");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,              u16Fsw);
@@ -12542,5 +12542,5 @@
     IEMOP_MNEMONIC(fld_m64r, "fld m64r");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,          FpuRes);
@@ -12572,5 +12572,5 @@
 {
     IEMOP_MNEMONIC(fisttp_m64i, "fisttp m64i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12611,5 +12611,5 @@
 {
     IEMOP_MNEMONIC(fst_m64r, "fst m64r");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12652,5 +12652,5 @@
 {
     IEMOP_MNEMONIC(fstp_m64r, "fstp m64r");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12691,5 +12691,5 @@
 {
     IEMOP_MNEMONIC(frstor, "frstor m94/108byte");
-    IEM_MC_BEGIN(3, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,                 GCPtrEffSrc,                                    2);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -12711,5 +12711,5 @@
 {
     IEMOP_MNEMONIC(fnsave, "fnsave m94/108byte");
-    IEM_MC_BEGIN(3, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,                 GCPtrEffDst,                                    2);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12731,5 +12731,5 @@
     IEMOP_MNEMONIC(fnstsw_m16, "fnstsw m16");
 
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(uint16_t, u16Tmp);
     IEM_MC_LOCAL(RTGCPTR,  GCPtrEffDst);
@@ -12757,5 +12757,5 @@
     /* Note! C0, C1, C2 and C3 are documented as undefined, we leave the
              unmodified. */
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -12776,5 +12776,5 @@
 {
     IEMOP_MNEMONIC(fst_st0_stN, "fst st0,stN");
-    IEM_MC_BEGIN(0, 2, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(PCRTFLOAT80U,          pr80Value);
@@ -12917,5 +12917,5 @@
 FNIEMOP_DEF_2(iemOpHlpFpu_st0_m16i, uint8_t, bRm, PFNIEMAIMPLFPUI16, pfnAImpl)
 {
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -12966,5 +12966,5 @@
     IEMOP_MNEMONIC(ficom_st0_m16i, "ficom st0,m16i");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,                  u16Fsw);
@@ -12999,5 +12999,5 @@
     IEMOP_MNEMONIC(ficomp_st0_m16i, "ficomp st0,m16i");
 
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(uint16_t,                  u16Fsw);
@@ -13106,5 +13106,5 @@
 {
     IEMOP_MNEMONIC(ffreep_stN, "ffreep stN");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
 
@@ -13126,5 +13126,5 @@
 {
     IEMOP_MNEMONIC(fnstsw_ax, "fnstsw ax");
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_LOCAL(uint16_t, u16Tmp);
@@ -13163,5 +13163,5 @@
     IEMOP_MNEMONIC(fild_m16i, "fild m16i");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -13194,5 +13194,5 @@
 {
     IEMOP_MNEMONIC(fisttp_m16i, "fisttp m16i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -13233,5 +13233,5 @@
 {
     IEMOP_MNEMONIC(fist_m16i, "fist m16i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -13272,5 +13272,5 @@
 {
     IEMOP_MNEMONIC(fistp_m16i, "fistp m16i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -13312,5 +13312,5 @@
     IEMOP_MNEMONIC(fbld_m80d, "fbld m80d");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -13344,5 +13344,5 @@
     IEMOP_MNEMONIC(fild_m64i, "fild m64i");
 
-    IEM_MC_BEGIN(2, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
     IEM_MC_LOCAL(IEMFPURESULT,              FpuRes);
@@ -13375,5 +13375,5 @@
 {
     IEMOP_MNEMONIC(fbstp_m80d, "fbstp m80d");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -13414,5 +13414,5 @@
 {
     IEMOP_MNEMONIC(fistp_m64i, "fistp m64i");
-    IEM_MC_BEGIN(3, 3, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -13504,5 +13504,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
@@ -13517,5 +13517,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
@@ -13530,5 +13530,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {
@@ -13560,5 +13560,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) {
@@ -13573,5 +13573,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) {
@@ -13586,5 +13586,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) {
@@ -13625,5 +13625,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xCX, 0);
@@ -13633,5 +13633,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xCX, 0);
@@ -13641,5 +13641,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xCX, 0);
@@ -13655,5 +13655,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_CX_IS_NOT_ONE() {
@@ -13668,5 +13668,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_ECX_IS_NOT_ONE() {
@@ -13681,5 +13681,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_RCX_IS_NOT_ONE() {
@@ -13710,5 +13710,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_CX_IS_NZ() {
@@ -13721,5 +13721,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_ECX_IS_NZ() {
@@ -13732,5 +13732,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_IF_RCX_IS_NZ() {
@@ -13850,5 +13850,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -13859,5 +13859,5 @@
         case IEMMODE_64BIT:
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -13903,5 +13903,5 @@
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm);
@@ -14052,5 +14052,5 @@
 {
     IEMOP_MNEMONIC(cmc, "cmc");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_FLIP_EFL_BIT(X86_EFL_CF);
@@ -14067,5 +14067,5 @@
     { \
         /* register access */ \
-        IEM_MC_BEGIN(2, 0, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING(); \
         IEM_MC_ARG(uint8_t *,   pu8Dst, 0); \
@@ -14082,5 +14082,5 @@
         if (!(pVCpu->iem.s.fPrefixes & IEM_OP_PRF_LOCK) || (pVCpu->iem.s.fExec & IEM_F_X86_DISREGARD_LOCK)) \
         { \
-            IEM_MC_BEGIN(2, 2, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,          0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14100,5 +14100,5 @@
         else \
         { \
-            IEM_MC_BEGIN(2, 2, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint8_t *,       pu8Dst,          0); \
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14132,5 +14132,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(2, 0, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,  pu16Dst, 0); \
@@ -14144,5 +14144,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,  pu32Dst, 0); \
@@ -14157,5 +14157,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,  pu64Dst, 0); \
@@ -14181,5 +14181,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(2, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *,      pu16Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14199,5 +14199,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(2, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14217,5 +14217,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(2, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14245,5 +14245,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(2, 3, 0, 0); \
+                    IEM_MC_BEGIN(0, 0); \
                     IEM_MC_ARG(uint16_t *,      pu16Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14263,5 +14263,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(2, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_ARG(uint32_t *,      pu32Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14281,5 +14281,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(2, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_ARG(uint64_t *,      pu64Dst,         0); \
                     IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst); \
@@ -14325,5 +14325,5 @@
     { \
         /* register access */ \
-        IEM_MC_BEGIN(3, 1, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
         IEM_MC_ARG(uint16_t *,      pu16AX,     0); \
@@ -14347,5 +14347,5 @@
     { \
         /* memory access. */ \
-        IEM_MC_BEGIN(3, 2, 0, 0); \
+        IEM_MC_BEGIN(0, 0); \
         IEM_MC_ARG(uint16_t *,      pu16AX,     0); \
         IEM_MC_ARG(uint8_t,         u8Value,    1); \
@@ -14379,5 +14379,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 1, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,      pu16AX,     0); \
@@ -14402,5 +14402,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32AX,     0); \
@@ -14427,5 +14427,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64AX,     0); \
@@ -14458,5 +14458,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 2, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEM_MC_ARG(uint16_t *,      pu16AX,     0); \
                 IEM_MC_ARG(uint16_t *,      pu16DX,     1); \
@@ -14483,5 +14483,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 2, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_ARG(uint32_t *,      pu32AX,     0); \
                 IEM_MC_ARG(uint32_t *,      pu32DX,     1); \
@@ -14510,5 +14510,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 2, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_ARG(uint64_t *,      pu64AX,     0); \
                 IEM_MC_ARG(uint64_t *,      pu64DX,     1); \
@@ -14758,5 +14758,5 @@
 {
     IEMOP_MNEMONIC(clc, "clc");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_CLEAR_EFL_BIT(X86_EFL_CF);
@@ -14774,5 +14774,5 @@
 {
     IEMOP_MNEMONIC(stc, "stc");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_SET_EFL_BIT(X86_EFL_CF);
@@ -14817,5 +14817,5 @@
 {
     IEMOP_MNEMONIC(cld, "cld");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_CLEAR_EFL_BIT(X86_EFL_DF);
@@ -14833,5 +14833,5 @@
 {
     IEMOP_MNEMONIC(std, "std");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_SET_EFL_BIT(X86_EFL_DF);
@@ -14923,5 +14923,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(1, 0, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint16_t, u16Target, 0);
@@ -14932,5 +14932,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t, u32Target, 0);
@@ -14941,5 +14941,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(1, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint64_t, u64Target, 0);
@@ -14958,5 +14958,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(1, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_ARG(uint16_t,  u16Target, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -14969,5 +14969,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(1, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_ARG(uint32_t,  u32Target, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -14980,5 +14980,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(1, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_ARG(uint64_t,  u64Target, 0);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -15013,5 +15013,5 @@
     { \
         case IEMMODE_16BIT: \
-            IEM_MC_BEGIN(3, 1, 0, 0); \
+            IEM_MC_BEGIN(0, 0); \
             IEM_MC_ARG(uint16_t,        u16Sel,                         0); \
             IEM_MC_ARG(uint16_t,        offSeg,                         1); \
@@ -15029,5 +15029,5 @@
         \
         case IEMMODE_32BIT: \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
             IEM_MC_ARG(uint16_t,        u16Sel,                         0); \
             IEM_MC_ARG(uint32_t,        offSeg,                         1); \
@@ -15046,5 +15046,5 @@
         case IEMMODE_64BIT: \
             Assert(!IEM_IS_GUEST_CPU_AMD(pVCpu)); \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_ARG(uint16_t,        u16Sel,                         0); \
             IEM_MC_ARG(uint64_t,        offSeg,                         1); \
@@ -15091,5 +15091,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Target);
@@ -15100,5 +15100,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Target);
@@ -15109,5 +15109,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Target);
@@ -15126,5 +15126,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_LOCAL(uint16_t, u16Target);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -15137,5 +15137,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Target);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -15148,5 +15148,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Target);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -15192,5 +15192,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint16_t,  u16Src);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -15204,5 +15204,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386 | IEM_MC_F_NOT_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,  u32Src);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -15216,5 +15216,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t,  u64Src);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py	(revision 104018)
@@ -2145,10 +2145,6 @@
         ## kiMacroExp_Entrie, kiMacroExp_Partial).
         self.iMacroExp    = self.kiMacroExp_None;
-        ## IEM_MC_BEGIN: Argument count.
-        self.cArgs        = -1;
         ## IEM_MC_ARG, IEM_MC_ARG_CONST, IEM_MC_ARG_LOCAL_REF, IEM_MC_ARG_LOCAL_EFLAGS.
         self.aoArgs       = []              # type: List[McStmtArg]
-        ## IEM_MC_BEGIN: Locals count.
-        self.cLocals      = -1;
         ## IEM_MC_LOCAL, IEM_MC_LOCAL_CONST, IEM_MC_ARG_LOCAL_EFLAGS.
         self.aoLocals     = []              # type: List[McStmtVar]
@@ -2225,12 +2221,10 @@
     def parseMcBegin(oSelf, sName, asParams):
         """ IEM_MC_BEGIN """
-        oSelf.checkStmtParamCount(sName, asParams, 4);
-        if oSelf.cArgs != -1  or  oSelf.cLocals != -1  or  oSelf.dsMcFlags:
+        oSelf.checkStmtParamCount(sName, asParams, 2);
+        if oSelf.dsMcFlags:
             oSelf.raiseStmtError(sName, 'Used more than once!');
-        oSelf.cArgs   = int(asParams[0]);
-        oSelf.cLocals = int(asParams[1]);
-
-        if asParams[2] != '0':
-            for sFlag in asParams[2].split('|'):
+
+        if asParams[0] != '0':
+            for sFlag in asParams[0].split('|'):
                 sFlag = sFlag.strip();
                 if sFlag not in g_kdMcFlags:
@@ -2240,6 +2234,6 @@
                     oSelf.dsMcFlags[sFlag2] = True;
 
-        if asParams[3] != '0':
-            oSelf.parseCImplFlags(sName, asParams[3]);
+        if asParams[1] != '0':
+            oSelf.parseCImplFlags(sName, asParams[1]);
 
         return McBlock.parseMcGeneric(oSelf, sName, asParams);
@@ -5599,5 +5593,5 @@
             self.raiseError('%s w/o current function (%s)' % (sStmt, sCode,));
         if self.oCurMcBlock:
-            self.raiseError('%s inside IEM_MC_BEGIN blocki starting at line %u' % (sStmt, self.oCurMcBlock.iBeginLine,));
+            self.raiseError('%s inside IEM_MC_BEGIN block starting at line %u' % (sStmt, self.oCurMcBlock.iBeginLine,));
 
         # Figure out the indent level the block starts at, adjusting for expanded multiline macros.
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f38.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f38.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f38.cpp.h	(revision 104018)
@@ -49,5 +49,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -70,5 +70,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -111,5 +111,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -128,5 +128,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -167,5 +167,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -184,5 +184,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -226,5 +226,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -243,5 +243,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -282,5 +282,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -299,5 +299,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -342,5 +342,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fAesNi);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -359,5 +359,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -402,5 +402,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -419,5 +419,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -690,5 +690,5 @@
          * Register, register. \
          */ \
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); \
         IEM_MC_ARG(PRTUINT128U,  puDst,  0); \
@@ -712,5 +712,5 @@
          * Register, memory. \
          */ \
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc); \
         IEM_MC_LOCAL(RTUINT128U,                uSrc); \
@@ -793,5 +793,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_ARG(PCRTUINT128U,                puSrc1,  0);
@@ -812,5 +812,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PCRTUINT128U,                puSrc1,        0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc2);
@@ -914,5 +914,5 @@
          * Register, register. \
          */ \
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); \
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0); \
@@ -934,5 +934,5 @@
          * Register, memory. \
          */ \
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc); \
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0); \
@@ -1047,5 +1047,5 @@
     {
         /* Register, memory. */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1325,5 +1325,5 @@
         if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInveptDesc,                        1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInveptDesc, bRm, 0);
@@ -1340,5 +1340,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInveptDesc,                        1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInveptDesc, bRm, 0);
@@ -1374,5 +1374,5 @@
         if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInvvpidDesc,                       1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInvvpidDesc, bRm, 0);
@@ -1389,5 +1389,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInvvpidDesc,                       1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInvvpidDesc, bRm, 0);
@@ -1421,5 +1421,5 @@
         if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInvpcidDesc,                       1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInvpcidDesc, bRm, 0);
@@ -1433,5 +1433,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrInvpcidDesc,                       1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrInvpcidDesc, bRm, 0);
@@ -1579,5 +1579,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha);
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
@@ -1599,5 +1599,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1744,5 +1744,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
                 IEM_MC_LOCAL(uint16_t,  uSrc);
                 IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -1760,5 +1760,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t,  uSrc);
                 IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -1776,5 +1776,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t,  uSrc);
                 IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -1818,5 +1818,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint32_t *,          puDst, 0);
@@ -1834,5 +1834,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint32_t *,          puDst, 0);
         IEM_MC_ARG(uint8_t,             uSrc,  1);
@@ -1869,5 +1869,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
                 IEM_MC_LOCAL(uint16_t, u16Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -1882,5 +1882,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -1895,5 +1895,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -1937,5 +1937,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
@@ -1951,5 +1951,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
@@ -1965,5 +1965,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
@@ -1989,5 +1989,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
                 IEM_MC_ARG(uint16_t,            uSrc,  1);
@@ -2008,5 +2008,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
                 IEM_MC_ARG(uint32_t,            uSrc,  1);
@@ -2027,5 +2027,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(2, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_ARG(uint32_t *,          puDst, 0);
                 IEM_MC_ARG(uint64_t,            uSrc,  1);
@@ -2083,5 +2083,5 @@
             if (IEM_IS_MODRM_REG_MODE(bRm)) \
             { \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0); \
@@ -2098,5 +2098,5 @@
             else \
             { \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0); \
                 IEM_MC_ARG(uint64_t,        u64Src,                 1); \
@@ -2118,5 +2118,5 @@
             if (IEM_IS_MODRM_REG_MODE(bRm)) \
             { \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0); \
@@ -2133,5 +2133,5 @@
             else \
             { \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0); \
                 IEM_MC_ARG(uint32_t,        u32Src,                 1); \
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f3a.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f3a.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f3a.cpp.h	(revision 104018)
@@ -52,5 +52,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
@@ -70,5 +70,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -111,5 +111,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
@@ -129,5 +129,5 @@
          * XMM, [mem128], imm8.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -171,5 +171,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
@@ -196,5 +196,5 @@
          * XMM, [mem128], imm8.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -242,5 +242,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fAesNi);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
@@ -260,5 +260,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -322,5 +322,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
@@ -346,5 +346,5 @@
          * XMM32, [mem32].
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -386,5 +386,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
@@ -410,5 +410,5 @@
          * XMM64, [mem64], imm8.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -478,5 +478,5 @@
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -499,5 +499,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,                0);
         IEM_MC_ARG(uint64_t,                    uSrc,                1);
@@ -550,5 +550,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(uint8_t,   uValue);
@@ -565,5 +565,5 @@
          * [mem8], XMM.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint8_t,   uValue);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -594,5 +594,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(uint16_t,  uValue);
@@ -609,5 +609,5 @@
          * [mem16], XMM.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint16_t,  uValue);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -645,5 +645,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
             IEM_MC_LOCAL(uint64_t,  uSrc);
@@ -660,5 +660,5 @@
              * [mem64], XMM.
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t,  uSrc);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -692,5 +692,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
             IEM_MC_LOCAL(uint32_t,  uSrc);
@@ -707,5 +707,5 @@
              * [mem32], XMM.
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,  uSrc);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -736,5 +736,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(uint32_t,  uSrc);
@@ -751,5 +751,5 @@
          * [mem32], XMM.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t,  uSrc);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -789,5 +789,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_LOCAL(uint8_t,   uSrc);
@@ -804,5 +804,5 @@
          * XMM, [mem8].
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint8_t,   uSrc);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -832,5 +832,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -850,5 +850,5 @@
          * XMM, [mem32].
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
@@ -886,5 +886,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
             IEM_MC_LOCAL(uint64_t,  uSrc);
@@ -901,5 +901,5 @@
              * XMM, [mem64].
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t,  uSrc);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -933,5 +933,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41);
             IEM_MC_LOCAL(uint32_t,  uSrc);
@@ -948,5 +948,5 @@
              * XMM, [mem32].
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,  uSrc);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -1042,5 +1042,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fPclMul);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
@@ -1063,5 +1063,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1139,5 +1139,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
             IEM_MC_ARG(PRTUINT128U,                puDst,             0);
@@ -1163,5 +1163,5 @@
              * Register, memory.
              */
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
             IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1197,5 +1197,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
             IEM_MC_ARG(PRTUINT128U,                puDst,             0);
@@ -1221,5 +1221,5 @@
              * Register, memory.
              */
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(PRTUINT128U,                 puDst,             0);
             IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1269,5 +1269,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
             IEM_MC_ARG(uint32_t *,                 pu32Ecx,             0);
@@ -1295,5 +1295,5 @@
              * Register, memory.
              */
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
             IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1331,5 +1331,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
             IEM_MC_ARG(uint32_t *,                 pu32Ecx,             0);
@@ -1357,5 +1357,5 @@
              * Register, memory.
              */
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
             IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1405,5 +1405,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
         IEM_MC_ARG(PRTUINT128U,                puDst,             0);
@@ -1429,5 +1429,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1473,5 +1473,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse42);
         IEM_MC_ARG(uint32_t *,                 pu32Ecx,             0);
@@ -1499,5 +1499,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
         IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
@@ -1570,5 +1570,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSha);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
@@ -1591,5 +1591,5 @@
          * XMM, [mem128], imm8.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,               0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h	(revision 104018)
@@ -50,5 +50,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -71,5 +71,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -112,5 +112,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -133,5 +133,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -172,5 +172,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -193,5 +193,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -235,5 +235,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -256,5 +256,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -295,5 +295,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint64_t *,          pDst, 0);
@@ -316,5 +316,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -357,5 +357,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_ARG(PRTUINT128U,          pDst, 0);
@@ -374,5 +374,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -412,5 +412,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(PRTUINT128U,          pDst, 0);
@@ -429,5 +429,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -470,5 +470,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(PRTUINT128U,          pDst, 0);
@@ -487,5 +487,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -523,5 +523,5 @@
          * MMX, MMX.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -544,5 +544,5 @@
          * MMX, [mem32].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  puDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -585,5 +585,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_ARG(PRTUINT128U,             puDst, 0);
@@ -602,5 +602,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,             puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
@@ -645,5 +645,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(PRTUINT128U,             puDst, 0);
@@ -662,5 +662,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,             puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
@@ -705,5 +705,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -726,5 +726,5 @@
          * MMX, [mem64].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,                  puDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -767,5 +767,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_ARG(PRTUINT128U,             puDst, 0);
@@ -784,5 +784,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -827,5 +827,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
@@ -849,5 +849,5 @@
          * XMM128, [mem128].
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
         IEM_MC_LOCAL(X86XMMREG,             uSrc2);
@@ -891,5 +891,5 @@
          * XMM128, XMM32.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
@@ -913,5 +913,5 @@
          * XMM128, [mem32].
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
         IEM_MC_LOCAL(RTFLOAT32U,            r32Src2);
@@ -955,5 +955,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
@@ -977,5 +977,5 @@
          * XMM128, [mem128].
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
         IEM_MC_LOCAL(X86XMMREG,             uSrc2);
@@ -1019,5 +1019,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
@@ -1041,5 +1041,5 @@
          * XMM, [mem64].
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
         IEM_MC_LOCAL(RTFLOAT64U,            r64Src2);
@@ -1083,5 +1083,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(PRTUINT128U,             puDst, 0);
@@ -1100,5 +1100,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1143,5 +1143,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse3);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
@@ -1165,5 +1165,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMSSERESULT,          SseRes);
         IEM_MC_LOCAL(X86XMMREG,             uSrc2);
@@ -1205,5 +1205,5 @@
 
     /* Ignore operand size here, memory refs are always 16-bit. */
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -1231,5 +1231,5 @@
 
     /* Ignore operand size here, memory refs are always 16-bit. */
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -1250,5 +1250,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEMOP_HLP_DECODED_NL_1(OP_LLDT, IEMOPFORM_M_REG, OP_PARM_Ew, DISOPTYPE_DANGEROUS);
         IEM_MC_ARG(uint16_t, u16Sel, 0);
@@ -1259,5 +1259,5 @@
     else
     {
-        IEM_MC_BEGIN(1, 1, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEM_MC_ARG(uint16_t, u16Sel, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -1281,5 +1281,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint16_t, u16Sel, 0);
@@ -1290,5 +1290,5 @@
     else
     {
-        IEM_MC_BEGIN(1, 1, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEM_MC_ARG(uint16_t, u16Sel, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
@@ -1310,5 +1310,5 @@
         if (IEM_IS_MODRM_REG_MODE(bRm)) \
         { \
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0); \
             IEMOP_HLP_DECODED_NL_1(fWrite ? OP_VERW : OP_VERR, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP); \
             IEM_MC_ARG(uint16_t,    u16Sel,            0); \
@@ -1320,5 +1320,5 @@
         else \
         { \
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_286, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0); \
             IEM_MC_ARG(uint16_t,    u16Sel,            0); \
             IEM_MC_ARG_CONST(bool,  fWriteArg, fWrite, 1); \
@@ -1384,5 +1384,5 @@
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_64BIT_OP_SIZE();
-    IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_286, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1475,5 +1475,5 @@
     IEMOP_HLP_MIN_286();
     IEMOP_HLP_64BIT_OP_SIZE();
-    IEM_MC_BEGIN(2, 1, IEM_MC_F_MIN_286, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1508,5 +1508,5 @@
     IEMOP_MNEMONIC(lgdt, "lgdt");
     IEMOP_HLP_64BIT_OP_SIZE();
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                                    1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1563,5 +1563,5 @@
     IEMOP_MNEMONIC(lidt, "lidt");
     IEMMODE enmEffOpSize = IEM_IS_64BIT_CODE(pVCpu) ? IEMMODE_64BIT : pVCpu->iem.s.enmEffOpSize;
-    IEM_MC_BEGIN(3, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                                    1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1695,5 +1695,5 @@
 
     /* Ignore operand size here, memory refs are always 16-bit. */
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -1714,5 +1714,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint16_t, u16Tmp,                         0);
@@ -1725,5 +1725,5 @@
     else
     {
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_286, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_286, 0);
         IEM_MC_ARG(uint16_t, u16Tmp,      0);
         IEM_MC_ARG(RTGCPTR,  GCPtrEffDst, 1);
@@ -1743,5 +1743,5 @@
     IEMOP_MNEMONIC(invlpg, "invlpg");
     IEMOP_HLP_MIN_486();
-    IEM_MC_BEGIN(1, 1, IEM_MC_F_MIN_386, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
     IEM_MC_ARG(RTGCPTR, GCPtrEffDst, 0);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -1871,5 +1871,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(3, 0, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEMOP_HLP_DECODED_NL_2(fIsLar ? OP_LAR : OP_LSL, IEMOPFORM_RM_REG, OP_PARM_Gv, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP);
                 IEM_MC_ARG(uint16_t *,  pu16Dst,           0);
@@ -1887,5 +1887,5 @@
             case IEMMODE_32BIT:
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DECODED_NL_2(fIsLar ? OP_LAR : OP_LSL, IEMOPFORM_RM_REG, OP_PARM_Gv, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP);
                 IEM_MC_ARG(uint64_t *,  pu64Dst,           0);
@@ -1909,5 +1909,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(3, 1, 0, 0);
+                IEM_MC_BEGIN(0, 0);
                 IEM_MC_ARG(uint16_t *,  pu16Dst,           0);
                 IEM_MC_ARG(uint16_t,    u16Sel,            1);
@@ -1928,5 +1928,5 @@
             case IEMMODE_32BIT:
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_ARG(uint64_t *,  pu64Dst,           0);
                 IEM_MC_ARG(uint16_t,    u16Sel,            1);
@@ -2064,5 +2064,5 @@
     }
 
-    IEM_MC_BEGIN(0, 1, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -2080,5 +2080,5 @@
     IEMOP_MNEMONIC(femms, "femms");
 
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -2129,5 +2129,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -2143,5 +2143,5 @@
          * XMM128, [mem128].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2180,5 +2180,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -2194,5 +2194,5 @@
          * XMM128, [mem128].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2230,5 +2230,5 @@
          * XMM32, XMM32.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
@@ -2247,5 +2247,5 @@
          * XMM128, [mem32].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2283,5 +2283,5 @@
          * XMM64, XMM64.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2300,5 +2300,5 @@
          * XMM128, [mem64].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2336,5 +2336,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -2350,5 +2350,5 @@
          * [mem128], XMM128.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2386,5 +2386,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -2400,5 +2400,5 @@
          * [mem128], XMM128.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2436,5 +2436,5 @@
          * XMM32, XMM32.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
@@ -2453,5 +2453,5 @@
          * [mem32], XMM32.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2489,5 +2489,5 @@
          * XMM64, XMM64.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2506,5 +2506,5 @@
          * [mem64], XMM64.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2541,5 +2541,5 @@
         IEMOP_MNEMONIC2(RM_REG, MOVHLPS, movhlps, Vq_WO, UqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2569,5 +2569,5 @@
         IEMOP_MNEMONIC2(RM_MEM, MOVLPS, movlps, Vq_WO, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2604,5 +2604,5 @@
         IEMOP_MNEMONIC2(RM_MEM, MOVLPD, movlpd, Vq_WO, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2653,5 +2653,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse3);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -2674,5 +2674,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2713,5 +2713,5 @@
          * XMM128, XMM64.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse3);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2732,5 +2732,5 @@
          * XMM128, [mem64].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2768,5 +2768,5 @@
         IEMOP_MNEMONIC2(MR_MEM, MOVLPS, movlps, Mq_WO, Vq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2816,5 +2816,5 @@
         IEMOP_MNEMONIC2(MR_MEM, MOVLPD, movlpd, Mq_WO, Vq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2961,5 +2961,5 @@
         IEMOP_MNEMONIC2(RM_REG, MOVLHPS, movlhps, VqHi_WO, Uq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -2989,5 +2989,5 @@
         IEMOP_MNEMONIC2(RM_MEM, MOVHPS, movhps, VqHi_WO, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3024,5 +3024,5 @@
         IEMOP_MNEMONIC2(RM_MEM, MOVHPD, movhpd, VqHi_WO, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3073,5 +3073,5 @@
          * XMM128, XMM128.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse3);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -3094,5 +3094,5 @@
          * XMM128, [mem128].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3143,5 +3143,5 @@
         IEMOP_MNEMONIC2(MR_MEM, MOVHPS, movhps, Mq_WO, VqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3191,5 +3191,5 @@
         IEMOP_MNEMONIC2(MR_MEM, MOVHPD, movhpd, Mq_WO, VqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES);
 
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3263,5 +3263,5 @@
         }
 
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -3284,5 +3284,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ADVANCE_RIP_AND_FINISH();
@@ -3291,5 +3291,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -3453,5 +3453,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -3467,5 +3467,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3502,5 +3502,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -3516,5 +3516,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3554,5 +3554,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -3568,5 +3568,5 @@
          * Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3603,5 +3603,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -3617,5 +3617,5 @@
          * Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -3648,5 +3648,5 @@
          * XMM, MMX
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -3678,5 +3678,5 @@
          * XMM, [mem64]
          */
-        IEM_MC_BEGIN(3, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(X86XMMREG,             Dst);
@@ -3718,5 +3718,5 @@
          * XMM, MMX
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -3747,5 +3747,5 @@
          * XMM, [mem64]
          */
-        IEM_MC_BEGIN(3, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(X86XMMREG,             Dst);
@@ -3788,5 +3788,5 @@
         {
             /* XMM, greg64 */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,    fMxcsr);
             IEM_MC_LOCAL(RTFLOAT32U,  r32Dst);
@@ -3814,5 +3814,5 @@
         {
             /* XMM, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
@@ -3846,5 +3846,5 @@
         {
             /* greg, XMM */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
             IEM_MC_LOCAL(RTFLOAT32U, r32Dst);
@@ -3872,5 +3872,5 @@
         {
             /* greg, [mem32] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
@@ -3913,5 +3913,5 @@
         {
             /* XMM, greg64 */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,    fMxcsr);
             IEM_MC_LOCAL(RTFLOAT64U,  r64Dst);
@@ -3939,5 +3939,5 @@
         {
             /* XMM, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
@@ -3971,5 +3971,5 @@
         {
             /* XMM, greg32 */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
             IEM_MC_LOCAL(RTFLOAT64U, r64Dst);
@@ -3997,5 +3997,5 @@
         {
             /* XMM, [mem32] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,   fMxcsr);
@@ -4046,5 +4046,5 @@
          * memory, register.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -4085,5 +4085,5 @@
          * memory, register.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -4118,5 +4118,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -4146,5 +4146,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(uint64_t,              u64Dst);
@@ -4185,5 +4185,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -4213,5 +4213,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(uint64_t,              u64Dst);
@@ -4255,5 +4255,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int64_t,   i64Dst);
@@ -4281,5 +4281,5 @@
         {
             /* greg64, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4313,5 +4313,5 @@
         {
             /* greg, XMM */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int32_t,   i32Dst);
@@ -4339,5 +4339,5 @@
         {
             /* greg, [mem] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4380,5 +4380,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int64_t,   i64Dst);
@@ -4406,5 +4406,5 @@
         {
             /* greg64, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4438,5 +4438,5 @@
         {
             /* greg, XMM */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int32_t,   i32Dst);
@@ -4464,5 +4464,5 @@
         {
             /* greg32, [mem32] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4504,5 +4504,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -4533,5 +4533,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(uint64_t,              u64Dst);
@@ -4572,5 +4572,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
@@ -4601,5 +4601,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint32_t *,              pfMxcsr,            0);
         IEM_MC_LOCAL(uint64_t,              u64Dst);
@@ -4643,5 +4643,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int64_t,   i64Dst);
@@ -4669,5 +4669,5 @@
         {
             /* greg64, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4701,5 +4701,5 @@
         {
             /* greg, XMM */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int32_t,   i32Dst);
@@ -4727,5 +4727,5 @@
         {
             /* greg, [mem] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4768,5 +4768,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int64_t,   i64Dst);
@@ -4794,5 +4794,5 @@
         {
             /* greg64, [mem64] */
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4826,5 +4826,5 @@
         {
             /* greg32, XMM */
-            IEM_MC_BEGIN(3, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
             IEM_MC_LOCAL(int32_t,   i32Dst);
@@ -4852,5 +4852,5 @@
         {
             /* greg32, [mem64] */
-            IEM_MC_BEGIN(3, 4, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t,  fMxcsr);
@@ -4897,5 +4897,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -4925,5 +4925,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -4971,5 +4971,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -4999,5 +4999,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -5049,5 +5049,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -5077,5 +5077,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -5123,5 +5123,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -5151,5 +5151,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -5295,5 +5295,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(0, 1, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_LOCAL(uint16_t, u16Tmp); \
@@ -5307,5 +5307,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_LOCAL(uint32_t, u32Tmp); \
@@ -5321,5 +5321,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_LOCAL(uint64_t, u64Tmp); \
@@ -5340,5 +5340,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(0, 2, 0, 0); \
+                IEM_MC_BEGIN(0, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc); \
                 IEM_MC_LOCAL(uint16_t, u16Tmp); \
@@ -5354,5 +5354,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc); \
                 IEM_MC_LOCAL(uint32_t, u32Tmp); \
@@ -5370,5 +5370,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc); \
                 IEM_MC_LOCAL(uint64_t, u64Tmp); \
@@ -5576,5 +5576,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
         IEM_MC_LOCAL(uint8_t,           u8Dst);
@@ -5605,5 +5605,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint8_t,           u8Dst);
@@ -6323,5 +6323,5 @@
         {
             /* MMX, greg64 */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -6340,5 +6340,5 @@
         {
             /* MMX, [mem64] */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -6375,5 +6375,5 @@
         {
             /* MMX, greg32 */
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -6392,5 +6392,5 @@
         {
             /* MMX, [mem32] */
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -6430,5 +6430,5 @@
         {
             /* XMM, greg64 */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -6446,5 +6446,5 @@
         {
             /* XMM, [mem64] */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -6480,5 +6480,5 @@
         {
             /* XMM, greg32 */
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -6496,5 +6496,5 @@
         {
             /* XMM, [mem32] */
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -6535,5 +6535,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -6554,5 +6554,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t, u64Tmp);
         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
@@ -6591,5 +6591,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
 
@@ -6607,5 +6607,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -6642,5 +6642,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -6656,5 +6656,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -6683,5 +6683,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
@@ -6706,5 +6706,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(uint64_t *,                  pDst,       0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -6749,5 +6749,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -6768,5 +6768,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_ARG(PRTUINT128U,                 puDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -6834,5 +6834,5 @@
          * Register, immediate.
          */
-        IEM_MC_BEGIN(2, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
@@ -6880,5 +6880,5 @@
          * Register, immediate.
          */
-        IEM_MC_BEGIN(2, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -7195,5 +7195,5 @@
 {
     IEMOP_MNEMONIC(emms, "emms");
-    IEM_MC_BEGIN(0, 0, 0, 0);
+    IEM_MC_BEGIN(0, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE();
@@ -7226,5 +7226,5 @@
         if (enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES();
             IEM_MC_ARG(uint64_t *, pu64Dst, 0);
@@ -7239,5 +7239,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES();
             IEM_MC_ARG(uint64_t *, pu64Dst, 0);
@@ -7258,5 +7258,5 @@
         if (enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrVal,                                         1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0);
@@ -7271,5 +7271,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrVal,                                         1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0);
@@ -7310,5 +7310,5 @@
         if (enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES();
             IEM_MC_ARG(uint64_t, u64Val, 0);
@@ -7321,5 +7321,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_SIZE_OP_REPZ_OR_REPNZ_PREFIXES();
             IEM_MC_ARG(uint32_t, u32Val, 0);
@@ -7338,5 +7338,5 @@
         if (enmEffOpSize == IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrVal,                                         1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0);
@@ -7351,5 +7351,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_ARG(RTGCPTR,         GCPtrVal,                                         1);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrVal, bRm, 0);
@@ -7445,5 +7445,5 @@
         {
             /* greg64, MMX */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7462,5 +7462,5 @@
         {
             /* [mem64], MMX */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7497,5 +7497,5 @@
         {
             /* greg32, MMX */
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7514,5 +7514,5 @@
         {
             /* [mem32], MMX */
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7553,5 +7553,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7569,5 +7569,5 @@
         {
             /* [mem64], XMM */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7603,5 +7603,5 @@
         {
             /* greg32, XMM */
-            IEM_MC_BEGIN(0, 1, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7619,5 +7619,5 @@
         {
             /* [mem32], XMM */
-            IEM_MC_BEGIN(0, 2, 0, 0);
+            IEM_MC_BEGIN(0, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -7655,5 +7655,5 @@
          * XMM128, XMM64.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -7673,5 +7673,5 @@
          * XMM128, [mem64].
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -7705,5 +7705,5 @@
         /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */
         /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */
-        IEM_MC_BEGIN(0, 1, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);
         IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -7723,5 +7723,5 @@
          * [mem64], MMX.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(uint64_t, u64Tmp);
         IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
@@ -7751,5 +7751,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -7765,5 +7765,5 @@
          * [mem128], XMM.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -7792,5 +7792,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(0, 0, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
@@ -7806,5 +7806,5 @@
          * [mem128], XMM.
          */
-        IEM_MC_BEGIN(0, 2, 0, 0);
+        IEM_MC_BEGIN(0, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -7837,5 +7837,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7849,5 +7849,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7873,5 +7873,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7885,5 +7885,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7909,5 +7909,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7921,5 +7921,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7945,5 +7945,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7957,5 +7957,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7981,5 +7981,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -7993,5 +7993,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8017,5 +8017,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8029,5 +8029,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8053,5 +8053,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8065,5 +8065,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8089,5 +8089,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8101,5 +8101,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8125,5 +8125,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8137,5 +8137,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8161,5 +8161,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8173,5 +8173,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8197,5 +8197,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8209,5 +8209,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8233,5 +8233,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8245,5 +8245,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8269,5 +8269,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8281,5 +8281,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8305,5 +8305,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8317,5 +8317,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8341,5 +8341,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8353,5 +8353,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8377,5 +8377,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_16BIT)
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int16_t i16Imm; IEM_OPCODE_GET_NEXT_S16(&i16Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8389,5 +8389,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         int32_t i32Imm; IEM_OPCODE_GET_NEXT_S32(&i32Imm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
@@ -8418,5 +8418,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
@@ -8431,5 +8431,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8462,5 +8462,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
@@ -8475,5 +8475,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8506,5 +8506,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
@@ -8519,5 +8519,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8550,5 +8550,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
@@ -8563,5 +8563,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8594,5 +8594,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
@@ -8607,5 +8607,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8638,5 +8638,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
@@ -8651,5 +8651,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8682,5 +8682,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
@@ -8695,5 +8695,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8726,5 +8726,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
@@ -8739,5 +8739,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8770,5 +8770,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
@@ -8783,5 +8783,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8814,5 +8814,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
@@ -8827,5 +8827,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8858,5 +8858,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
@@ -8871,5 +8871,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8902,5 +8902,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
@@ -8915,5 +8915,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8946,5 +8946,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
@@ -8959,5 +8959,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -8990,5 +8990,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
@@ -9003,5 +9003,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -9034,5 +9034,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
@@ -9047,5 +9047,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -9078,5 +9078,5 @@
     {
         /* register target */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
@@ -9091,5 +9091,5 @@
     {
         /* memory target */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -9163,5 +9163,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                0); \
@@ -9180,5 +9180,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0); \
@@ -9198,5 +9198,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0); \
@@ -9226,5 +9226,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9253,5 +9253,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9280,5 +9280,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 5, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9317,5 +9317,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9344,5 +9344,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9371,5 +9371,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9414,5 +9414,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t const *, pu16Dst,               0); \
@@ -9431,5 +9431,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t const *, pu32Dst,               0); \
@@ -9448,5 +9448,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t const *, pu64Dst,               0); \
@@ -9476,5 +9476,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9503,5 +9503,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -9530,5 +9530,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);  \
@@ -9597,5 +9597,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                0); \
@@ -9614,5 +9614,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0); \
@@ -9632,5 +9632,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0); \
@@ -9656,5 +9656,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -9680,5 +9680,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -9704,5 +9704,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -9747,5 +9747,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                0); \
@@ -9765,5 +9765,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0); \
@@ -9784,5 +9784,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0); \
@@ -9809,5 +9809,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_ARG(uint16_t *,              pu16Dst,                0); \
                 IEM_MC_ARG(uint16_t,                u16Src,                 1); \
@@ -9831,5 +9831,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_ARG(uint32_t *,              pu32Dst,                0); \
                 IEM_MC_ARG(uint32_t,                u32Src,                 1); \
@@ -9853,5 +9853,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(4, 3, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_ARG(uint64_t *,              pu64Dst,                0); \
                 IEM_MC_ARG(uint64_t,                u64Src,                 1); \
@@ -9988,5 +9988,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_PENTIUM_II, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_PENTIUM_II, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                       1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10007,5 +10007,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_PENTIUM_II, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_PENTIUM_II, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                       1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10045,5 +10045,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_PENTIUM_II, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_PENTIUM_II, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10080,5 +10080,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_MIN_PENTIUM_II, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_PENTIUM_II, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10105,5 +10105,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_CORE, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_CORE, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                       1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10131,5 +10131,5 @@
         IEMOP_RAISE_INVALID_OPCODE_RET();
 
-    IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_CORE, 0);
+    IEM_MC_BEGIN(IEM_MC_F_MIN_CORE, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                       1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10160,5 +10160,5 @@
         return FNIEMOP_CALL_1(iemOp_InvalidWithRMAllNeeded, bRm);
 
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10183,5 +10183,5 @@
         return FNIEMOP_CALL_1(iemOp_InvalidWithRMAllNeeded, bRm);
 
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -10198,5 +10198,5 @@
     RT_NOREF_PV(bRm);
     IEMOP_MNEMONIC(lfence, "lfence");
-    IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
 #ifdef RT_ARCH_ARM64
@@ -10218,5 +10218,5 @@
     RT_NOREF_PV(bRm);
     IEMOP_MNEMONIC(mfence, "mfence");
-    IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
 #ifdef RT_ARCH_ARM64
@@ -10238,5 +10238,5 @@
     RT_NOREF_PV(bRm);
     IEMOP_MNEMONIC(sfence, "sfence");
-    IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
 #ifdef RT_ARCH_ARM64
@@ -10259,5 +10259,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10270,5 +10270,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10288,5 +10288,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10299,5 +10299,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10317,5 +10317,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10329,5 +10329,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10347,5 +10347,5 @@
     if (pVCpu->iem.s.enmEffOpSize == IEMMODE_64BIT)
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+        IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10359,5 +10359,5 @@
     else
     {
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fFsGsBase);
         IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT();
@@ -10447,5 +10447,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_486, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint8_t *,       pu8Dst,                 0);
@@ -10466,5 +10466,5 @@
     {
 #define IEMOP_BODY_CMPXCHG_BYTE(a_fnWorker, a_Type) \
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_MIN_486, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
             IEM_MC_LOCAL(RTGCPTR,       GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -10517,5 +10517,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_486, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                0);
@@ -10535,5 +10535,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_MIN_486, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0);
@@ -10559,5 +10559,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(4, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0);
@@ -10586,5 +10586,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(4, 4, IEM_MC_F_MIN_486, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
                     \
                     IEM_MC_LOCAL(uint8_t,       bUnmapInfo); \
@@ -10614,5 +10614,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(4, 4, IEM_MC_F_MIN_486, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -10645,5 +10645,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(4, 4, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -10754,5 +10754,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Value);
@@ -10764,5 +10764,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Value);
@@ -10774,5 +10774,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Value);
@@ -10794,5 +10794,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint16_t, u16Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -10806,5 +10806,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -10818,5 +10818,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -10857,5 +10857,5 @@
         if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Value);
@@ -10867,5 +10867,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Value);
@@ -10883,5 +10883,5 @@
         if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEM_MC_LOCAL(uint32_t, u32Value);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -10895,5 +10895,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t, u64Value);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -10969,5 +10969,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                    0); \
@@ -10984,5 +10984,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                    0); \
@@ -11000,5 +11000,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                    0); \
@@ -11026,5 +11026,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11048,5 +11048,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11070,5 +11070,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11102,5 +11102,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11124,5 +11124,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11146,5 +11146,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11185,5 +11185,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t const *, pu16Dst,                   0); \
@@ -11200,5 +11200,5 @@
             \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t const *, pu32Dst,                   0); \
@@ -11215,5 +11215,5 @@
             \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t const *, pu64Dst,                   0); \
@@ -11241,5 +11241,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11263,5 +11263,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_MIN_386, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11285,5 +11285,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 3, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 1); \
@@ -11428,5 +11428,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
@@ -11444,5 +11444,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
@@ -11462,5 +11462,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); \
                 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
@@ -11488,5 +11488,5 @@
         { \
             case IEMMODE_16BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_ARG(uint16_t *, pu16Dst, 0); \
                 IEM_MC_ARG(uint16_t,   u16Src,  1); \
@@ -11506,5 +11506,5 @@
                 \
             case IEMMODE_32BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_MIN_386, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0); \
                 IEM_MC_ARG(uint32_t *, pu32Dst, 0); \
                 IEM_MC_ARG(uint32_t,   u32Src,  1); \
@@ -11527,5 +11527,5 @@
                 \
             case IEMMODE_64BIT: \
-                IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                 IEM_MC_ARG(uint64_t *, pu64Dst, 0); \
                 IEM_MC_ARG(uint64_t,   u64Src,  1); \
@@ -11676,5 +11676,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint16_t, u16Value);
@@ -11686,5 +11686,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint32_t, u32Value);
@@ -11696,5 +11696,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_LOCAL(uint64_t, u64Value);
@@ -11716,5 +11716,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint16_t, u16Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -11728,5 +11728,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -11740,5 +11740,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -11775,5 +11775,5 @@
         if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint32_t, u32Value);
@@ -11785,5 +11785,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_LOCAL(uint64_t, u64Value);
@@ -11801,5 +11801,5 @@
         if (pVCpu->iem.s.enmEffOpSize != IEMMODE_64BIT)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
             IEM_MC_LOCAL(uint32_t, u32Value);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -11813,5 +11813,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(uint64_t, u64Value);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -11842,5 +11842,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_486, 0);
+        IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG(uint8_t *,  pu8Dst,  0);
@@ -11862,5 +11862,5 @@
          */
 #define IEMOP_BODY_XADD_BYTE(a_fnWorker, a_Type) \
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_486, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
             IEM_MC_LOCAL(RTGCPTR,           GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -11913,5 +11913,5 @@
         {
             case IEMMODE_16BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_486, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint16_t *, pu16Dst,  0);
@@ -11929,5 +11929,5 @@
 
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_MIN_486, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint32_t *, pu32Dst,  0);
@@ -11947,5 +11947,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
                 IEM_MC_ARG(uint64_t *, pu64Dst,  0);
@@ -11975,5 +11975,5 @@
             { \
                 case IEMMODE_16BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_486, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -11999,5 +11999,5 @@
                 \
                 case IEMMODE_32BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_MIN_486, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -12023,5 +12023,5 @@
                 \
                 case IEMMODE_64BIT: \
-                    IEM_MC_BEGIN(3, 4, IEM_MC_F_64BIT, 0); \
+                    IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
                     IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
                     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -12073,5 +12073,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
@@ -12101,5 +12101,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -12142,5 +12142,5 @@
          * XMM, XMM.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12170,5 +12170,5 @@
          * XMM, [mem128].
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -12211,5 +12211,5 @@
          * XMM32, XMM32.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12239,5 +12239,5 @@
          * XMM32, [mem32].
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -12281,5 +12281,5 @@
          * XMM64, XMM64.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12309,5 +12309,5 @@
          * XMM64, [mem64].
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(IEMMEDIAF2XMMSRC,              Src);
         IEM_MC_LOCAL(X86XMMREG,                     Dst);
@@ -12353,5 +12353,5 @@
         {
             case IEMMODE_32BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_MIN_386, 0);
+                IEM_MC_BEGIN(IEM_MC_F_MIN_386, 0);
                 IEM_MC_LOCAL(uint32_t, u32Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -12367,5 +12367,5 @@
 
             case IEMMODE_64BIT:
-                IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+                IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
                 IEM_MC_LOCAL(uint64_t, u64Value);
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
@@ -12407,5 +12407,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
@@ -12428,5 +12428,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(uint64_t *,    pu64Dst,               0);
         IEM_MC_ARG(uint16_t,      u16Src,                1);
@@ -12462,5 +12462,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12481,5 +12481,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,   puDst,                 0);
         IEM_MC_ARG(uint16_t,      u16Src,                1);
@@ -12516,5 +12516,5 @@
          * Greg32, MMX, imm8.
          */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
@@ -12544,5 +12544,5 @@
          * Greg32, XMM, imm8.
          */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12575,5 +12575,5 @@
          * XMM, XMM, imm8.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse);
@@ -12594,5 +12594,5 @@
          * XMM, [mem128], imm8.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -12627,5 +12627,5 @@
          * XMM, XMM, imm8.
          */
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
@@ -12646,5 +12646,5 @@
          * XMM, [mem128], imm8.
          */
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -12684,5 +12684,5 @@
     IEMOP_MNEMONIC(cmpxchg8b, "cmpxchg8b Mq");
 #define IEMOP_BODY_CMPXCHG8B(a_fnWorker, a_Type) \
-        IEM_MC_BEGIN(4, 5, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -12741,5 +12741,5 @@
          */
 #define BODY_CMPXCHG16B_HEAD(bUnmapInfoStmt, a_Type) \
-            IEM_MC_BEGIN(5, 4, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffDst); \
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0); \
@@ -12867,5 +12867,5 @@
     if (IEM_IS_MODRM_REG_MODE(bRm))
     {
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG_CONST(uint8_t, iReg,        /*=*/ IEM_GET_MODRM_RM(pVCpu, bRm), 0);
@@ -12888,5 +12888,5 @@
     IEMOP_HLP_IN_VMX_OPERATION("vmptrld", kVmxVDiag_Vmptrld);
     IEMOP_HLP_VMX_INSTR("vmptrld", kVmxVDiag_Vmptrld);
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -12907,5 +12907,5 @@
     IEMOP_HLP_IN_VMX_OPERATION("vmclear", kVmxVDiag_Vmclear);
     IEMOP_HLP_VMX_INSTR("vmclear", kVmxVDiag_Vmclear);
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12925,5 +12925,5 @@
     IEMOP_MNEMONIC(vmxon, "vmxon");
     IEMOP_HLP_VMX_INSTR("vmxon", kVmxVDiag_Vmxon);
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -12944,5 +12944,5 @@
     IEMOP_HLP_IN_VMX_OPERATION("vmptrst", kVmxVDiag_Vmptrst);
     IEMOP_HLP_VMX_INSTR("vmptrst", kVmxVDiag_Vmptrst);
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEffDst,                            1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm, 0);
@@ -12965,5 +12965,5 @@
     {
         /* register destination. */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
         IEM_MC_ARG_CONST(uint8_t, iReg,        /*=*/ IEM_GET_MODRM_RM(pVCpu, bRm), 0);
@@ -13035,5 +13035,5 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_486, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_ARG(uint32_t *,  pu32Dst, 0);
@@ -13045,5 +13045,5 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(1, 0, IEM_MC_F_MIN_486, 0);
+            IEM_MC_BEGIN(IEM_MC_F_MIN_486, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_ARG(uint32_t *,  pu32Dst, 0);
@@ -13056,5 +13056,5 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(1, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
             IEM_MC_ARG(uint64_t *,  pu64Dst, 0);
@@ -13281,5 +13281,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -13299,5 +13299,5 @@
          * Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -13335,5 +13335,5 @@
          */
         IEMOP_MNEMONIC2(RM_REG, MOVQ2DQ, movq2dq, VqZx_WO, Nq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -13387,5 +13387,5 @@
          */
         IEMOP_MNEMONIC2(RM_REG, MOVDQ2Q, movdq2q, Pq_WO, Uq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -13426,5 +13426,5 @@
         /* Note! Taking the lazy approch here wrt the high 32-bits of the GREG. */
         IEMOP_MNEMONIC2(RM_REG, PMOVMSKB, pmovmskb, Gd, Nq, DISOPTYPE_X86_MMX | DISOPTYPE_HARMLESS, 0);
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);
         IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -13455,5 +13455,5 @@
         /* Note! Taking the lazy approch here wrt the high 32-bits of the GREG. */
         IEMOP_MNEMONIC2(RM_REG, PMOVMSKB, pmovmskb, Gd, Ux, DISOPTYPE_X86_SSE | DISOPTYPE_HARMLESS, 0);
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
         IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -13784,5 +13784,5 @@
     {
         /* Register, memory. */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -13831,5 +13831,5 @@
     {
         /* Register, memory. */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -14042,5 +14042,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h	(revision 104018)
@@ -51,5 +51,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -71,5 +71,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_IMPLICIT_AVX_AIMPL_ARGS();
@@ -95,5 +95,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
@@ -120,5 +120,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc2);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -165,5 +165,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -184,5 +184,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_ARG(PRTUINT128U,          puDst,  0);
@@ -207,5 +207,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
@@ -231,5 +231,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc2);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -307,5 +307,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -323,5 +323,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_ARG(PRTUINT128U,          puDst,  0);
@@ -344,5 +344,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(2, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
@@ -365,5 +365,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -432,5 +432,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -450,5 +450,5 @@
          * 128-bit: Register, Memory
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -470,5 +470,5 @@
          * 256-bit: Register, Memory
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -507,5 +507,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -525,5 +525,5 @@
          * 128-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -545,5 +545,5 @@
          * 256-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -583,5 +583,5 @@
          */
         IEMOP_MNEMONIC3(VEX_RVM_REG, VMOVSS, vmovss, Vss_WO, HssHi, Uss, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -608,5 +608,5 @@
          */
         IEMOP_MNEMONIC2(VEX_RM_MEM, VMOVSS, vmovss, VssZx_WO, Md, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -646,5 +646,5 @@
          */
         IEMOP_MNEMONIC3(VEX_RVM_REG, VMOVSD, vmovsd, Vsd_WO, HsdHi, Usd, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
 
@@ -672,5 +672,5 @@
          */
         IEMOP_MNEMONIC2(VEX_RM_MEM, VMOVSD, vmovsd, VsdZx_WO, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -709,5 +709,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -727,5 +727,5 @@
          * 128-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -747,5 +747,5 @@
          * 256-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -784,5 +784,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -802,5 +802,5 @@
          * 128-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -822,5 +822,5 @@
          * 256-bit: Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -859,5 +859,5 @@
          */
         IEMOP_MNEMONIC3(VEX_MVR_REG, VMOVSS, vmovss, Uss_WO, HssHi, Vss, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
 
@@ -885,5 +885,5 @@
          */
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVSS, vmovss, Md_WO, Vss, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -923,5 +923,5 @@
          */
         IEMOP_MNEMONIC3(VEX_MVR_REG, VMOVSD, vmovsd, Usd_WO, HsdHi, Vsd, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
 
@@ -949,5 +949,5 @@
          */
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVSD, vmovsd, Mq_WO, Vsd, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_IGNORED);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -986,5 +986,5 @@
          */
         IEMOP_MNEMONIC3(VEX_RVM_REG, VMOVHLPS, vmovhlps, Vq_WO, HqHi, UqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fAvx);
 
@@ -1016,5 +1016,5 @@
         IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVLPS, vmovlps, Vq_WO, HqHi, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1055,5 +1055,5 @@
         IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVLPD, vmovlpd, Vq_WO, HqHi, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1112,5 +1112,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1131,5 +1131,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_IMPLICIT_AVX_AIMPL_ARGS();
@@ -1152,5 +1152,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1173,5 +1173,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1217,5 +1217,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -1234,5 +1234,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_IMPLICIT_AVX_AIMPL_ARGS();
@@ -1255,5 +1255,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t,                  uSrc);
@@ -1274,5 +1274,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1313,5 +1313,5 @@
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVLPS, vmovlps, Mq_WO, Vq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1360,5 +1360,5 @@
     {
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVLPD, vmovlpd, Mq_WO, Vq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1452,5 +1452,5 @@
         IEMOP_MNEMONIC3(VEX_RVM_REG, VMOVLHPS, vmovlhps, Vq_WO, Hq, Uq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fAvx);
 
@@ -1478,5 +1478,5 @@
         IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVHPS, vmovhps, Vq_WO, Hq, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1513,5 +1513,5 @@
         IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVHPD, vmovhpd, Vq_WO, Hq, Mq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1566,5 +1566,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(RTUINT128U,                  uSrc);
@@ -1585,5 +1585,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_IMPLICIT_AVX_AIMPL_ARGS();
@@ -1606,5 +1606,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1627,5 +1627,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1667,5 +1667,5 @@
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVHPS, vmovhps, Mq_WO, VqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1713,5 +1713,5 @@
         IEMOP_MNEMONIC2(VEX_MR_MEM, VMOVHPD, vmovhpd, Mq_WO, VqHi, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
 
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1786,5 +1786,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -1807,5 +1807,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1824,5 +1824,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
@@ -1863,5 +1863,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -1884,5 +1884,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1901,5 +1901,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
@@ -1959,5 +1959,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -1980,5 +1980,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -1997,5 +1997,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
@@ -2035,5 +2035,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(1, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -2056,5 +2056,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -2073,5 +2073,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
@@ -2144,5 +2144,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2161,5 +2161,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2205,5 +2205,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2222,5 +2222,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -2294,5 +2294,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -2323,5 +2323,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -2370,5 +2370,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -2399,5 +2399,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -2449,5 +2449,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -2478,5 +2478,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -2525,5 +2525,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
         IEM_MC_LOCAL(uint32_t, fEFlags);
@@ -2554,5 +2554,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint32_t, fEFlags);
         IEM_MC_ARG(uint32_t *,                  pfMxcsr,            0);
@@ -2635,5 +2635,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_LOCAL(uint8_t,           u8Dst);
@@ -2651,5 +2651,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(uint8_t,               u8Dst);
@@ -2686,5 +2686,5 @@
         if (pVCpu->iem.s.uVexLength == 0)
         {
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_LOCAL(uint8_t,           u8Dst);
@@ -2702,5 +2702,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(uint8_t,               u8Dst);
@@ -3044,5 +3044,5 @@
 //         * Register, register.
 //         */
-//        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+//        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
 //        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2);
 //        IEM_MC_ARG(PRTUINT128U,          pDst, 0);
@@ -3061,5 +3061,5 @@
 //         * Register, memory.
 //         */
-//        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+//        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
 //        IEM_MC_ARG(PRTUINT128U,                 pDst,       0);
 //        IEM_MC_LOCAL(RTUINT128U,                uSrc);
@@ -3194,5 +3194,5 @@
         {
             /* XMM, greg64 */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -3210,5 +3210,5 @@
         {
             /* XMM, [mem64] */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -3244,5 +3244,5 @@
         {
             /* XMM, greg32 */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -3260,5 +3260,5 @@
         {
             /* XMM, [mem32] */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -3303,5 +3303,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -3322,5 +3322,5 @@
          * Register, memory128.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -3342,5 +3342,5 @@
          * Register, memory256.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U, u256Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -3378,5 +3378,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -3397,5 +3397,5 @@
          * Register, memory128.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -3417,5 +3417,5 @@
          * Register, memory256.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U, u256Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -3456,5 +3456,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -3473,5 +3473,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_ARG(PRTUINT128U,             puDst,                 0);
@@ -3495,5 +3495,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
@@ -3518,5 +3518,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,            uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -3587,5 +3587,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
         IEM_MC_ARG(PRTUINT128U,             puDst,                 0);
@@ -3614,5 +3614,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
         IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -3928,5 +3928,5 @@
          */
         IEMOP_MNEMONIC(vzeroupper, "vzeroupper");
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
 
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
@@ -3964,5 +3964,5 @@
          */
         IEMOP_MNEMONIC(vzeroall, "vzeroall");
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
 
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
@@ -4058,5 +4058,5 @@
         {
             /* greg64, XMM */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -4074,5 +4074,5 @@
         {
             /* [mem64], XMM */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint64_t, u64Tmp);
@@ -4108,5 +4108,5 @@
         {
             /* greg32, XMM */
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -4124,5 +4124,5 @@
         {
             /* [mem32], XMM */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
             IEM_MC_LOCAL(uint32_t, u32Tmp);
@@ -4161,5 +4161,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
 
@@ -4177,5 +4177,5 @@
          * Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -4218,5 +4218,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -4237,5 +4237,5 @@
          * Register, memory128.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -4257,5 +4257,5 @@
          * Register, memory256.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U, u256Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -4294,5 +4294,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
 
@@ -4313,5 +4313,5 @@
          * Register, memory128.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -4333,5 +4333,5 @@
          * Register, memory256.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U, u256Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -4427,5 +4427,5 @@
 //{
 //    IEMOP_MNEMONIC1(M_MEM, VLDMXCSR, vldmxcsr, MdRO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
-//    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+//    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
 //    IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                1);
 //    IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -4480,5 +4480,5 @@
 {
     IEMOP_MNEMONIC1(VEX_M_MEM, VSTMXCSR, vstmxcsr, Md_WO, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_L_ZERO);
-    IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+    IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
     IEM_MC_ARG(RTGCPTR,         GCPtrEff,                               1);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm, 0);
@@ -4592,5 +4592,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fAvx);
@@ -4615,5 +4615,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTGCPTR,     GCPtrEffSrc);
         IEM_MC_ARG(PRTUINT128U,   puDst,                 0);
@@ -4658,5 +4658,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fAvx);
         IEM_MC_LOCAL(uint16_t,  uValue);
@@ -4688,5 +4688,5 @@
         { \
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); \
             IEM_MC_LOCAL(RTUINT256U,            uDst); \
@@ -4710,5 +4710,5 @@
         { \
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); \
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \
             IEM_MC_ARG(PRTUINT128U,          puDst,                 0); \
@@ -4735,5 +4735,5 @@
         if (pVCpu->iem.s.uVexLength) \
         { \
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_LOCAL(RTUINT256U,            uDst); \
             IEM_MC_LOCAL(RTUINT256U,            uSrc1); \
@@ -4759,5 +4759,5 @@
         else \
         { \
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_LOCAL(RTUINT128U,                uSrc2); \
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc); \
@@ -4911,5 +4911,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
 
@@ -4927,5 +4927,5 @@
          * Memory, register.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,                  uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -4961,5 +4961,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -4977,5 +4977,5 @@
         else
         {
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_ARG(uint64_t *,              puDst, 0);
@@ -5235,5 +5235,5 @@
              * 128-bit: Memory, register.
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -5255,5 +5255,5 @@
              * 256-bit: Memory, register.
              */
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -5433,5 +5433,5 @@
          * Register, memory128.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U, u128Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
@@ -5453,5 +5453,5 @@
          * Register, memory256.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U, u256Tmp);
         IEM_MC_LOCAL(RTGCPTR,    GCPtrEffSrc);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h	(revision 104018)
@@ -246,5 +246,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
@@ -265,5 +265,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_ARG(PCRTUINT128U,            puSrc1,  0);
@@ -287,5 +287,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
             IEM_MC_LOCAL(RTUINT256U,            uSrc2);
@@ -311,5 +311,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,            uSrc2);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -350,5 +350,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_LOCAL(uint32_t,              uSrc);
@@ -365,5 +365,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_LOCAL(uint32_t,              uSrc);
@@ -385,5 +385,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -402,5 +402,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -436,5 +436,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_LOCAL(uint64_t,              uSrc);
@@ -451,5 +451,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2);
             IEM_MC_LOCAL(uint64_t,              uSrc);
@@ -469,5 +469,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint64_t,              uSrc);
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -507,5 +507,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -576,5 +576,5 @@
         if (pVCpu->iem.s.uVexLength) \
         { \
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx2); \
             IEM_MC_LOCAL(RTUINT256U,            uDst); \
@@ -593,5 +593,5 @@
         else \
         { \
-            IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx); \
             IEM_MC_ARG(PRTUINT128U,             puDst,  0); \
@@ -616,5 +616,5 @@
         if (pVCpu->iem.s.uVexLength) \
         { \
-            IEM_MC_BEGIN(2, 3, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_LOCAL(RTUINT256U,            uDst); \
             IEM_MC_LOCAL(RTUINT128U,            uSrc); \
@@ -636,5 +636,5 @@
         else \
         { \
-            IEM_MC_BEGIN(2, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc); \
             IEM_MC_ARG(PRTUINT128U,                 puDst,       0); \
@@ -753,5 +753,5 @@
             IEMOP_MNEMONIC2EX(vmovntdqa_Vdq_WO_Mdq_L0, "vmovntdqa, Vdq_WO, Mdq", VEX_RM_MEM, VMOVNTDQA, vmovntdqa, Vx_WO, Mx,
                               DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES);
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -784,5 +784,5 @@
             IEMOP_MNEMONIC2EX(vmovntdqa_Vqq_WO_Mqq_L1, "vmovntdqa, Vqq_WO,Mqq", VEX_RM_MEM, VMOVNTDQA, vmovntdqa, Vx_WO, Mx,
                               DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES);
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,                uSrc);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -993,5 +993,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(2, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fAvx);
         IEM_MC_ARG(PRTUINT128U,          puDst,  0);
@@ -1012,5 +1012,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(2, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -1116,5 +1116,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
 
@@ -1131,5 +1131,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
 
@@ -1151,5 +1151,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1168,5 +1168,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1199,5 +1199,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,              uSrc);
 
@@ -1214,5 +1214,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,              uSrc);
 
@@ -1234,5 +1234,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1251,5 +1251,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1287,5 +1287,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1350,5 +1350,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint8_t,               uSrc);
 
@@ -1365,5 +1365,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint8_t,               uSrc);
 
@@ -1385,5 +1385,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint8_t,               uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1402,5 +1402,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint8_t,               uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1433,5 +1433,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint16_t,              uSrc);
 
@@ -1448,5 +1448,5 @@
         else
         {
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint16_t,              uSrc);
 
@@ -1468,5 +1468,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint16_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1485,5 +1485,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint16_t,              uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -1718,5 +1718,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1);
             IEM_MC_ARG(uint64_t *,          pDst,    0);
@@ -1735,5 +1735,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1);
             IEM_MC_ARG(uint32_t *,          pDst,    0);
@@ -1759,5 +1759,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(uint64_t *,          pDst,    0);
             IEM_MC_ARG(uint64_t,            uSrc1,   1);
@@ -1778,5 +1778,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(uint32_t *,          pDst,    0);
             IEM_MC_ARG(uint32_t,            uSrc1,   1);
@@ -1819,5 +1819,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
@@ -1834,5 +1834,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi1); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
@@ -1856,5 +1856,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
             IEM_MC_ARG(uint64_t,            uSrc,    1); \
@@ -1873,5 +1873,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
             IEM_MC_ARG(uint32_t,            uSrc,    1); \
@@ -1982,5 +1982,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
@@ -2000,5 +2000,5 @@
         else \
         { \
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
@@ -2025,5 +2025,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
             IEM_MC_ARG(uint64_t,            uSrc1,   1); \
@@ -2045,5 +2045,5 @@
         else \
         { \
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
             IEM_MC_ARG(uint32_t,            uSrc1,   1); \
@@ -2077,5 +2077,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
@@ -2092,5 +2092,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
@@ -2114,5 +2114,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
             IEM_MC_ARG(uint64_t,            uSrc1,   1); \
@@ -2131,5 +2131,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
             IEM_MC_ARG(uint32_t,            uSrc1,   1); \
@@ -2176,5 +2176,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
@@ -2192,5 +2192,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(a_fFeatureMember); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
@@ -2215,5 +2215,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W) \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0); \
             IEM_MC_ARG(uint64_t *,          pDst,    0); \
             IEM_MC_ARG(uint64_t,            uSrc1,   1); \
@@ -2233,5 +2233,5 @@
         else \
         { \
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
             IEM_MC_ARG(uint32_t *,          pDst,    0); \
             IEM_MC_ARG(uint32_t,            uSrc1,   1); \
@@ -2291,5 +2291,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi2);
             IEM_MC_ARG(uint64_t *,          pDst1,   0);
@@ -2308,5 +2308,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fBmi2);
             IEM_MC_ARG(uint32_t *,          pDst1,   0);
@@ -2333,5 +2333,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(uint64_t *,          pDst1,   0);
             IEM_MC_ARG(uint64_t *,          pDst2,   1);
@@ -2352,5 +2352,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(uint32_t *,          pDst1,   0);
             IEM_MC_ARG(uint32_t *,          pDst2,   1);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h	(revision 104018)
@@ -53,5 +53,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2);
@@ -75,5 +75,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
@@ -100,5 +100,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
@@ -126,5 +126,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc2);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -173,5 +173,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -190,5 +190,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_NO_VVVV_EX(fAvx);
             IEM_MC_ARG(PRTUINT128U,             puDst,                0);
@@ -212,5 +212,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(3, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc);
@@ -235,5 +235,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,            uSrc);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -280,5 +280,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
@@ -300,5 +300,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
             IEM_MC_ARG(PRTUINT128U,          puDst,  0);
@@ -324,5 +324,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT256U,            uDst);
             IEM_MC_LOCAL(RTUINT256U,            uSrc1);
@@ -350,5 +350,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTUINT128U,                uSrc2);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -426,5 +426,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L1_EX(fAvx2);
@@ -451,5 +451,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uDst);
         IEM_MC_LOCAL(RTUINT256U,                uSrc1);
@@ -550,5 +550,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fAvx);
         IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -567,5 +567,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -596,5 +596,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint16_t,  uValue);
 
@@ -614,5 +614,5 @@
          */
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(uint16_t,  uValue);
         IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -644,5 +644,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,  uValue);
 
@@ -662,5 +662,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint64_t,  uValue);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -689,5 +689,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,  uValue);
 
@@ -707,5 +707,5 @@
              */
             uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
-            IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(uint32_t,  uValue);
             IEM_MC_LOCAL(RTGCPTR,   GCPtrEffSrc);
@@ -739,5 +739,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L1_EX(fAvx2);
@@ -759,5 +759,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -831,5 +831,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(0, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L1_EX(fAvx2);
@@ -851,5 +851,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(0, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,            uSrc);
         IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
@@ -909,5 +909,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L0_EX(fPclMul);
@@ -932,5 +932,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT128U,                uSrc2);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
@@ -972,5 +972,5 @@
          * Register, register.
          */
-        IEM_MC_BEGIN(4, 3, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
         IEMOP_HLP_DONE_VEX_DECODING_L1_EX(fAvx2);
@@ -997,5 +997,5 @@
          * Register, memory.
          */
-        IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+        IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
         IEM_MC_LOCAL(RTUINT256U,                uDst);
         IEM_MC_LOCAL(RTUINT256U,                uSrc1);
@@ -1051,5 +1051,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_W0_EX(fAvx);
             IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -1073,5 +1073,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_W0_EX(fAvx);
             IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -1098,5 +1098,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 5, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1126,5 +1126,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1193,5 +1193,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 4, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_W0_EX(fAvx2);
             IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -1221,5 +1221,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_W0_EX(fAvx);
             IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
@@ -1246,5 +1246,5 @@
         if (pVCpu->iem.s.uVexLength)
         {
-            IEM_MC_BEGIN(4, 5, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
 
@@ -1279,5 +1279,5 @@
         else
         {
-            IEM_MC_BEGIN(4, 2, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
@@ -1458,5 +1458,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fBmi2);
             IEM_MC_ARG(uint64_t *,          pDst,    0);
@@ -1471,5 +1471,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 0, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEMOP_HLP_DONE_VEX_DECODING_L0_AND_NO_VVVV_EX(fBmi2);
             IEM_MC_ARG(uint32_t *,          pDst,    0);
@@ -1491,5 +1491,5 @@
         if (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_SIZE_REX_W)
         {
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_64BIT, 0);
+            IEM_MC_BEGIN(IEM_MC_F_64BIT, 0);
             IEM_MC_ARG(uint64_t *,          pDst,    0);
             IEM_MC_ARG(uint64_t,            uSrc1,   1);
@@ -1507,5 +1507,5 @@
         else
         {
-            IEM_MC_BEGIN(3, 1, IEM_MC_F_NOT_286_OR_OLDER, 0);
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
             IEM_MC_ARG(uint32_t *,          pDst,    0);
             IEM_MC_ARG(uint32_t,            uSrc1,   1);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp	(revision 104018)
@@ -52,5 +52,5 @@
  */
 #ifndef IEMLIVENESS_EXTENDED_LAYOUT
-# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
+# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
     { \
         /* Define local variables that we use to accumulate the liveness state changes in. */ \
@@ -60,5 +60,5 @@
         bool            fDoneXpctOrCall = false
 #else
-# define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
+# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
     { \
         /* Define local variables that we use to accumulate the liveness state changes in. */ \
Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py	(revision 104018)
@@ -499,19 +499,23 @@
         #
         iConvArgToLocal = 0;
-        cStmts = len(aoStmts);
-        iStmt  = 0;
+        oNewBeginExStmt = None;
+        cStmts          = len(aoStmts);
+        iStmt           = 0;
         while iStmt < cStmts:
             oStmt = aoStmts[iStmt];
             if oStmt.sName == 'IEM_MC_BEGIN':
+                oNewStmt = copy.deepcopy(oStmt);
+                oNewStmt.sName = 'IEM_MC_BEGIN_EX';
                 fWithoutFlags = (    self.oVariation.isWithFlagsCheckingAndClearingVariation()
                                  and self.oVariation.oParent.hasWithFlagsCheckingAndClearingVariation());
                 if fWithoutFlags or self.oVariation.oParent.dsCImplFlags:
-                    oNewStmt = copy.deepcopy(oStmt);
                     if fWithoutFlags:
-                        oNewStmt.asParams[2] = ' | '.join(sorted(  list(self.oVariation.oParent.oMcBlock.dsMcFlags.keys())
+                        oNewStmt.asParams[0] = ' | '.join(sorted(  list(self.oVariation.oParent.oMcBlock.dsMcFlags.keys())
                                                                  + ['IEM_MC_F_WITHOUT_FLAGS',] ));
                     if self.oVariation.oParent.dsCImplFlags:
-                        oNewStmt.asParams[3] = ' | '.join(sorted(self.oVariation.oParent.dsCImplFlags.keys()));
-                    aoStmts[iStmt] = oNewStmt;
+                        oNewStmt.asParams[1] = ' | '.join(sorted(self.oVariation.oParent.dsCImplFlags.keys()));
+                oNewStmt.asParams.append('%s' % (len(self.oVariation.oParent.oMcBlock.aoArgs),));
+                aoStmts[iStmt]  = oNewStmt;
+                oNewBeginExStmt = oNewStmt;
             elif isinstance(oStmt, iai.McStmtNativeIf):
                 if self.kdOptionArchToVal[self.sHostArch] in oStmt.asArchitectures:
@@ -526,4 +530,6 @@
 
             iStmt += 1;
+        if iConvArgToLocal > 0:
+            oNewBeginExStmt.asParams[2] = '0';
 
         #
Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 104018)
@@ -133,8 +133,9 @@
 
 /*********************************************************************************************************************************
-*   Emitters for IEM_MC_BEGIN and IEM_MC_END.                                                                                    *
+*   Emitters for IEM_MC_BEGIN_EX and IEM_MC_END.                                                                                    *
 *********************************************************************************************************************************/
 
-#define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
+#undef  IEM_MC_BEGIN /* unused */
+#define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
     { \
         Assert(pReNative->Core.bmVars     == 0); \
Index: trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py	(revision 104018)
@@ -2471,5 +2471,5 @@
             #print('oNewStmt %s %s' % (oNewStmt.sName, len(oNewStmt.asParams),));
             if oNewStmt.sName == 'IEM_MC_BEGIN' and self.dsCImplFlags:
-                oNewStmt.asParams[3] = ' | '.join(sorted(self.dsCImplFlags.keys()));
+                oNewStmt.asParams[1] = ' | '.join(sorted(self.dsCImplFlags.keys()));
 
             # If we haven't emitted the threaded function call yet, look for
@@ -2663,14 +2663,14 @@
         cbMaxVarsAndArgs = 0;
         for oThreadedFunction in self.aoThreadedFuncs:
-            if oThreadedFunction.oMcBlock.cLocals >= 0:
+            if oThreadedFunction.oMcBlock.aoLocals or oThreadedFunction.oMcBlock.aoArgs:
                 # Counts.
-                assert oThreadedFunction.oMcBlock.cArgs >= 0;
-                cMaxVars        = max(cMaxVars, oThreadedFunction.oMcBlock.cLocals);
-                cMaxArgs        = max(cMaxArgs, oThreadedFunction.oMcBlock.cArgs);
-                cMaxVarsAndArgs = max(cMaxVarsAndArgs, oThreadedFunction.oMcBlock.cLocals + oThreadedFunction.oMcBlock.cArgs);
+                cMaxVars        = max(cMaxVars, len(oThreadedFunction.oMcBlock.aoLocals));
+                cMaxArgs        = max(cMaxArgs, len(oThreadedFunction.oMcBlock.aoArgs));
+                cMaxVarsAndArgs = max(cMaxVarsAndArgs,
+                                      len(oThreadedFunction.oMcBlock.aoLocals) + len(oThreadedFunction.oMcBlock.aoArgs));
                 if cMaxVarsAndArgs > 9:
                     raise Exception('%s potentially uses too many variables / args: %u, max 10 - %u vars and %u args'
                                     % (oThreadedFunction.oMcBlock.oFunction.sName, cMaxVarsAndArgs,
-                                       oThreadedFunction.oMcBlock.cLocals, oThreadedFunction.oMcBlock.cArgs));
+                                       len(oThreadedFunction.oMcBlock.aoLocals), len(oThreadedFunction.oMcBlock.aoArgs),));
                 # Calc stack allocation size:
                 cbArgs = 0;
Index: trunk/src/VBox/VMM/VMMAll/IEMAllThrdTables.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllThrdTables.h	(revision 104017)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllThrdTables.h	(revision 104018)
@@ -119,5 +119,5 @@
  */
 #undef IEM_MC_BEGIN
-#define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
+#define IEM_MC_BEGIN(a_fMcFlags, a_fCImplFlags) \
     { \
         pVCpu->iem.s.fTbCurInstr = (a_fCImplFlags) /*| ((a_fMcFlags) << 20*/
Index: trunk/src/VBox/VMM/include/IEMMc.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMMc.h	(revision 104017)
+++ trunk/src/VBox/VMM/include/IEMMc.h	(revision 104018)
@@ -41,6 +41,6 @@
  */
 
-#define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) {
-#define IEM_MC_END()                                                }
+#define IEM_MC_BEGIN(a_fMcFlags, a_fCImplFlags) {
+#define IEM_MC_END()                            }
 
 /** Internal macro. */
Index: trunk/src/VBox/VMM/include/IEMN8veRecompiler.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMN8veRecompiler.h	(revision 104017)
+++ trunk/src/VBox/VMM/include/IEMN8veRecompiler.h	(revision 104018)
@@ -1337,5 +1337,5 @@
     uint8_t                     cCondDepth;
 
-    /** The argument count + hidden regs from the IEM_MC_BEGIN statement. */
+    /** The argument count + hidden regs from the IEM_MC_BEGIN_EX statement. */
     uint8_t                     cArgs;
     /** The IEM_CIMPL_F_XXX flags from the IEM_MC_BEGIN statement. */
Index: trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
===================================================================
--- trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp	(revision 104017)
+++ trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp	(revision 104018)
@@ -566,10 +566,7 @@
 
 #define IEM_ARG_CHECK_CALLBACK(a_idx, a_User) int RT_CONCAT(iArgCheck_,a_idx); NOREF(RT_CONCAT(iArgCheck_,a_idx))
-#define IEM_MC_BEGIN(a_cArgs, a_cLocals, a_fMcFlags, a_fCImplFlags) \
+#define IEM_MC_BEGIN(a_fMcFlags, a_fCImplFlags) \
     { \
-        const uint8_t  cArgs    = (a_cArgs); NOREF(cArgs); \
-        const uint8_t  cLocals  = (a_cLocals); NOREF(cLocals); \
-        const uint32_t fMcBegin = (((a_cArgs) + (a_cLocals)) << 23) + (a_fMcFlags) + (a_fCImplFlags); \
-        IEM_REPEAT(a_cArgs, IEM_ARG_CHECK, 0); \
+        const uint32_t fMcBegin = ((a_fMcFlags) + (a_fCImplFlags))
 
 #define IEM_MC_END() \
@@ -636,14 +633,12 @@
 
 #define IEM_MC_ARG(a_Type, a_Name, a_iArg) (void)fMcBegin; \
-    RT_CONCAT(iArgCheck_,a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
+    int RT_CONCAT(iArgCheck_,a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
     int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); \
-    AssertCompile((a_iArg) < cArgs); \
     int RT_CONCAT(iVarCheck_,a_Name) = 0; \
     a_Type a_Name; \
     NOREF(a_Name)
 #define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) (void)fMcBegin; \
-    RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
+    int RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
     int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); \
-    AssertCompile((a_iArg) < cArgs); \
     int RT_CONCAT(iVarCheck_,a_Name) = 0; \
     a_Type const a_Name = (a_Value); \
@@ -653,14 +648,12 @@
 
 #define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) (void)fMcBegin; \
-    RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
+    int RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
     int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); \
-    AssertCompile((a_iArg) < cArgs); \
     int RT_CONCAT(iVarCheck_,a_Name) = 0; \
     a_Type const a_Name = &(a_Local); \
     NOREF(a_Name)
 #define IEM_MC_ARG_LOCAL_EFLAGS(a_pName, a_Name, a_iArg) (void)fMcBegin; \
-    RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
+    int RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
     int RT_CONCAT3(iArgCheck_,a_iArg,a_pName); \
-    AssertCompile((a_iArg) < cArgs); \
     int RT_CONCAT(iVarCheck_,a_Name) = 0; \
     int RT_CONCAT(iVarCheck_,a_pName) = 0; \
