VirtualBox

Changeset 104048 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Mar 25, 2024 6:50:09 PM (11 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
162439
Message:

VMM/IEM: Mark the SIMD register as dirty based on the load size in iemNativeSimdRegAllocTmpForGuestSimdReg() so it doesn't need to be done in each native emitter, add some additional debug info about dirty SIMD registers, bugref:10614

Location:
trunk/src/VBox/VMM/VMMAll
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

    r104047 r104048  
    73887388
    73897389        off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
    7390         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXRegDst);
    7391         /* We don't need to write everything back here as the destination is marked as dirty and will be flushed automatically. */
    73927390
    73937391        /* Free but don't flush the source and destination register. */
    … …  
    75507548
    75517549    off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
    7552     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    75537550
    75547551    /* Free but don't flush the source register. */
    … …  
    75767573
    75777574    off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, iQWord);
    7578     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    75797575
    75807576    /* Free but don't flush the source register. */
    … …  
    76027598
    76037599    off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, iDWord);
    7604     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    76057600
    76067601    /* Free but don't flush the source register. */
    … …  
    76307625    off = iemNativeEmitSimdZeroVecRegLowU128(pReNative, off, idxSimdRegDst);
    76317626    off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0);
    7632     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    76337627
    76347628    /* Free but don't flush the source register. */
    … …  
    76587652    off = iemNativeEmitSimdZeroVecRegLowU128(pReNative, off, idxSimdRegDst);
    76597653    off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, 0);
    7660     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    76617654
    76627655    /* Free but don't flush the source register. */
    … …  
    76857678    off = iemNativeEmitSimdLoadGprFromVecRegU32(pReNative, off, IEMNATIVE_REG_FIXED_TMP0, idxVarReg, iDwSrc);
    76867679    off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative,  off, idxSimdRegDst, IEMNATIVE_REG_FIXED_TMP0, iDwDst);
    7687     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    76887680
    76897681    /* Free but don't flush the destination register. */
    … …  
    77177709        off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
    77187710        off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    7719         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
    7720         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    77217711
    77227712        /* Free but don't flush the source and destination register. */
    … …  
    77317721
    77327722        off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
    7733         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    77347723
    77357724        /* Free but don't flush the destination register. */
    … …  
    77637752
    77647753        off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
    7765         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
    7766         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    77677754
    77687755        /* Free but don't flush the source and destination register. */
    … …  
    78777864
    78787865    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
    7879     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    78807866
    78817867    /* Free but don't flush the register. */
    … …  
    79067892
    79077893    if (iDQword == 0)
    7908     {
    79097894        off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
    7910         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    7911     }
    79127895    else
    7913     {
    79147896        off = iemNativeEmitSimdLoadVecRegHighU128FromVecRegLowU128(pReNative, off, idxSimdRegDst, idxVarReg);
    7915         IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    7916     }
    79177897
    79187898    /* Free but don't flush the source register. */
    … …  
    79417921    off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
    79427922    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    7943     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    7944     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    79457923
    79467924    /* Free but don't flush the source register. */
    … …  
    79697947    off = iemNativeEmitSimdBroadcastGprToVecRegU8(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
    79707948    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    7971     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    7972     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
    79737949
    79747950    iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
    … …  
    79967972    off = iemNativeEmitSimdBroadcastGprToVecRegU16(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
    79977973    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    7998     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    7999     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
    80007974
    80017975    /* Free but don't flush the source register. */
    … …  
    80247998    off = iemNativeEmitSimdBroadcastGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
    80257999    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    8026     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    8027     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
    80288000
    80298001    /* Free but don't flush the source register. */
    … …  
    80528024    off = iemNativeEmitSimdBroadcastGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
    80538025    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    8054     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    8055     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
    80568026
    80578027    /* Free but don't flush the source register. */
    … …  
    80798049
    80808050    off = iemNativeEmitSimdBroadcastGprToVecRegU8(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
    8081     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8082     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    80838051
    80848052    iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
    … …  
    81058073
    81068074    off = iemNativeEmitSimdBroadcastGprToVecRegU16(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
    8107     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8108     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    81098075
    81108076    iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
    … …  
    81318097
    81328098    off = iemNativeEmitSimdBroadcastGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
    8133     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8134     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    81358099
    81368100    /* Free but don't flush the source register. */
    … …  
    81588122
    81598123    off = iemNativeEmitSimdBroadcastGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
    8160     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8161     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    81628124
    81638125    /* Free but don't flush the source register. */
    … …  
    81858147
    81868148    off = iemNativeEmitSimdBroadcastVecRegU128ToVecReg(pReNative, off, idxSimdRegDst, idxVarReg);
    8187     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8188     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    81898149
    81908150    /* Free but don't flush the source register. */
    … …  
    82138173    off = iemNativeEmitSimdZeroVecRegU256(pReNative, off, idxSimdRegDst);
    82148174    off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iDWord*/);
    8215     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8216     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    82178175
    82188176    /* Free but don't flush the source register. */
    … …  
    82418199    off = iemNativeEmitSimdZeroVecRegU256(pReNative, off, idxSimdRegDst);
    82428200    off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iQWord*/);
    8243     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
    8244     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
    82458201
    82468202    /* Free but don't flush the source register. */
    … …  
    82718227    off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iQWord*/);
    82728228    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    8273     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
    8274     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    82758229
    82768230    /* Free but don't flush the source and destination registers. */
    … …  
    83028256    off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 1 /*iQWord*/);
    83038257    off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
    8304     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
    8305     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    83068258
    83078259    /* Free but don't flush the source and destination registers. */
    … …  
    83348286    if (bImm8Mask & RT_BIT(3))
    83358287        off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 3 /*iDWord*/);
    8336     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    83378288
    83388289    /* Free but don't flush the destination register. */
    … …  
    83848335
    83858336    off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxVarRegSrc);
    8386     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
    8387     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
    83888337
    83898338    /* Free but don't flush the source register. */
    … …  
    84488397    uint8_t const idxVarRegResAddr = iemNativeRegAllocTmp(pReNative, &off);
    84498398    uint8_t const idxRegTmp        = iemNativeRegAllocTmp(pReNative, &off);
    8450 
    8451     /* Assume the register to be always dirty for now, even if it doesn't get written when the code is executed due to unmasked exceptions. */
    8452     IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
    84538399
    84548400    off = iemNativeEmitLoadArgGregWithVarAddr(pReNative, off, idxVarRegResAddr, idxSseDataVar, false /*fFlushShadows*/);

  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

    r104047 r104048  
    64716471#endif
    64726472
     6473        if (   enmIntendedUse == kIemNativeGstRegUse_ForFullWrite
     6474            || enmIntendedUse == kIemNativeGstRegUse_ForUpdate)
     6475        {
     6476# ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
     6477            iemNativeDbgInfoAddNativeOffset(pReNative, *poff);
     6478            iemNaitveDbgInfoAddGuestRegDirty(pReNative, true /*fSimdReg*/, enmGstSimdReg, idxSimdReg);
     6479# endif
     6480
     6481            if (enmLoadSz == kIemNativeGstSimdRegLdStSz_Low128)
     6482                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
     6483            else if (enmLoadSz == kIemNativeGstSimdRegLdStSz_High128)
     6484                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
     6485            else
     6486            {
     6487                Assert(enmLoadSz == kIemNativeGstSimdRegLdStSz_256);
     6488                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
     6489                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
     6490            }
     6491        }
     6492
    64736493        return idxSimdReg;
    64746494    }
    … …  
    64866506    if (enmIntendedUse != kIemNativeGstRegUse_Calculation)
    64876507        iemNativeSimdRegMarkAsGstSimdRegShadow(pReNative, idxRegNew, enmGstSimdReg, *poff);
     6508
     6509    if (   enmIntendedUse == kIemNativeGstRegUse_ForFullWrite
     6510        || enmIntendedUse == kIemNativeGstRegUse_ForUpdate)
     6511    {
     6512# ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
     6513        iemNativeDbgInfoAddNativeOffset(pReNative, *poff);
     6514        iemNaitveDbgInfoAddGuestRegDirty(pReNative, true /*fSimdReg*/, enmGstSimdReg, idxRegNew);
     6515# endif
     6516
     6517        if (enmLoadSz == kIemNativeGstSimdRegLdStSz_Low128)
     6518            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
     6519        else if (enmLoadSz == kIemNativeGstSimdRegLdStSz_High128)
     6520            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
     6521        else
     6522        {
     6523            Assert(enmLoadSz == kIemNativeGstSimdRegLdStSz_256);
     6524            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
     6525            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
     6526        }
     6527    }
    64886528
    64896529    Log12(("iemNativeRegAllocTmpForGuestSimdReg: Allocated %s for guest %s %s\n",
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