Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 104047)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h	(revision 104048)
@@ -7388,6 +7388,4 @@
 
         off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXRegDst);
-        /* We don't need to write everything back here as the destination is marked as dirty and will be flushed automatically. */
 
         /* Free but don't flush the source and destination register. */
@@ -7550,5 +7548,4 @@
 
     off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -7576,5 +7573,4 @@
 
     off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, iQWord);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -7602,5 +7598,4 @@
 
     off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, iDWord);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -7630,5 +7625,4 @@
     off = iemNativeEmitSimdZeroVecRegLowU128(pReNative, off, idxSimdRegDst);
     off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -7658,5 +7652,4 @@
     off = iemNativeEmitSimdZeroVecRegLowU128(pReNative, off, idxSimdRegDst);
     off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, 0);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -7685,5 +7678,4 @@
     off = iemNativeEmitSimdLoadGprFromVecRegU32(pReNative, off, IEMNATIVE_REG_FIXED_TMP0, idxVarReg, iDwSrc);
     off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative,  off, idxSimdRegDst, IEMNATIVE_REG_FIXED_TMP0, iDwDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the destination register. */
@@ -7717,6 +7709,4 @@
         off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
         off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
         /* Free but don't flush the source and destination register. */
@@ -7731,5 +7721,4 @@
 
         off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
         /* Free but don't flush the destination register. */
@@ -7763,6 +7752,4 @@
 
         off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxSimdRegSrc);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
         /* Free but don't flush the source and destination register. */
@@ -7877,5 +7864,4 @@
 
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the register. */
@@ -7906,13 +7892,7 @@
 
     if (iDQword == 0)
-    {
         off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    }
     else
-    {
         off = iemNativeEmitSimdLoadVecRegHighU128FromVecRegLowU128(pReNative, off, idxSimdRegDst, idxVarReg);
-        IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
-    }
 
     /* Free but don't flush the source register. */
@@ -7941,6 +7921,4 @@
     off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxSimdRegDst, idxVarReg);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -7969,6 +7947,4 @@
     off = iemNativeEmitSimdBroadcastGprToVecRegU8(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
 
     iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
@@ -7996,6 +7972,4 @@
     off = iemNativeEmitSimdBroadcastGprToVecRegU16(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -8024,6 +7998,4 @@
     off = iemNativeEmitSimdBroadcastGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -8052,6 +8024,4 @@
     off = iemNativeEmitSimdBroadcastGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, false /*f256Bit*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iXReg);
 
     /* Free but don't flush the source register. */
@@ -8079,6 +8049,4 @@
 
     off = iemNativeEmitSimdBroadcastGprToVecRegU8(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
@@ -8105,6 +8073,4 @@
 
     off = iemNativeEmitSimdBroadcastGprToVecRegU16(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
@@ -8131,6 +8097,4 @@
 
     off = iemNativeEmitSimdBroadcastGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -8158,6 +8122,4 @@
 
     off = iemNativeEmitSimdBroadcastGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, true /*f256Bit*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -8185,6 +8147,4 @@
 
     off = iemNativeEmitSimdBroadcastVecRegU128ToVecReg(pReNative, off, idxSimdRegDst, idxVarReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -8213,6 +8173,4 @@
     off = iemNativeEmitSimdZeroVecRegU256(pReNative, off, idxSimdRegDst);
     off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iDWord*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -8241,6 +8199,4 @@
     off = iemNativeEmitSimdZeroVecRegU256(pReNative, off, idxSimdRegDst);
     off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iQWord*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYReg);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYReg);
 
     /* Free but don't flush the source register. */
@@ -8271,6 +8227,4 @@
     off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 0 /*iQWord*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
     /* Free but don't flush the source and destination registers. */
@@ -8302,6 +8256,4 @@
     off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, 1 /*iQWord*/);
     off = iemNativeEmitSimdZeroVecRegHighU128(pReNative, off, idxSimdRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
     /* Free but don't flush the source and destination registers. */
@@ -8334,5 +8286,4 @@
     if (bImm8Mask & RT_BIT(3))
         off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 3 /*iDWord*/);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     /* Free but don't flush the destination register. */
@@ -8384,6 +8335,4 @@
 
     off = iemNativeEmitSimdLoadVecRegFromVecRegU256(pReNative, off, idxSimdRegDst, idxVarRegSrc);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iYRegDst);
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, iYRegDst);
 
     /* Free but don't flush the source register. */
@@ -8448,7 +8397,4 @@
     uint8_t const idxVarRegResAddr = iemNativeRegAllocTmp(pReNative, &off);
     uint8_t const idxRegTmp        = iemNativeRegAllocTmp(pReNative, &off);
-
-    /* Assume the register to be always dirty for now, even if it doesn't get written when the code is executed due to unmasked exceptions. */
-    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
 
     off = iemNativeEmitLoadArgGregWithVarAddr(pReNative, off, idxVarRegResAddr, idxSseDataVar, false /*fFlushShadows*/);
Index: trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp	(revision 104047)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp	(revision 104048)
@@ -6471,4 +6471,24 @@
 #endif
 
+        if (   enmIntendedUse == kIemNativeGstRegUse_ForFullWrite
+            || enmIntendedUse == kIemNativeGstRegUse_ForUpdate)
+        {
+# ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
+            iemNativeDbgInfoAddNativeOffset(pReNative, *poff);
+            iemNaitveDbgInfoAddGuestRegDirty(pReNative, true /*fSimdReg*/, enmGstSimdReg, idxSimdReg);
+# endif
+
+            if (enmLoadSz == kIemNativeGstSimdRegLdStSz_Low128)
+                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
+            else if (enmLoadSz == kIemNativeGstSimdRegLdStSz_High128)
+                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
+            else
+            {
+                Assert(enmLoadSz == kIemNativeGstSimdRegLdStSz_256);
+                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
+                IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
+            }
+        }
+
         return idxSimdReg;
     }
@@ -6486,4 +6506,24 @@
     if (enmIntendedUse != kIemNativeGstRegUse_Calculation)
         iemNativeSimdRegMarkAsGstSimdRegShadow(pReNative, idxRegNew, enmGstSimdReg, *poff);
+
+    if (   enmIntendedUse == kIemNativeGstRegUse_ForFullWrite
+        || enmIntendedUse == kIemNativeGstRegUse_ForUpdate)
+    {
+# ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
+        iemNativeDbgInfoAddNativeOffset(pReNative, *poff);
+        iemNaitveDbgInfoAddGuestRegDirty(pReNative, true /*fSimdReg*/, enmGstSimdReg, idxRegNew);
+# endif
+
+        if (enmLoadSz == kIemNativeGstSimdRegLdStSz_Low128)
+            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
+        else if (enmLoadSz == kIemNativeGstSimdRegLdStSz_High128)
+            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
+        else
+        {
+            Assert(enmLoadSz == kIemNativeGstSimdRegLdStSz_256);
+            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, enmGstSimdReg);
+            IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_HI_U128(pReNative, enmGstSimdReg);
+        }
+    }
 
     Log12(("iemNativeRegAllocTmpForGuestSimdReg: Allocated %s for guest %s %s\n",
