VirtualBox

Changeset 104058 in vbox for trunk/src


Ignore:
Timestamp:
Mar 26, 2024 1:41:59 PM (13 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
162451
Message:

VMM/IEM: Make IEM_MC_FETCH_YREG_U128() take a iDQWord parameter to select the whether to fetch the low or high half of the 256-bit register, bugref:9898

Location:
trunk/src/VBox/VMM
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h

    r104019 r104058  
    741741        IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    742742
    743         IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm));
     743        IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    744744        IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);
    745745
     
    816816        IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    817817
    818         IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm));
     818        IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    819819        IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);
    820820
     
    19881988            IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    19891989
    1990             IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm));
     1990            IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    19911991            IEM_MC_STORE_MEM_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);
    19921992
     
    20642064            IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    20652065
    2066             IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm));
     2066            IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    20672067            IEM_MC_STORE_MEM_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);
    20682068
     
    42454245        IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    42464246
    4247         IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm));
     4247        IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    42484248        IEM_MC_STORE_MEM_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);
    42494249
     
    43214321        IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    43224322
    4323         IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm));
     4323        IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    43244324        IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);
    43254325
     
    52435243            IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ();
    52445244
    5245             IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm));
     5245            IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDQWord*/);
    52465246            IEM_MC_STORE_MEM_U128_ALIGN_SSE(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);
    52475247
  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp

    r104019 r104058  
    716716#define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc)                 NOP()
    717717#define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc, a_iQWord)       NOP()
    718 #define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc)               NOP()
     718#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQWord)    NOP()
    719719#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc)               NOP()
    720720
  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

    r104056 r104058  
    79007900
    79017901
    7902 #define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc) \
    7903     off = iemNativeEmitSimdFetchYregU128(pReNative, off, a_u128Dst, a_iYRegSrc, 0)
     7902#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQWord) \
     7903    off = iemNativeEmitSimdFetchYregU128(pReNative, off, a_u128Dst, a_iYRegSrc, a_iDQWord)
    79047904
    79057905/** Emits code for IEM_MC_FETCH_YREG_U128. */
     
    79217921
    79227922    if (iDQWord == 1)
    7923         AssertFailed(); /* Not used right now, implement and test when required. */
     7923        off = iemNativeEmitSimdLoadVecRegLowU128FromVecRegHighU128(pReNative, off, idxVarReg, idxSimdRegSrc);
    79247924    else
    79257925        off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxVarReg, idxSimdRegSrc);
  • trunk/src/VBox/VMM/include/IEMMc.h

    r104020 r104058  
    620620         (a_u64Dst) = pVCpu->cpum.GstCtx.XState.x87.aXMM[iYRegSrcTmp].au64[(a_iQWord)]; \
    621621    } while (0)
    622 #define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc) \
     622#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQword) \
    623623    do { uintptr_t const iYRegSrcTmp    = (a_iYRegSrc); \
    624          (a_u128Dst).au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[iYRegSrcTmp].au64[0]; \
    625          (a_u128Dst).au64[1] = pVCpu->cpum.GstCtx.XState.x87.aXMM[iYRegSrcTmp].au64[1]; \
     624         if ((a_iDQword) == 0) \
     625         { \
     626            (a_u128Dst).au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(iYRegSrcTmp)].au64[0]; \
     627            (a_u128Dst).au64[1] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(iYRegSrcTmp)].au64[1]; \
     628         } \
     629         else \
     630         { \
     631            (a_u128Dst).au64[0] = pVCpu->cpum.GstCtx.XState.u.YmmHi.aYmmHi[(iYRegSrcTmp)].au64[0]; \
     632            (a_u128Dst).au64[1] = pVCpu->cpum.GstCtx.XState.u.YmmHi.aYmmHi[(iYRegSrcTmp)].au64[1]; \
     633         } \
    626634    } while (0)
    627635#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) \
  • trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

    r104056 r104058  
    81428142
    81438143/**
     8144 * Emits a vecdst[0:127] = vecsrc[128:255] load.
     8145 */
     8146DECL_FORCE_INLINE_THROW(uint32_t)
     8147iemNativeEmitSimdLoadVecRegLowU128FromVecRegHighU128Ex(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
     8148{
     8149#ifdef RT_ARCH_AMD64
     8150    /* vextracti128 dst, src, 1. */ /* ASSUMES AVX2 support */
     8151    pCodeBuf[off++] = X86_OP_VEX3;
     8152    pCodeBuf[off++] = X86_OP_VEX3_BYTE1_MAKE(0x3, iVecRegDst >= 8, false, iVecRegSrc >= 8);
     8153    pCodeBuf[off++] = X86_OP_VEX3_BYTE2_MAKE_NO_VVVV(false, true, X86_OP_VEX3_BYTE2_P_066H);
     8154    pCodeBuf[off++] = 0x39;
     8155    pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iVecRegSrc & 7, iVecRegDst & 7);
     8156    pCodeBuf[off++] = 0x1;
     8157
     8158#elif defined(RT_ARCH_ARM64)
     8159    RT_NOREF(pCodeBuf, iVecRegDst, iVecRegSrc);
     8160
     8161    /* Should never be called because we can just use iemNativeEmitSimdLoadVecRegFromVecRegU128Ex(). */
     8162# ifdef IEM_WITH_THROW_CATCH
     8163    AssertFailedStmt(IEMNATIVE_DO_LONGJMP(NULL, VERR_IEM_IPE_9));
     8164# else
     8165    AssertReleaseFailedStmt(off = UINT32_MAX);
     8166# endif
     8167#else
     8168# error "port me"
     8169#endif
     8170    return off;
     8171}
     8172
     8173
     8174/**
     8175 * Emits a vecdst[0:127] = vecsrc[128:255] load, high 128-bit.
     8176 */
     8177DECL_INLINE_THROW(uint32_t)
     8178iemNativeEmitSimdLoadVecRegLowU128FromVecRegHighU128(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
     8179{
     8180#ifdef RT_ARCH_AMD64
     8181    off = iemNativeEmitSimdLoadVecRegLowU128FromVecRegHighU128Ex(iemNativeInstrBufEnsure(pReNative, off, 5), off, iVecRegDst, iVecRegSrc);
     8182#elif defined(RT_ARCH_ARM64)
     8183    Assert(!(iVecRegDst & 0x1) && !(iVecRegSrc & 0x1));
     8184    off = iemNativeEmitSimdLoadVecRegFromVecRegU128Ex(iemNativeInstrBufEnsure(pReNative, off, 1), off, iVecRegDst, iVecRegSrc + 1);
     8185#else
     8186# error "port me"
     8187#endif
     8188    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
     8189    return off;
     8190}
     8191
     8192
     8193/**
    81448194 * Emits a vecdst = vecsrc load, 256-bit.
    81458195 */
  • trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

    r104019 r104058  
    834834
    835835#define IEM_MC_FETCH_YREG_U256(a_u256Value, a_iYRegSrc)             do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u256Value); (a_u256Value).au64[0] = (a_u256Value).au64[1] = (a_u256Value).au64[2] = (a_u256Value).au64[3] = 0; CHK_TYPE(RTUINT256U, a_u256Value); (void)fAvxRead; (void)fMcBegin; } while (0)
    836 #define IEM_MC_FETCH_YREG_U128(a_u128Value, a_iYRegSrc)             do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u128Value); (a_u128Value).au64[0] = (a_u128Value).au64[1] = 0; CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxRead; (void)fMcBegin; } while (0)
     836#define IEM_MC_FETCH_YREG_U128(a_u128Value, a_iYRegSrc, a_iDQWord)  do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u128Value); (a_u128Value).au64[0] = (a_u128Value).au64[1] = 0; CHK_TYPE(RTUINT128U, a_u128Value); (void)fAvxRead; (void)fMcBegin; } while (0)
    837837#define IEM_MC_FETCH_YREG_U64(a_u64Value, a_iYRegSrc, a_iQWord)     do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u64Value);  (a_u64Value) = UINT64_MAX; CHK_TYPE(uint64_t, a_u64Value); (void)fAvxRead; (void)fMcBegin; } while (0)
    838838#define IEM_MC_FETCH_YREG_U32(a_u32Value, a_iYRegSrc)               do { CHK_YREG_IDX(a_iYRegSrc); CHK_VAR(a_u32Value);  (a_u32Value) = UINT32_MAX; CHK_TYPE(uint32_t, a_u32Value); (void)fAvxRead; (void)fMcBegin; } while (0)
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