Changeset 104076 in vbox for trunk/src/VBox/VMM/testcase

Timestamp:

Mar 27, 2024 8:19:25 AM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement 'microcoded' vpinsr[bwdq] instruction decode, dispatch & emulation, bugref:9898

• eliminate '256 immediate instructions' jumptable implementations of pinsrw, vpinsrw
• eliminate 'fallback' C implementations of pinsrw, vpinsrw
• add 'IEM_MC_FETCH_MREG_U8' micro-op
• add 'IEM_MC_STORE_MREG_U8, IEM_MC_STORE_MREG_U16, IEM_MC_STORE_MREG_U32' micro-ops
• fix 'IEM_MC_STORE_XREG_U8' micro-op to store 8, not 32 bits (at the right offset)
• fix 'IEM_MC_STORE_XREG_U16' micro-op to store 16, not 32 bits (at the right offset)

File:

• trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp (modified) (1 diff)

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -783 +783 @@
 #define IEM_MC_BSWAP_LOCAL_U64(a_u64Local)              do { CHK_TYPE(uint64_t, a_u64Local); CHK_VAR(a_u64Local); (void)fMcBegin; } while (0)
 
-#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg)          do { CHK_MREG_IDX(a_iMReg); (a_u64Value) = 0; CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuRead; (void)fMcBegin; } while (0)
+#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg)              do { CHK_MREG_IDX(a_iMReg); (a_u64Value) = 0; CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuRead; (void)fMcBegin; } while (0)
 #define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg, a_iDWord)    do { CHK_MREG_IDX(a_iMReg); (a_u32Value) = 0; CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuRead; (void)fMcBegin; } while (0)
 #define IEM_MC_FETCH_MREG_U16(a_u16Value, a_iMReg, a_iWord)     do { CHK_MREG_IDX(a_iMReg); (a_u16Value) = 0; CHK_VAR(a_u16Value); CHK_TYPE(uint16_t, a_u16Value); (void)fFpuRead; (void)fMcBegin; } while (0)
-#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value)          do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuWrite; (void)fMcBegin; } while (0)
+#define IEM_MC_FETCH_MREG_U8(a_u8Value, a_iMReg, a_iByte)       do { CHK_MREG_IDX(a_iMReg); (a_u8Value)  = 0; CHK_VAR(a_u8Value);  CHK_TYPE(uint8_t,  a_u8Value);  (void)fFpuRead; (void)fMcBegin; } while (0)
+#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value)              do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u64Value); CHK_TYPE(uint64_t, a_u64Value); (void)fFpuWrite; (void)fMcBegin; } while (0)
+#define IEM_MC_STORE_MREG_U32(a_iMReg, a_iDword, a_u32Value)    do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuWrite; (void)fMcBegin; } while (0)
+#define IEM_MC_STORE_MREG_U16(a_iMReg, a_iWord, a_u16Value)     do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u16Value); CHK_TYPE(uint16_t, a_u16Value); (void)fFpuWrite; (void)fMcBegin; } while (0)
+#define IEM_MC_STORE_MREG_U8(a_iMReg, a_iByte, a_u8Value)       do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u8Value);  CHK_TYPE(uint8_t,  a_u8Value);  (void)fFpuWrite; (void)fMcBegin; } while (0)
 #define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value)   do { CHK_MREG_IDX(a_iMReg);                   CHK_VAR(a_u32Value); CHK_TYPE(uint32_t, a_u32Value); (void)fFpuWrite; (void)fMcBegin; } while (0)
 #define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg)             do { CHK_MREG_IDX(a_iMReg); (a_pu64Dst) = (uint64_t *)((uintptr_t)0);       CHK_VAR(a_pu64Dst); CHK_PTYPE(uint64_t *,       a_pu64Dst);       (void)fFpuWrite; (void)fMcBegin; } while (0)