Changeset 104101 in vbox
- Timestamp:
- Mar 28, 2024 7:25:23 AM (12 months ago)
- svn:sync-xref-src-repo-rev:
- 162504
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp
r104100 r104101 4158 4158 4159 4159 uint64_t bmGstRegShadowDirty = pReNative->Core.bmGstRegShadowDirty & fGstRegShadows; 4160 uint32_t idxGstReg = 0;4161 4160 do 4162 4161 { 4163 if (bmGstRegShadowDirty & 0x1) 4164 { 4165 off = iemNativeRegFlushPendingWrite(pReNative, off, (IEMNATIVEGSTREG)idxGstReg); 4166 Assert(!(pReNative->Core.bmGstRegShadowDirty & RT_BIT_64(idxGstReg))); 4167 } 4168 idxGstReg++; 4169 bmGstRegShadowDirty >>= 1; 4162 unsigned const idxGstReg = ASMBitFirstSetU64(bmGstRegShadowDirty) - 1; 4163 bmGstRegShadowDirty &= ~RT_BIT_64(idxGstReg); 4164 off = iemNativeRegFlushPendingWrite(pReNative, off, (IEMNATIVEGSTREG)idxGstReg); 4165 Assert(!(pReNative->Core.bmGstRegShadowDirty & RT_BIT_64(idxGstReg))); 4170 4166 } while (bmGstRegShadowDirty); 4171 4167 } … … 5886 5882 # endif 5887 5883 5888 uint32_t idxGstSimdReg = 0;5889 5884 do 5890 5885 { 5891 if (bmGstSimdRegShadowDirty & 0x1) 5892 off = iemNativeSimdRegFlushPendingWrite(pReNative, off, IEMNATIVEGSTSIMDREG_SIMD(idxGstSimdReg)); 5893 5894 idxGstSimdReg++; 5895 bmGstSimdRegShadowDirty >>= 1; 5886 unsigned const idxGstSimdReg = ASMBitFirstSetU64(bmGstSimdRegShadowDirty) - 1; 5887 bmGstSimdRegShadowDirty &= ~RT_BIT_64(idxGstSimdReg); 5888 off = iemNativeSimdRegFlushPendingWrite(pReNative, off, IEMNATIVEGSTSIMDREG_SIMD(idxGstSimdReg)); 5896 5889 } while (bmGstSimdRegShadowDirty); 5897 5890 } … … 5924 5917 # endif 5925 5918 5926 uint32_t idxGstSimdReg = 0;5927 5919 do 5928 5920 { 5929 if (bmGstSimdRegShadowDirty & 0x1) 5930 off = iemNativeSimdRegFlushPendingWrite(pReNative, off, IEMNATIVEGSTSIMDREG_SIMD(idxGstSimdReg)); 5931 5932 idxGstSimdReg++; 5933 bmGstSimdRegShadowDirty >>= 1; 5921 unsigned const idxGstSimdReg = ASMBitFirstSetU64(bmGstSimdRegShadowDirty) - 1; 5922 bmGstSimdRegShadowDirty &= ~RT_BIT_64(idxGstSimdReg); 5923 off = iemNativeSimdRegFlushPendingWrite(pReNative, off, IEMNATIVEGSTSIMDREG_SIMD(idxGstSimdReg)); 5924 Assert(!IEMNATIVE_SIMD_REG_STATE_IS_DIRTY_U256(pReNative, idxGstSimdReg)); 5934 5925 } while (bmGstSimdRegShadowDirty); 5935 5926 } … … 6031 6022 6032 6023 /* We need to flush any pending guest register writes this host SIMD register shadows. */ 6033 uint32_t fGstRegShadows = pReNative->Core.aHstSimdRegs[idxReg].fGstRegShadows; 6034 uint32_t idxGstSimdReg = 0; 6035 do 6036 { 6037 if (fGstRegShadows & 0x1) 6038 { 6039 *poff = iemNativeSimdRegFlushPendingWrite(pReNative, *poff, IEMNATIVEGSTSIMDREG_SIMD(idxGstSimdReg)); 6040 Assert(!IEMNATIVE_SIMD_REG_STATE_IS_DIRTY_U256(pReNative, idxGstSimdReg)); 6041 } 6042 idxGstSimdReg++; 6043 fGstRegShadows >>= 1; 6044 } while (fGstRegShadows); 6024 *poff = iemNativeSimdRegFlushDirtyGuestByHostSimdRegShadow(pReNative, *poff, idxReg); 6045 6025 6046 6026 pReNative->Core.bmHstSimdRegsWithGstShadow &= ~RT_BIT_32(idxReg);
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