Changeset 104132 in vbox
- Timestamp:
- Apr 3, 2024 9:22:06 AM (8 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r104129 r104132 4431 4431 ; @param A3 Pointer to the second source media register size operand (input). 4432 4432 ; 4433 ; @todo r=aeichner Not used right now 4434 ; 4433 4435 %macro IEMIMPL_MEDIA_F3 1 4434 4436 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 16 … … 4459 4461 %endmacro 4460 4462 4461 IEMIMPL_MEDIA_F3 vpshufb4462 IEMIMPL_MEDIA_F3 vpand4463 IEMIMPL_MEDIA_F3 vpminub4464 IEMIMPL_MEDIA_F3 vpminuw4465 IEMIMPL_MEDIA_F3 vpminud4466 IEMIMPL_MEDIA_F3 vpminsb4467 IEMIMPL_MEDIA_F3 vpminsw4468 IEMIMPL_MEDIA_F3 vpminsd4469 IEMIMPL_MEDIA_F3 vpmaxub4470 IEMIMPL_MEDIA_F3 vpmaxuw4471 IEMIMPL_MEDIA_F3 vpmaxud4472 IEMIMPL_MEDIA_F3 vpmaxsb4473 IEMIMPL_MEDIA_F3 vpmaxsw4474 IEMIMPL_MEDIA_F3 vpmaxsd4475 IEMIMPL_MEDIA_F3 vpandn4476 IEMIMPL_MEDIA_F3 vpor4477 IEMIMPL_MEDIA_F3 vpxor4478 IEMIMPL_MEDIA_F3 vpcmpeqb4479 IEMIMPL_MEDIA_F3 vpcmpeqw4480 IEMIMPL_MEDIA_F3 vpcmpeqd4481 IEMIMPL_MEDIA_F3 vpcmpeqq4482 IEMIMPL_MEDIA_F3 vpcmpgtb4483 IEMIMPL_MEDIA_F3 vpcmpgtw4484 IEMIMPL_MEDIA_F3 vpcmpgtd4485 IEMIMPL_MEDIA_F3 vpcmpgtq4486 IEMIMPL_MEDIA_F3 vpaddb4487 IEMIMPL_MEDIA_F3 vpaddw4488 IEMIMPL_MEDIA_F3 vpaddd4489 IEMIMPL_MEDIA_F3 vpaddq4490 IEMIMPL_MEDIA_F3 vpsubb4491 IEMIMPL_MEDIA_F3 vpsubw4492 IEMIMPL_MEDIA_F3 vpsubd4493 IEMIMPL_MEDIA_F3 vpsubq4494 4495 4496 4463 ;; 4497 4464 ; Media instruction working on two full sized source registers and one destination (AVX), … … 4532 4499 %endmacro 4533 4500 4501 IEMIMPL_MEDIA_OPT_F3 vpshufb 4502 IEMIMPL_MEDIA_OPT_F3 vpand 4503 IEMIMPL_MEDIA_OPT_F3 vpminub 4504 IEMIMPL_MEDIA_OPT_F3 vpminuw 4505 IEMIMPL_MEDIA_OPT_F3 vpminud 4506 IEMIMPL_MEDIA_OPT_F3 vpminsb 4507 IEMIMPL_MEDIA_OPT_F3 vpminsw 4508 IEMIMPL_MEDIA_OPT_F3 vpminsd 4509 IEMIMPL_MEDIA_OPT_F3 vpmaxub 4510 IEMIMPL_MEDIA_OPT_F3 vpmaxuw 4511 IEMIMPL_MEDIA_OPT_F3 vpmaxud 4512 IEMIMPL_MEDIA_OPT_F3 vpmaxsb 4513 IEMIMPL_MEDIA_OPT_F3 vpmaxsw 4514 IEMIMPL_MEDIA_OPT_F3 vpmaxsd 4515 IEMIMPL_MEDIA_OPT_F3 vpandn 4516 IEMIMPL_MEDIA_OPT_F3 vpor 4517 IEMIMPL_MEDIA_OPT_F3 vpxor 4518 IEMIMPL_MEDIA_OPT_F3 vpcmpeqb 4519 IEMIMPL_MEDIA_OPT_F3 vpcmpeqw 4520 IEMIMPL_MEDIA_OPT_F3 vpcmpeqd 4521 IEMIMPL_MEDIA_OPT_F3 vpcmpeqq 4522 IEMIMPL_MEDIA_OPT_F3 vpcmpgtb 4523 IEMIMPL_MEDIA_OPT_F3 vpcmpgtw 4524 IEMIMPL_MEDIA_OPT_F3 vpcmpgtd 4525 IEMIMPL_MEDIA_OPT_F3 vpcmpgtq 4526 IEMIMPL_MEDIA_OPT_F3 vpaddb 4527 IEMIMPL_MEDIA_OPT_F3 vpaddw 4528 IEMIMPL_MEDIA_OPT_F3 vpaddd 4529 IEMIMPL_MEDIA_OPT_F3 vpaddq 4530 IEMIMPL_MEDIA_OPT_F3 vpsubb 4531 IEMIMPL_MEDIA_OPT_F3 vpsubw 4532 IEMIMPL_MEDIA_OPT_F3 vpsubd 4533 IEMIMPL_MEDIA_OPT_F3 vpsubq 4534 4534 IEMIMPL_MEDIA_OPT_F3 vpacksswb 4535 4535 IEMIMPL_MEDIA_OPT_F3 vpackssdw -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r104129 r104132 7853 7853 #endif 7854 7854 7855 IEM_DECL_IMPL_DEF(void, iemAImpl_vpand_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7856 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7857 { 7858 RT_NOREF(pExtState); 7855 IEM_DECL_IMPL_DEF(void, iemAImpl_vpand_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7856 { 7859 7857 puDst->au64[0] = puSrc1->au64[0] & puSrc2->au64[0]; 7860 7858 puDst->au64[1] = puSrc1->au64[1] & puSrc2->au64[1]; … … 7862 7860 7863 7861 7864 IEM_DECL_IMPL_DEF(void, iemAImpl_vpand_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7865 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7866 { 7867 RT_NOREF(pExtState); 7862 IEM_DECL_IMPL_DEF(void, iemAImpl_vpand_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7863 { 7868 7864 puDst->au64[0] = puSrc1->au64[0] & puSrc2->au64[0]; 7869 7865 puDst->au64[1] = puSrc1->au64[1] & puSrc2->au64[1]; … … 7892 7888 #endif 7893 7889 7894 IEM_DECL_IMPL_DEF(void, iemAImpl_vpandn_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7895 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7896 { 7897 RT_NOREF(pExtState); 7890 IEM_DECL_IMPL_DEF(void, iemAImpl_vpandn_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7891 { 7898 7892 puDst->au64[0] = ~puSrc1->au64[0] & puSrc2->au64[0]; 7899 7893 puDst->au64[1] = ~puSrc1->au64[1] & puSrc2->au64[1]; … … 7901 7895 7902 7896 7903 IEM_DECL_IMPL_DEF(void, iemAImpl_vpandn_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7904 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7905 { 7906 RT_NOREF(pExtState); 7897 IEM_DECL_IMPL_DEF(void, iemAImpl_vpandn_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7898 { 7907 7899 puDst->au64[0] = ~puSrc1->au64[0] & puSrc2->au64[0]; 7908 7900 puDst->au64[1] = ~puSrc1->au64[1] & puSrc2->au64[1]; … … 7931 7923 #endif 7932 7924 7933 IEM_DECL_IMPL_DEF(void, iemAImpl_vpor_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7934 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7935 { 7936 RT_NOREF(pExtState); 7925 IEM_DECL_IMPL_DEF(void, iemAImpl_vpor_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7926 { 7937 7927 puDst->au64[0] = puSrc1->au64[0] | puSrc2->au64[0]; 7938 7928 puDst->au64[1] = puSrc1->au64[1] | puSrc2->au64[1]; … … 7940 7930 7941 7931 7942 IEM_DECL_IMPL_DEF(void, iemAImpl_vpor_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7943 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7944 { 7945 RT_NOREF(pExtState); 7932 IEM_DECL_IMPL_DEF(void, iemAImpl_vpor_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7933 { 7946 7934 puDst->au64[0] = puSrc1->au64[0] | puSrc2->au64[0]; 7947 7935 puDst->au64[1] = puSrc1->au64[1] | puSrc2->au64[1]; … … 7970 7958 #endif 7971 7959 7972 IEM_DECL_IMPL_DEF(void, iemAImpl_vpxor_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7973 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7974 { 7975 RT_NOREF(pExtState); 7960 IEM_DECL_IMPL_DEF(void, iemAImpl_vpxor_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7961 { 7976 7962 puDst->au64[0] = puSrc1->au64[0] ^ puSrc2->au64[0]; 7977 7963 puDst->au64[1] = puSrc1->au64[1] ^ puSrc2->au64[1]; … … 7979 7965 7980 7966 7981 IEM_DECL_IMPL_DEF(void, iemAImpl_vpxor_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7982 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7983 { 7984 RT_NOREF(pExtState); 7967 IEM_DECL_IMPL_DEF(void, iemAImpl_vpxor_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7968 { 7985 7969 puDst->au64[0] = puSrc1->au64[0] ^ puSrc2->au64[0]; 7986 7970 puDst->au64[1] = puSrc1->au64[1] ^ puSrc2->au64[1]; … … 8035 8019 #endif 8036 8020 8037 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8038 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8039 { 8040 RT_NOREF(pExtState); 8021 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8022 { 8041 8023 puDst->au8[0] = puSrc1->au8[0] == puSrc2->au8[0] ? UINT8_MAX : 0; 8042 8024 puDst->au8[1] = puSrc1->au8[1] == puSrc2->au8[1] ? UINT8_MAX : 0; … … 8057 8039 } 8058 8040 8059 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8060 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8061 { 8062 RT_NOREF(pExtState); 8041 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8042 { 8063 8043 puDst->au8[0] = puSrc1->au8[0] == puSrc2->au8[0] ? UINT8_MAX : 0; 8064 8044 puDst->au8[1] = puSrc1->au8[1] == puSrc2->au8[1] ? UINT8_MAX : 0; … … 8129 8109 #endif 8130 8110 8131 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8132 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8133 { 8134 RT_NOREF(pExtState); 8111 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8112 { 8135 8113 puDst->au16[0] = puSrc1->au16[0] == puSrc2->au16[0] ? UINT16_MAX : 0; 8136 8114 puDst->au16[1] = puSrc1->au16[1] == puSrc2->au16[1] ? UINT16_MAX : 0; … … 8143 8121 } 8144 8122 8145 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8146 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8147 { 8148 RT_NOREF(pExtState); 8123 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8124 { 8149 8125 puDst->au16[0] = puSrc1->au16[0] == puSrc2->au16[0] ? UINT16_MAX : 0; 8150 8126 puDst->au16[1] = puSrc1->au16[1] == puSrc2->au16[1] ? UINT16_MAX : 0; … … 8193 8169 #endif /* IEM_WITHOUT_ASSEMBLY */ 8194 8170 8195 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8196 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8197 { 8198 RT_NOREF(pExtState); 8171 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8172 { 8199 8173 puDst->au32[0] = puSrc1->au32[0] == puSrc2->au32[0] ? UINT32_MAX : 0; 8200 8174 puDst->au32[1] = puSrc1->au32[1] == puSrc2->au32[1] ? UINT32_MAX : 0; … … 8203 8177 } 8204 8178 8205 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8206 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8207 { 8208 RT_NOREF(pExtState); 8179 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8180 { 8209 8181 puDst->au32[0] = puSrc1->au32[0] == puSrc2->au32[0] ? UINT32_MAX : 0; 8210 8182 puDst->au32[1] = puSrc1->au32[1] == puSrc2->au32[1] ? UINT32_MAX : 0; … … 8228 8200 } 8229 8201 8230 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8231 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8232 { 8233 RT_NOREF(pExtState); 8202 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8203 { 8234 8204 puDst->au64[0] = puSrc1->au64[0] == puSrc2->au64[0] ? UINT64_MAX : 0; 8235 8205 puDst->au64[1] = puSrc1->au64[1] == puSrc2->au64[1] ? UINT64_MAX : 0; 8236 8206 } 8237 8207 8238 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8239 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8240 { 8241 RT_NOREF(pExtState); 8208 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8209 { 8242 8210 puDst->au64[0] = puSrc1->au64[0] == puSrc2->au64[0] ? UINT64_MAX : 0; 8243 8211 puDst->au64[1] = puSrc1->au64[1] == puSrc2->au64[1] ? UINT64_MAX : 0; … … 8292 8260 #endif 8293 8261 8294 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8295 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8296 { 8297 RT_NOREF(pExtState); 8262 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8263 { 8298 8264 puDst->au8[0] = puSrc1->ai8[0] > puSrc2->ai8[0] ? UINT8_MAX : 0; 8299 8265 puDst->au8[1] = puSrc1->ai8[1] > puSrc2->ai8[1] ? UINT8_MAX : 0; … … 8314 8280 } 8315 8281 8316 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8317 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8318 { 8319 RT_NOREF(pExtState); 8282 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8283 { 8320 8284 puDst->au8[0] = puSrc1->ai8[0] > puSrc2->ai8[0] ? UINT8_MAX : 0; 8321 8285 puDst->au8[1] = puSrc1->ai8[1] > puSrc2->ai8[1] ? UINT8_MAX : 0; … … 8386 8350 #endif 8387 8351 8388 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8389 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8390 { 8391 RT_NOREF(pExtState); 8352 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8353 { 8392 8354 puDst->au16[0] = puSrc1->ai16[0] > puSrc2->ai16[0] ? UINT16_MAX : 0; 8393 8355 puDst->au16[1] = puSrc1->ai16[1] > puSrc2->ai16[1] ? UINT16_MAX : 0; … … 8400 8362 } 8401 8363 8402 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8403 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8404 { 8405 RT_NOREF(pExtState); 8364 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8365 { 8406 8366 puDst->au16[0] = puSrc1->ai16[0] > puSrc2->ai16[0] ? UINT16_MAX : 0; 8407 8367 puDst->au16[1] = puSrc1->ai16[1] > puSrc2->ai16[1] ? UINT16_MAX : 0; … … 8450 8410 #endif /* IEM_WITHOUT_ASSEMBLY */ 8451 8411 8452 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8453 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8454 { 8455 RT_NOREF(pExtState); 8412 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8413 { 8456 8414 puDst->au32[0] = puSrc1->ai32[0] > puSrc2->ai32[0] ? UINT32_MAX : 0; 8457 8415 puDst->au32[1] = puSrc1->ai32[1] > puSrc2->ai32[1] ? UINT32_MAX : 0; … … 8460 8418 } 8461 8419 8462 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8463 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8464 { 8465 RT_NOREF(pExtState); 8420 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8421 { 8466 8422 puDst->au32[0] = puSrc1->ai32[0] > puSrc2->ai32[0] ? UINT32_MAX : 0; 8467 8423 puDst->au32[1] = puSrc1->ai32[1] > puSrc2->ai32[1] ? UINT32_MAX : 0; … … 8485 8441 } 8486 8442 8487 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8488 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8489 { 8490 RT_NOREF(pExtState); 8443 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8444 { 8491 8445 puDst->au64[0] = puSrc1->ai64[0] > puSrc2->ai64[0] ? UINT64_MAX : 0; 8492 8446 puDst->au64[1] = puSrc1->ai64[1] > puSrc2->ai64[1] ? UINT64_MAX : 0; 8493 8447 } 8494 8448 8495 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8496 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8497 { 8498 RT_NOREF(pExtState); 8449 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8450 { 8499 8451 puDst->au64[0] = puSrc1->ai64[0] > puSrc2->ai64[0] ? UINT64_MAX : 0; 8500 8452 puDst->au64[1] = puSrc1->ai64[1] > puSrc2->ai64[1] ? UINT64_MAX : 0; … … 8550 8502 8551 8503 8552 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8553 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8554 { 8555 RT_NOREF(pExtState); 8504 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8505 { 8556 8506 puDst->au8[0] = puSrc1->au8[0] + puSrc2->au8[0]; 8557 8507 puDst->au8[1] = puSrc1->au8[1] + puSrc2->au8[1]; … … 8572 8522 } 8573 8523 8574 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8575 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8576 { 8577 RT_NOREF(pExtState); 8524 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8525 { 8578 8526 puDst->au8[0] = puSrc1->au8[0] + puSrc2->au8[0]; 8579 8527 puDst->au8[1] = puSrc1->au8[1] + puSrc2->au8[1]; … … 8863 8811 8864 8812 8865 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 8866 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8867 { 8868 RT_NOREF(pExtState); 8813 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 8814 { 8869 8815 puDst->au16[0] = puSrc1->au16[0] + puSrc2->au16[0]; 8870 8816 puDst->au16[1] = puSrc1->au16[1] + puSrc2->au16[1]; … … 8877 8823 } 8878 8824 8879 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 8880 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8881 { 8882 RT_NOREF(pExtState); 8825 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 8826 { 8883 8827 puDst->au16[0] = puSrc1->au16[0] + puSrc2->au16[0]; 8884 8828 puDst->au16[1] = puSrc1->au16[1] + puSrc2->au16[1]; … … 9073 9017 #endif /* IEM_WITHOUT_ASSEMBLY */ 9074 9018 9075 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9076 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9077 { 9078 RT_NOREF(pExtState); 9019 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9020 { 9079 9021 puDst->au32[0] = puSrc1->au32[0] + puSrc2->au32[0]; 9080 9022 puDst->au32[1] = puSrc1->au32[1] + puSrc2->au32[1]; … … 9083 9025 } 9084 9026 9085 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9086 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9087 { 9088 RT_NOREF(pExtState); 9027 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9028 { 9089 9029 puDst->au32[0] = puSrc1->au32[0] + puSrc2->au32[0]; 9090 9030 puDst->au32[1] = puSrc1->au32[1] + puSrc2->au32[1]; … … 9117 9057 #endif 9118 9058 9119 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9120 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9121 { 9122 RT_NOREF(pExtState); 9059 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9060 { 9123 9061 puDst->au64[0] = puSrc1->au64[0] + puSrc2->au64[0]; 9124 9062 puDst->au64[1] = puSrc1->au64[1] + puSrc2->au64[1]; 9125 9063 } 9126 9064 9127 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9128 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9129 { 9130 RT_NOREF(pExtState); 9065 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddq_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9066 { 9131 9067 puDst->au64[0] = puSrc1->au64[0] + puSrc2->au64[0]; 9132 9068 puDst->au64[1] = puSrc1->au64[1] + puSrc2->au64[1]; … … 9181 9117 #endif 9182 9118 9183 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9184 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9185 { 9186 RT_NOREF(pExtState); 9119 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9120 { 9187 9121 puDst->au8[0] = puSrc1->au8[0] - puSrc2->au8[0]; 9188 9122 puDst->au8[1] = puSrc1->au8[1] - puSrc2->au8[1]; … … 9203 9137 } 9204 9138 9205 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9206 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9207 { 9208 RT_NOREF(pExtState); 9139 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9140 { 9209 9141 puDst->au8[0] = puSrc1->au8[0] - puSrc2->au8[0]; 9210 9142 puDst->au8[1] = puSrc1->au8[1] - puSrc2->au8[1]; … … 9488 9420 #endif 9489 9421 9490 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9491 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9492 { 9493 RT_NOREF(pExtState); 9422 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9423 { 9494 9424 puDst->au16[0] = puSrc1->au16[0] - puSrc2->au16[0]; 9495 9425 puDst->au16[1] = puSrc1->au16[1] - puSrc2->au16[1]; … … 9502 9432 } 9503 9433 9504 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9505 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9506 { 9507 RT_NOREF(pExtState); 9434 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9435 { 9508 9436 puDst->au16[0] = puSrc1->au16[0] - puSrc2->au16[0]; 9509 9437 puDst->au16[1] = puSrc1->au16[1] - puSrc2->au16[1]; … … 9694 9622 #endif /* IEM_WITHOUT_ASSEMBLY */ 9695 9623 9696 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9697 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9698 { 9699 RT_NOREF(pExtState); 9624 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9625 { 9700 9626 puDst->au32[0] = puSrc1->au32[0] - puSrc2->au32[0]; 9701 9627 puDst->au32[1] = puSrc1->au32[1] - puSrc2->au32[1]; … … 9704 9630 } 9705 9631 9706 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9707 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9708 { 9709 RT_NOREF(pExtState); 9632 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9633 { 9710 9634 puDst->au32[0] = puSrc1->au32[0] - puSrc2->au32[0]; 9711 9635 puDst->au32[1] = puSrc1->au32[1] - puSrc2->au32[1]; … … 9738 9662 #endif 9739 9663 9740 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 9741 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9742 { 9743 RT_NOREF(pExtState); 9664 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 9665 { 9744 9666 puDst->au64[0] = puSrc1->au64[0] - puSrc2->au64[0]; 9745 9667 puDst->au64[1] = puSrc1->au64[1] - puSrc2->au64[1]; 9746 9668 } 9747 9669 9748 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 9749 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9750 { 9751 RT_NOREF(pExtState); 9670 IEM_DECL_IMPL_DEF(void, iemAImpl_vpsubq_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 9671 { 9752 9672 puDst->au64[0] = puSrc1->au64[0] - puSrc2->au64[0]; 9753 9673 puDst->au64[1] = puSrc1->au64[1] - puSrc2->au64[1]; … … 11424 11344 11425 11345 11426 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxub_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11427 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11346 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxub_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11428 11347 { 11429 11348 puDst->au8[ 0] = RT_MAX(puSrc1->au8[ 0], puSrc2->au8[ 0]); … … 11443 11362 puDst->au8[14] = RT_MAX(puSrc1->au8[14], puSrc2->au8[14]); 11444 11363 puDst->au8[15] = RT_MAX(puSrc1->au8[15], puSrc2->au8[15]); 11445 RT_NOREF(pExtState); 11446 } 11447 11448 11449 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxub_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11450 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11364 } 11365 11366 11367 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxub_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11451 11368 { 11452 11369 puDst->au8[ 0] = RT_MAX(puSrc1->au8[ 0], puSrc2->au8[ 0]); … … 11482 11399 puDst->au8[30] = RT_MAX(puSrc1->au8[30], puSrc2->au8[30]); 11483 11400 puDst->au8[31] = RT_MAX(puSrc1->au8[31], puSrc2->au8[31]); 11484 RT_NOREF(pExtState); 11485 } 11486 11487 11488 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxuw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11489 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11401 } 11402 11403 11404 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxuw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11490 11405 { 11491 11406 puDst->au16[ 0] = RT_MAX(puSrc1->au16[ 0], puSrc2->au16[ 0]); … … 11497 11412 puDst->au16[ 6] = RT_MAX(puSrc1->au16[ 6], puSrc2->au16[ 6]); 11498 11413 puDst->au16[ 7] = RT_MAX(puSrc1->au16[ 7], puSrc2->au16[ 7]); 11499 RT_NOREF(pExtState); 11500 } 11501 11502 11503 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxuw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11504 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11414 } 11415 11416 11417 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxuw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11505 11418 { 11506 11419 puDst->au16[ 0] = RT_MAX(puSrc1->au16[ 0], puSrc2->au16[ 0]); … … 11520 11433 puDst->au16[14] = RT_MAX(puSrc1->au16[14], puSrc2->au16[14]); 11521 11434 puDst->au16[15] = RT_MAX(puSrc1->au16[15], puSrc2->au16[15]); 11522 RT_NOREF(pExtState); 11523 } 11524 11525 11526 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxud_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11527 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11435 } 11436 11437 11438 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxud_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11528 11439 { 11529 11440 puDst->au32[ 0] = RT_MAX(puSrc1->au32[ 0], puSrc2->au32[ 0]); … … 11531 11442 puDst->au32[ 2] = RT_MAX(puSrc1->au32[ 2], puSrc2->au32[ 2]); 11532 11443 puDst->au32[ 3] = RT_MAX(puSrc1->au32[ 3], puSrc2->au32[ 3]); 11533 RT_NOREF(pExtState); 11534 } 11535 11536 11537 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxud_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11538 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11444 } 11445 11446 11447 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxud_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11539 11448 { 11540 11449 puDst->au32[ 0] = RT_MAX(puSrc1->au32[ 0], puSrc2->au32[ 0]); … … 11546 11455 puDst->au32[ 6] = RT_MAX(puSrc1->au32[ 6], puSrc2->au32[ 6]); 11547 11456 puDst->au32[ 7] = RT_MAX(puSrc1->au32[ 7], puSrc2->au32[ 7]); 11548 RT_NOREF(pExtState);11549 11457 } 11550 11458 … … 11619 11527 11620 11528 11621 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11622 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11529 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11623 11530 { 11624 11531 puDst->ai8[ 0] = RT_MAX(puSrc1->ai8[ 0], puSrc2->ai8[ 0]); … … 11638 11545 puDst->ai8[14] = RT_MAX(puSrc1->ai8[14], puSrc2->ai8[14]); 11639 11546 puDst->ai8[15] = RT_MAX(puSrc1->ai8[15], puSrc2->ai8[15]); 11640 RT_NOREF(pExtState); 11641 } 11642 11643 11644 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11645 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11547 } 11548 11549 11550 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11646 11551 { 11647 11552 puDst->ai8[ 0] = RT_MAX(puSrc1->ai8[ 0], puSrc2->ai8[ 0]); … … 11677 11582 puDst->ai8[30] = RT_MAX(puSrc1->ai8[30], puSrc2->ai8[30]); 11678 11583 puDst->ai8[31] = RT_MAX(puSrc1->ai8[31], puSrc2->ai8[31]); 11679 RT_NOREF(pExtState); 11680 } 11681 11682 11683 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11684 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11584 } 11585 11586 11587 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11685 11588 { 11686 11589 puDst->ai16[ 0] = RT_MAX(puSrc1->ai16[ 0], puSrc2->ai16[ 0]); … … 11692 11595 puDst->ai16[ 6] = RT_MAX(puSrc1->ai16[ 6], puSrc2->ai16[ 6]); 11693 11596 puDst->ai16[ 7] = RT_MAX(puSrc1->ai16[ 7], puSrc2->ai16[ 7]); 11694 RT_NOREF(pExtState); 11695 } 11696 11697 11698 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11699 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11597 } 11598 11599 11600 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11700 11601 { 11701 11602 puDst->ai16[ 0] = RT_MAX(puSrc1->ai16[ 0], puSrc2->ai16[ 0]); … … 11715 11616 puDst->ai16[14] = RT_MAX(puSrc1->ai16[14], puSrc2->ai16[14]); 11716 11617 puDst->ai16[15] = RT_MAX(puSrc1->ai16[15], puSrc2->ai16[15]); 11717 RT_NOREF(pExtState); 11718 } 11719 11720 11721 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11722 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11618 } 11619 11620 11621 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11723 11622 { 11724 11623 puDst->ai32[ 0] = RT_MAX(puSrc1->ai32[ 0], puSrc2->ai32[ 0]); … … 11726 11625 puDst->ai32[ 2] = RT_MAX(puSrc1->ai32[ 2], puSrc2->ai32[ 2]); 11727 11626 puDst->ai32[ 3] = RT_MAX(puSrc1->ai32[ 3], puSrc2->ai32[ 3]); 11728 RT_NOREF(pExtState); 11729 } 11730 11731 11732 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11733 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11627 } 11628 11629 11630 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmaxsd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11734 11631 { 11735 11632 puDst->ai32[ 0] = RT_MAX(puSrc1->ai32[ 0], puSrc2->ai32[ 0]); … … 11741 11638 puDst->ai32[ 6] = RT_MAX(puSrc1->ai32[ 6], puSrc2->ai32[ 6]); 11742 11639 puDst->ai32[ 7] = RT_MAX(puSrc1->ai32[ 7], puSrc2->ai32[ 7]); 11743 RT_NOREF(pExtState);11744 11640 } 11745 11641 … … 11818 11714 11819 11715 11820 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminub_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11821 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11716 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminub_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11822 11717 { 11823 11718 puDst->au8[ 0] = RT_MIN(puSrc1->au8[ 0], puSrc2->au8[ 0]); … … 11837 11732 puDst->au8[14] = RT_MIN(puSrc1->au8[14], puSrc2->au8[14]); 11838 11733 puDst->au8[15] = RT_MIN(puSrc1->au8[15], puSrc2->au8[15]); 11839 RT_NOREF(pExtState); 11840 } 11841 11842 11843 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminub_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11844 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11734 } 11735 11736 11737 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminub_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11845 11738 { 11846 11739 puDst->au8[ 0] = RT_MIN(puSrc1->au8[ 0], puSrc2->au8[ 0]); … … 11876 11769 puDst->au8[30] = RT_MIN(puSrc1->au8[30], puSrc2->au8[30]); 11877 11770 puDst->au8[31] = RT_MIN(puSrc1->au8[31], puSrc2->au8[31]); 11878 RT_NOREF(pExtState); 11879 } 11880 11881 11882 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminuw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11883 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11771 } 11772 11773 11774 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminuw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11884 11775 { 11885 11776 puDst->au16[ 0] = RT_MIN(puSrc1->au16[ 0], puSrc2->au16[ 0]); … … 11891 11782 puDst->au16[ 6] = RT_MIN(puSrc1->au16[ 6], puSrc2->au16[ 6]); 11892 11783 puDst->au16[ 7] = RT_MIN(puSrc1->au16[ 7], puSrc2->au16[ 7]); 11893 RT_NOREF(pExtState); 11894 } 11895 11896 11897 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminuw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11898 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11784 } 11785 11786 11787 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminuw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11899 11788 { 11900 11789 puDst->au16[ 0] = RT_MIN(puSrc1->au16[ 0], puSrc2->au16[ 0]); … … 11914 11803 puDst->au16[14] = RT_MIN(puSrc1->au16[14], puSrc2->au16[14]); 11915 11804 puDst->au16[15] = RT_MIN(puSrc1->au16[15], puSrc2->au16[15]); 11916 RT_NOREF(pExtState); 11917 } 11918 11919 11920 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminud_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 11921 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11805 } 11806 11807 11808 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminud_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11922 11809 { 11923 11810 puDst->au32[ 0] = RT_MIN(puSrc1->au32[ 0], puSrc2->au32[ 0]); … … 11925 11812 puDst->au32[ 2] = RT_MIN(puSrc1->au32[ 2], puSrc2->au32[ 2]); 11926 11813 puDst->au32[ 3] = RT_MIN(puSrc1->au32[ 3], puSrc2->au32[ 3]); 11927 RT_NOREF(pExtState); 11928 } 11929 11930 11931 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminud_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 11932 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11814 } 11815 11816 11817 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminud_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11933 11818 { 11934 11819 puDst->au32[ 0] = RT_MIN(puSrc1->au32[ 0], puSrc2->au32[ 0]); … … 11940 11825 puDst->au32[ 6] = RT_MIN(puSrc1->au32[ 6], puSrc2->au32[ 6]); 11941 11826 puDst->au32[ 7] = RT_MIN(puSrc1->au32[ 7], puSrc2->au32[ 7]); 11942 RT_NOREF(pExtState);11943 11827 } 11944 11828 … … 12013 11897 12014 11898 12015 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 12016 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11899 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 12017 11900 { 12018 11901 puDst->ai8[ 0] = RT_MIN(puSrc1->ai8[ 0], puSrc2->ai8[ 0]); … … 12032 11915 puDst->ai8[14] = RT_MIN(puSrc1->ai8[14], puSrc2->ai8[14]); 12033 11916 puDst->ai8[15] = RT_MIN(puSrc1->ai8[15], puSrc2->ai8[15]); 12034 RT_NOREF(pExtState); 12035 } 12036 12037 12038 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 12039 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11917 } 11918 11919 11920 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 12040 11921 { 12041 11922 puDst->ai8[ 0] = RT_MIN(puSrc1->ai8[ 0], puSrc2->ai8[ 0]); … … 12071 11952 puDst->ai8[30] = RT_MIN(puSrc1->ai8[30], puSrc2->ai8[30]); 12072 11953 puDst->ai8[31] = RT_MIN(puSrc1->ai8[31], puSrc2->ai8[31]); 12073 RT_NOREF(pExtState); 12074 } 12075 12076 12077 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 12078 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11954 } 11955 11956 11957 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 12079 11958 { 12080 11959 puDst->ai16[ 0] = RT_MIN(puSrc1->ai16[ 0], puSrc2->ai16[ 0]); … … 12086 11965 puDst->ai16[ 6] = RT_MIN(puSrc1->ai16[ 6], puSrc2->ai16[ 6]); 12087 11966 puDst->ai16[ 7] = RT_MIN(puSrc1->ai16[ 7], puSrc2->ai16[ 7]); 12088 RT_NOREF(pExtState); 12089 } 12090 12091 12092 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsw_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 12093 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11967 } 11968 11969 11970 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 12094 11971 { 12095 11972 puDst->ai16[ 0] = RT_MIN(puSrc1->ai16[ 0], puSrc2->ai16[ 0]); … … 12109 11986 puDst->ai16[14] = RT_MIN(puSrc1->ai16[14], puSrc2->ai16[14]); 12110 11987 puDst->ai16[15] = RT_MIN(puSrc1->ai16[15], puSrc2->ai16[15]); 12111 RT_NOREF(pExtState); 12112 } 12113 12114 12115 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsd_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 12116 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 11988 } 11989 11990 11991 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 12117 11992 { 12118 11993 puDst->ai32[ 0] = RT_MIN(puSrc1->ai32[ 0], puSrc2->ai32[ 0]); … … 12120 11995 puDst->ai32[ 2] = RT_MIN(puSrc1->ai32[ 2], puSrc2->ai32[ 2]); 12121 11996 puDst->ai32[ 3] = RT_MIN(puSrc1->ai32[ 3], puSrc2->ai32[ 3]); 12122 RT_NOREF(pExtState); 12123 } 12124 12125 12126 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsd_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 12127 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 11997 } 11998 11999 12000 IEM_DECL_IMPL_DEF(void, iemAImpl_vpminsd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 12128 12001 { 12129 12002 puDst->ai32[ 0] = RT_MIN(puSrc1->ai32[ 0], puSrc2->ai32[ 0]); … … 12135 12008 puDst->ai32[ 6] = RT_MIN(puSrc1->ai32[ 6], puSrc2->ai32[ 6]); 12136 12009 puDst->ai32[ 7] = RT_MIN(puSrc1->ai32[ 7], puSrc2->ai32[ 7]); 12137 RT_NOREF(pExtState);12138 12010 } 12139 12011 … … 12482 12354 12483 12355 12484 IEM_DECL_IMPL_DEF(void, iemAImpl_vpshufb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 12485 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 12356 IEM_DECL_IMPL_DEF(void, iemAImpl_vpshufb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 12486 12357 { 12487 12358 RTUINT128U const uSrc1 = *puSrc1; /* could be same as puDst */ … … 12496 12367 puDst->au8[iByte] = uSrc1.au8[(idxSrc & 15)]; 12497 12368 } 12498 RT_NOREF(pExtState); 12499 } 12500 12501 12502 IEM_DECL_IMPL_DEF(void, iemAImpl_vpshufb_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 12503 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 12369 } 12370 12371 12372 IEM_DECL_IMPL_DEF(void, iemAImpl_vpshufb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 12504 12373 { 12505 12374 RTUINT256U const uSrc1 = *puSrc1; /* could be same as puDst */ … … 12522 12391 puDst->au8[iByte] = uSrc1.au8[(idxSrc & 15) + 16]; /* baka intel */ 12523 12392 } 12524 RT_NOREF(pExtState);12525 12393 } 12526 12394 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstCommon.cpp.h
r104018 r104132 692 692 # ifndef IEM_WITHOUT_ASSEMBLY 693 693 /** Function table for the VPXOR instruction */ 694 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpand = { iemAImpl_vpand_u128, iemAImpl_vpand_u256 };694 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpand = { iemAImpl_vpand_u128, iemAImpl_vpand_u256 }; 695 695 /** Function table for the VPXORN instruction */ 696 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpandn = { iemAImpl_vpandn_u128, iemAImpl_vpandn_u256 };696 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpandn = { iemAImpl_vpandn_u128, iemAImpl_vpandn_u256 }; 697 697 /** Function table for the VPOR instruction */ 698 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpor = { iemAImpl_vpor_u128, iemAImpl_vpor_u256 };698 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpor = { iemAImpl_vpor_u128, iemAImpl_vpor_u256 }; 699 699 /** Function table for the VPXOR instruction */ 700 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpxor = { iemAImpl_vpxor_u128, iemAImpl_vpxor_u256 };700 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpxor = { iemAImpl_vpxor_u128, iemAImpl_vpxor_u256 }; 701 701 # endif 702 702 703 703 /** Function table for the VPAND instruction, software fallback. */ 704 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpand_fallback = { iemAImpl_vpand_u128_fallback, iemAImpl_vpand_u256_fallback };704 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpand_fallback = { iemAImpl_vpand_u128_fallback, iemAImpl_vpand_u256_fallback }; 705 705 /** Function table for the VPANDN instruction, software fallback. */ 706 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpandn_fallback= { iemAImpl_vpandn_u128_fallback, iemAImpl_vpandn_u256_fallback };706 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpandn_fallback= { iemAImpl_vpandn_u128_fallback, iemAImpl_vpandn_u256_fallback }; 707 707 /** Function table for the VPOR instruction, software fallback. */ 708 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpor_fallback = { iemAImpl_vpor_u128_fallback, iemAImpl_vpor_u256_fallback };708 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpor_fallback = { iemAImpl_vpor_u128_fallback, iemAImpl_vpor_u256_fallback }; 709 709 /** Function table for the VPXOR instruction, software fallback. */ 710 IEM_STATIC const IEMOPMEDIA F3 g_iemAImpl_vpxor_fallback = { iemAImpl_vpxor_u128_fallback, iemAImpl_vpxor_u256_fallback };710 IEM_STATIC const IEMOPMEDIAOPTF3 g_iemAImpl_vpxor_fallback = { iemAImpl_vpxor_u128_fallback, iemAImpl_vpxor_u256_fallback }; 711 711 712 712 #endif /* !TST_IEM_CHECK_MC */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h
r104129 r104132 34 34 */ 35 35 36 #if 0 /*Unused*/ 36 37 /** 37 38 * Common worker for AVX2 instructions on the forms: … … 149 150 } 150 151 } 151 152 #endif 152 153 153 154 /** … … 2739 2740 { 2740 2741 IEMOP_MNEMONIC3(VEX_RVM, VANDPS, vandps, Vps, Hps, Wps, DISOPTYPE_HARMLESS, 0); 2741 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2742 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2742 2743 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpand, &g_iemAImpl_vpand_fallback)); 2743 2744 } … … 2748 2749 { 2749 2750 IEMOP_MNEMONIC3(VEX_RVM, VANDPD, vandpd, Vpd, Hpd, Wpd, DISOPTYPE_HARMLESS, 0); 2750 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2751 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2751 2752 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpand, &g_iemAImpl_vpand_fallback)); 2752 2753 } … … 2761 2762 { 2762 2763 IEMOP_MNEMONIC3(VEX_RVM, VANDNPS, vandnps, Vps, Hps, Wps, DISOPTYPE_HARMLESS, 0); 2763 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2764 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2764 2765 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpandn, &g_iemAImpl_vpandn_fallback)); 2765 2766 } … … 2770 2771 { 2771 2772 IEMOP_MNEMONIC3(VEX_RVM, VANDNPD, vandnpd, Vpd, Hpd, Wpd, DISOPTYPE_HARMLESS, 0); 2772 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2773 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2773 2774 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpandn, &g_iemAImpl_vpandn_fallback)); 2774 2775 } … … 2782 2783 { 2783 2784 IEMOP_MNEMONIC3(VEX_RVM, VORPS, vorps, Vps, Hps, Wps, DISOPTYPE_HARMLESS, 0); 2784 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2785 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2785 2786 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpor, &g_iemAImpl_vpor_fallback)); 2786 2787 } … … 2791 2792 { 2792 2793 IEMOP_MNEMONIC3(VEX_RVM, VORPD, vorpd, Vpd, Hpd, Wpd, DISOPTYPE_HARMLESS, 0); 2793 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2794 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2794 2795 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpor, &g_iemAImpl_vpor_fallback)); 2795 2796 } … … 2804 2805 { 2805 2806 IEMOP_MNEMONIC3(VEX_RVM, VXORPS, vxorps, Vps, Hps, Wps, DISOPTYPE_HARMLESS, 0); 2806 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2807 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2807 2808 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpxor, &g_iemAImpl_vpxor_fallback)); 2808 2809 } … … 2813 2814 { 2814 2815 IEMOP_MNEMONIC3(VEX_RVM, VXORPD, vxorpd, Vpd, Hpd, Wpd, DISOPTYPE_HARMLESS, 0); 2815 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,2816 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 2816 2817 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpxor, &g_iemAImpl_vpxor_fallback)); 2817 2818 } … … 2959 2960 { 2960 2961 IEMOP_MNEMONIC3(VEX_RVM, VPCMPGTB, vpcmpgtb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 2961 IEMOPMEDIA F3_INIT_VARS(vpcmpgtb);2962 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));2962 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpgtb); 2963 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 2963 2964 } 2964 2965 … … 2973 2974 { 2974 2975 IEMOP_MNEMONIC3(VEX_RVM, VPCMPGTW, vpcmpgtw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 2975 IEMOPMEDIA F3_INIT_VARS(vpcmpgtw);2976 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));2976 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpgtw); 2977 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 2977 2978 } 2978 2979 … … 2987 2988 { 2988 2989 IEMOP_MNEMONIC3(VEX_RVM, VPCMPGTD, vpcmpgtd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 2989 IEMOPMEDIA F3_INIT_VARS(vpcmpgtd);2990 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));2990 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpgtd); 2991 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 2991 2992 } 2992 2993 … … 3861 3862 { 3862 3863 IEMOP_MNEMONIC3(VEX_RVM, VPCMPEQB, vpcmpeqb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 3863 IEMOPMEDIA F3_INIT_VARS(vpcmpeqb);3864 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));3864 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpeqb); 3865 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 3865 3866 } 3866 3867 … … 3876 3877 { 3877 3878 IEMOP_MNEMONIC3(VEX_RVM, VPCMPEQW, vpcmpeqw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 3878 IEMOPMEDIA F3_INIT_VARS(vpcmpeqw);3879 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));3879 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpeqw); 3880 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 3880 3881 } 3881 3882 … … 3892 3893 { 3893 3894 IEMOP_MNEMONIC3(VEX_RVM, VPCMPEQD, vpcmpeqd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 3894 IEMOPMEDIA F3_INIT_VARS(vpcmpeqd);3895 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));3895 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpeqd); 3896 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 3896 3897 } 3897 3898 … … 4844 4845 { 4845 4846 IEMOP_MNEMONIC3(VEX_RVM, VPADDQ, vpaddq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 4846 IEMOPMEDIA F3_INIT_VARS(vpaddq);4847 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));4847 IEMOPMEDIAOPTF3_INIT_VARS( vpaddq); 4848 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 4848 4849 } 4849 4850 … … 5011 5012 { 5012 5013 IEMOP_MNEMONIC3(VEX_RVM, VPMINUB, vpminub, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5013 IEMOPMEDIA F3_INIT_VARS(vpminub);5014 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5014 IEMOPMEDIAOPTF3_INIT_VARS(vpminub); 5015 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5015 5016 } 5016 5017 … … 5026 5027 { 5027 5028 IEMOP_MNEMONIC3(VEX_RVM, VPAND, vpand, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5028 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,5029 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 5029 5030 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpand, &g_iemAImpl_vpand_fallback)); 5030 5031 } … … 5071 5072 { 5072 5073 IEMOP_MNEMONIC3(VEX_RVM, VPMAXUB, vpmaxub, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5073 IEMOPMEDIA F3_INIT_VARS(vpmaxub);5074 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5074 IEMOPMEDIAOPTF3_INIT_VARS(vpmaxub); 5075 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5075 5076 } 5076 5077 … … 5086 5087 { 5087 5088 IEMOP_MNEMONIC3(VEX_RVM, VPANDN, vpandn, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5088 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,5089 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 5089 5090 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpandn, &g_iemAImpl_vpandn_fallback)); 5090 5091 } … … 5302 5303 { 5303 5304 IEMOP_MNEMONIC3(VEX_RVM, VPMINSW, vpminsw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5304 IEMOPMEDIA F3_INIT_VARS(vpminsw);5305 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5305 IEMOPMEDIAOPTF3_INIT_VARS(vpminsw); 5306 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5306 5307 } 5307 5308 … … 5317 5318 { 5318 5319 IEMOP_MNEMONIC3(VEX_RVM, VPOR, vpor, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5319 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,5320 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 5320 5321 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpor, &g_iemAImpl_vpor_fallback)); 5321 5322 } … … 5363 5364 { 5364 5365 IEMOP_MNEMONIC3(VEX_RVM, VPMAXSW, vpmaxsw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5365 IEMOPMEDIA F3_INIT_VARS(vpmaxsw);5366 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5366 IEMOPMEDIAOPTF3_INIT_VARS(vpmaxsw); 5367 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5367 5368 } 5368 5369 … … 5379 5380 { 5380 5381 IEMOP_MNEMONIC3(VEX_RVM, VPXOR, vpxor, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5381 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx ,5382 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, 5382 5383 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpxor, &g_iemAImpl_vpxor_fallback)); 5383 5384 } … … 5532 5533 { 5533 5534 IEMOP_MNEMONIC3(VEX_RVM, VPSUBB, vpsubb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5534 IEMOPMEDIA F3_INIT_VARS( vpsubb);5535 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5535 IEMOPMEDIAOPTF3_INIT_VARS( vpsubb); 5536 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5536 5537 } 5537 5538 … … 5546 5547 { 5547 5548 IEMOP_MNEMONIC3(VEX_RVM, VPSUBW, vpsubw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5548 IEMOPMEDIA F3_INIT_VARS( vpsubw);5549 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5549 IEMOPMEDIAOPTF3_INIT_VARS( vpsubw); 5550 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5550 5551 } 5551 5552 … … 5560 5561 { 5561 5562 IEMOP_MNEMONIC3(VEX_RVM, VPSUBD, vpsubd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5562 IEMOPMEDIA F3_INIT_VARS( vpsubd);5563 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5563 IEMOPMEDIAOPTF3_INIT_VARS( vpsubd); 5564 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5564 5565 } 5565 5566 … … 5574 5575 { 5575 5576 IEMOP_MNEMONIC3(VEX_RVM, VPSUBQ, vpsubq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5576 IEMOPMEDIA F3_INIT_VARS( vpsubq);5577 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5577 IEMOPMEDIAOPTF3_INIT_VARS( vpsubq); 5578 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5578 5579 } 5579 5580 … … 5588 5589 { 5589 5590 IEMOP_MNEMONIC3(VEX_RVM, VPADDB, vpaddb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5590 IEMOPMEDIA F3_INIT_VARS( vpaddb);5591 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5591 IEMOPMEDIAOPTF3_INIT_VARS( vpaddb); 5592 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5592 5593 } 5593 5594 … … 5602 5603 { 5603 5604 IEMOP_MNEMONIC3(VEX_RVM, VPADDW, vpaddw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5604 IEMOPMEDIA F3_INIT_VARS( vpaddw);5605 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5605 IEMOPMEDIAOPTF3_INIT_VARS( vpaddw); 5606 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5606 5607 } 5607 5608 … … 5616 5617 { 5617 5618 IEMOP_MNEMONIC3(VEX_RVM, VPADDD, vpaddd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 5618 IEMOPMEDIA F3_INIT_VARS( vpaddd);5619 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));5619 IEMOPMEDIAOPTF3_INIT_VARS( vpaddd); 5620 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 5620 5621 } 5621 5622 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h
r104113 r104132 41 41 { 42 42 IEMOP_MNEMONIC3(VEX_RVM, VPSHUFB, vpshufb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 43 IEMOPMEDIA F3_INIT_VARS(vpshufb);44 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));43 IEMOPMEDIAOPTF3_INIT_VARS( vpshufb); 44 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 45 45 } 46 46 … … 727 727 { 728 728 IEMOP_MNEMONIC3(VEX_RVM, VPCMPEQQ, vpcmpeqq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 729 IEMOPMEDIA F3_INIT_VARS(vpcmpeqq);730 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));729 IEMOPMEDIAOPTF3_INIT_VARS(vpcmpeqq); 730 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 731 731 } 732 732 … … 897 897 { 898 898 IEMOP_MNEMONIC3(VEX_RVM, VPCMPGTQ, vpcmpgtq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 899 IEMOPMEDIA F3_INIT_VARS(vpcmpgtq);900 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));899 IEMOPMEDIAOPTF3_INIT_VARS( vpcmpgtq); 900 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 901 901 } 902 902 … … 906 906 { 907 907 IEMOP_MNEMONIC3(VEX_RVM, VPMINSB, vpminsb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 908 IEMOPMEDIA F3_INIT_VARS(vpminsb);909 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));908 IEMOPMEDIAOPTF3_INIT_VARS( vpminsb); 909 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 910 910 } 911 911 … … 915 915 { 916 916 IEMOP_MNEMONIC3(VEX_RVM, VPMINSD, vpminsd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 917 IEMOPMEDIA F3_INIT_VARS(vpminsd);918 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));917 IEMOPMEDIAOPTF3_INIT_VARS( vpminsd); 918 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 919 919 } 920 920 … … 924 924 { 925 925 IEMOP_MNEMONIC3(VEX_RVM, VPMINUW, vpminuw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 926 IEMOPMEDIA F3_INIT_VARS(vpminuw);927 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));926 IEMOPMEDIAOPTF3_INIT_VARS( vpminuw); 927 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 928 928 } 929 929 … … 933 933 { 934 934 IEMOP_MNEMONIC3(VEX_RVM, VPMINUD, vpminud, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 935 IEMOPMEDIA F3_INIT_VARS(vpminud);936 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));935 IEMOPMEDIAOPTF3_INIT_VARS( vpminud); 936 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 937 937 } 938 938 … … 942 942 { 943 943 IEMOP_MNEMONIC3(VEX_RVM, VPMAXSB, vpmaxsb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 944 IEMOPMEDIA F3_INIT_VARS(vpmaxsb);945 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));944 IEMOPMEDIAOPTF3_INIT_VARS( vpmaxsb); 945 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 946 946 } 947 947 … … 951 951 { 952 952 IEMOP_MNEMONIC3(VEX_RVM, VPMAXSD, vpmaxsd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 953 IEMOPMEDIA F3_INIT_VARS(vpmaxsd);954 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));953 IEMOPMEDIAOPTF3_INIT_VARS( vpmaxsd); 954 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 955 955 } 956 956 … … 960 960 { 961 961 IEMOP_MNEMONIC3(VEX_RVM, VPMAXUW, vpmaxuw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 962 IEMOPMEDIA F3_INIT_VARS(vpmaxuw);963 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));962 IEMOPMEDIAOPTF3_INIT_VARS( vpmaxuw); 963 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 964 964 } 965 965 … … 969 969 { 970 970 IEMOP_MNEMONIC3(VEX_RVM, VPMAXUD, vpmaxud, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 971 IEMOPMEDIA F3_INIT_VARS(vpmaxud);972 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx , IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));971 IEMOPMEDIAOPTF3_INIT_VARS( vpmaxud); 972 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback)); 973 973 } 974 974 -
trunk/src/VBox/VMM/include/IEMInternal.h
r104129 r104132 3319 3319 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phminposuw_u128, iemAImpl_phminposuw_u128_fallback; 3320 3320 3321 FNIEMAIMPLMEDIA F3U128iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback;3322 FNIEMAIMPLMEDIA F3U128iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback;3323 FNIEMAIMPLMEDIA F3U128iemAImpl_vpandn_u128, iemAImpl_vpandn_u128_fallback;3324 FNIEMAIMPLMEDIA F3U128iemAImpl_vpor_u128, iemAImpl_vpor_u128_fallback;3325 FNIEMAIMPLMEDIA F3U128iemAImpl_vpxor_u128, iemAImpl_vpxor_u128_fallback;3326 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpeqb_u128, iemAImpl_vpcmpeqb_u128_fallback;3327 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback;3328 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback;3329 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback;3330 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback;3331 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback;3332 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback;3333 FNIEMAIMPLMEDIA F3U128iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback;3334 FNIEMAIMPLMEDIA F3U128iemAImpl_vpaddb_u128, iemAImpl_vpaddb_u128_fallback;3335 FNIEMAIMPLMEDIA F3U128iemAImpl_vpaddw_u128, iemAImpl_vpaddw_u128_fallback;3336 FNIEMAIMPLMEDIA F3U128iemAImpl_vpaddd_u128, iemAImpl_vpaddd_u128_fallback;3337 FNIEMAIMPLMEDIA F3U128iemAImpl_vpaddq_u128, iemAImpl_vpaddq_u128_fallback;3338 FNIEMAIMPLMEDIA F3U128iemAImpl_vpsubb_u128, iemAImpl_vpsubb_u128_fallback;3339 FNIEMAIMPLMEDIA F3U128iemAImpl_vpsubw_u128, iemAImpl_vpsubw_u128_fallback;3340 FNIEMAIMPLMEDIA F3U128iemAImpl_vpsubd_u128, iemAImpl_vpsubd_u128_fallback;3341 FNIEMAIMPLMEDIA F3U128iemAImpl_vpsubq_u128, iemAImpl_vpsubq_u128_fallback;3342 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminub_u128, iemAImpl_vpminub_u128_fallback;3343 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminuw_u128, iemAImpl_vpminuw_u128_fallback;3344 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminud_u128, iemAImpl_vpminud_u128_fallback;3345 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminsb_u128, iemAImpl_vpminsb_u128_fallback;3346 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminsw_u128, iemAImpl_vpminsw_u128_fallback;3347 FNIEMAIMPLMEDIA F3U128iemAImpl_vpminsd_u128, iemAImpl_vpminsd_u128_fallback;3348 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxub_u128, iemAImpl_vpmaxub_u128_fallback;3349 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxuw_u128, iemAImpl_vpmaxuw_u128_fallback;3350 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxud_u128, iemAImpl_vpmaxud_u128_fallback;3351 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxsb_u128, iemAImpl_vpmaxsb_u128_fallback;3352 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxsw_u128, iemAImpl_vpmaxsw_u128_fallback;3353 FNIEMAIMPLMEDIA F3U128iemAImpl_vpmaxsd_u128, iemAImpl_vpmaxsd_u128_fallback;3321 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback; 3322 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback; 3323 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpandn_u128, iemAImpl_vpandn_u128_fallback; 3324 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpor_u128, iemAImpl_vpor_u128_fallback; 3325 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpxor_u128, iemAImpl_vpxor_u128_fallback; 3326 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpeqb_u128, iemAImpl_vpcmpeqb_u128_fallback; 3327 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback; 3328 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback; 3329 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback; 3330 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback; 3331 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback; 3332 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback; 3333 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback; 3334 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddb_u128, iemAImpl_vpaddb_u128_fallback; 3335 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddw_u128, iemAImpl_vpaddw_u128_fallback; 3336 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddd_u128, iemAImpl_vpaddd_u128_fallback; 3337 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddq_u128, iemAImpl_vpaddq_u128_fallback; 3338 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubb_u128, iemAImpl_vpsubb_u128_fallback; 3339 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubw_u128, iemAImpl_vpsubw_u128_fallback; 3340 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubd_u128, iemAImpl_vpsubd_u128_fallback; 3341 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubq_u128, iemAImpl_vpsubq_u128_fallback; 3342 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminub_u128, iemAImpl_vpminub_u128_fallback; 3343 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminuw_u128, iemAImpl_vpminuw_u128_fallback; 3344 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminud_u128, iemAImpl_vpminud_u128_fallback; 3345 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminsb_u128, iemAImpl_vpminsb_u128_fallback; 3346 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminsw_u128, iemAImpl_vpminsw_u128_fallback; 3347 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpminsd_u128, iemAImpl_vpminsd_u128_fallback; 3348 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxub_u128, iemAImpl_vpmaxub_u128_fallback; 3349 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxuw_u128, iemAImpl_vpmaxuw_u128_fallback; 3350 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxud_u128, iemAImpl_vpmaxud_u128_fallback; 3351 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxsb_u128, iemAImpl_vpmaxsb_u128_fallback; 3352 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxsw_u128, iemAImpl_vpmaxsw_u128_fallback; 3353 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaxsd_u128, iemAImpl_vpmaxsd_u128_fallback; 3354 3354 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpacksswb_u128, iemAImpl_vpacksswb_u128_fallback; 3355 3355 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackssdw_u128, iemAImpl_vpackssdw_u128_fallback; … … 3399 3399 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vphminposuw_u128, iemAImpl_vphminposuw_u128_fallback; 3400 3400 3401 FNIEMAIMPLMEDIA F3U256iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback;3402 FNIEMAIMPLMEDIA F3U256iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback;3403 FNIEMAIMPLMEDIA F3U256iemAImpl_vpandn_u256, iemAImpl_vpandn_u256_fallback;3404 FNIEMAIMPLMEDIA F3U256iemAImpl_vpor_u256, iemAImpl_vpor_u256_fallback;3405 FNIEMAIMPLMEDIA F3U256iemAImpl_vpxor_u256, iemAImpl_vpxor_u256_fallback;3406 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpeqb_u256, iemAImpl_vpcmpeqb_u256_fallback;3407 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback;3408 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback;3409 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback;3410 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback;3411 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback;3412 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback;3413 FNIEMAIMPLMEDIA F3U256iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback;3414 FNIEMAIMPLMEDIA F3U256iemAImpl_vpaddb_u256, iemAImpl_vpaddb_u256_fallback;3415 FNIEMAIMPLMEDIA F3U256iemAImpl_vpaddw_u256, iemAImpl_vpaddw_u256_fallback;3416 FNIEMAIMPLMEDIA F3U256iemAImpl_vpaddd_u256, iemAImpl_vpaddd_u256_fallback;3417 FNIEMAIMPLMEDIA F3U256iemAImpl_vpaddq_u256, iemAImpl_vpaddq_u256_fallback;3418 FNIEMAIMPLMEDIA F3U256iemAImpl_vpsubb_u256, iemAImpl_vpsubb_u256_fallback;3419 FNIEMAIMPLMEDIA F3U256iemAImpl_vpsubw_u256, iemAImpl_vpsubw_u256_fallback;3420 FNIEMAIMPLMEDIA F3U256iemAImpl_vpsubd_u256, iemAImpl_vpsubd_u256_fallback;3421 FNIEMAIMPLMEDIA F3U256iemAImpl_vpsubq_u256, iemAImpl_vpsubq_u256_fallback;3422 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminub_u256, iemAImpl_vpminub_u256_fallback;3423 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminuw_u256, iemAImpl_vpminuw_u256_fallback;3424 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminud_u256, iemAImpl_vpminud_u256_fallback;3425 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminsb_u256, iemAImpl_vpminsb_u256_fallback;3426 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminsw_u256, iemAImpl_vpminsw_u256_fallback;3427 FNIEMAIMPLMEDIA F3U256iemAImpl_vpminsd_u256, iemAImpl_vpminsd_u256_fallback;3428 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxub_u256, iemAImpl_vpmaxub_u256_fallback;3429 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxuw_u256, iemAImpl_vpmaxuw_u256_fallback;3430 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxud_u256, iemAImpl_vpmaxud_u256_fallback;3431 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxsb_u256, iemAImpl_vpmaxsb_u256_fallback;3432 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxsw_u256, iemAImpl_vpmaxsw_u256_fallback;3433 FNIEMAIMPLMEDIA F3U256iemAImpl_vpmaxsd_u256, iemAImpl_vpmaxsd_u256_fallback;3401 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback; 3402 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback; 3403 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpandn_u256, iemAImpl_vpandn_u256_fallback; 3404 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpor_u256, iemAImpl_vpor_u256_fallback; 3405 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpxor_u256, iemAImpl_vpxor_u256_fallback; 3406 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpeqb_u256, iemAImpl_vpcmpeqb_u256_fallback; 3407 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback; 3408 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback; 3409 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback; 3410 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback; 3411 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback; 3412 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback; 3413 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback; 3414 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddb_u256, iemAImpl_vpaddb_u256_fallback; 3415 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddw_u256, iemAImpl_vpaddw_u256_fallback; 3416 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddd_u256, iemAImpl_vpaddd_u256_fallback; 3417 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddq_u256, iemAImpl_vpaddq_u256_fallback; 3418 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubb_u256, iemAImpl_vpsubb_u256_fallback; 3419 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubw_u256, iemAImpl_vpsubw_u256_fallback; 3420 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubd_u256, iemAImpl_vpsubd_u256_fallback; 3421 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubq_u256, iemAImpl_vpsubq_u256_fallback; 3422 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminub_u256, iemAImpl_vpminub_u256_fallback; 3423 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminuw_u256, iemAImpl_vpminuw_u256_fallback; 3424 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminud_u256, iemAImpl_vpminud_u256_fallback; 3425 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminsb_u256, iemAImpl_vpminsb_u256_fallback; 3426 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminsw_u256, iemAImpl_vpminsw_u256_fallback; 3427 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpminsd_u256, iemAImpl_vpminsd_u256_fallback; 3428 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxub_u256, iemAImpl_vpmaxub_u256_fallback; 3429 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxuw_u256, iemAImpl_vpmaxuw_u256_fallback; 3430 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxud_u256, iemAImpl_vpmaxud_u256_fallback; 3431 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxsb_u256, iemAImpl_vpmaxsb_u256_fallback; 3432 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxsw_u256, iemAImpl_vpmaxsw_u256_fallback; 3433 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaxsd_u256, iemAImpl_vpmaxsd_u256_fallback; 3434 3434 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpacksswb_u256, iemAImpl_vpacksswb_u256_fallback; 3435 3435 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackssdw_u256, iemAImpl_vpackssdw_u256_fallback;
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