Changeset 104155 in vbox for trunk

Timestamp:

Apr 4, 2024 10:47:23 AM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement native emitters for IEM_MC_CLEAR_EFL_BIT(), IEM_MC_FLIP_EFL_BIT() and IEM_MC_SET_EFL_BIT(), bugref:10371

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllInstPython.py (modified) (3 diffs)
• VMMAll/IEMAllN8veLiveness.cpp (modified) (1 diff)
• VMMAll/IEMAllN8veRecompFuncs.h (modified) (1 diff)
• include/IEMN8veRecompilerEmit.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

@@ -3013 +3013 @@
     'IEM_MC_CALL_VOID_AIMPL_3':                                  (McBlock.parseMcCallVoidAImpl,     True,  True,  True,  ),
     'IEM_MC_CALL_VOID_AIMPL_4':                                  (McBlock.parseMcCallVoidAImpl,     True,  True,  True,  ),
-    'IEM_MC_CLEAR_EFL_BIT':                                      (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_CLEAR_EFL_BIT':                                      (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_CLEAR_FSW_EX':                                       (McBlock.parseMcGeneric,           True,  True,  False, ),
     'IEM_MC_CLEAR_HIGH_GREG_U64':                                (McBlock.parseMcGeneric,           True,  True,  True,  ),
@@ -3124 +3124 @@
     'IEM_MC_FETCH_YREG_U32':                                     (McBlock.parseMcGeneric,           False, False, g_fNativeSimd),
     'IEM_MC_FETCH_YREG_U64':                                     (McBlock.parseMcGeneric,           False, False, g_fNativeSimd),
-    'IEM_MC_FLIP_EFL_BIT':                                       (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_FLIP_EFL_BIT':                                       (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_FPU_FROM_MMX_MODE':                                  (McBlock.parseMcGeneric,           True,  True,  False, ),
     'IEM_MC_FPU_STACK_DEC_TOP':                                  (McBlock.parseMcGeneric,           True,  True,  False, ),
@@ -3297 +3297 @@
     'IEM_MC_SAR_LOCAL_S32':                                      (McBlock.parseMcGeneric,           False, False, True,  ),
     'IEM_MC_SAR_LOCAL_S64':                                      (McBlock.parseMcGeneric,           False, False, True,  ),
-    'IEM_MC_SET_EFL_BIT':                                        (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_SET_EFL_BIT':                                        (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_SET_FPU_RESULT':                                     (McBlock.parseMcGeneric,           True,  True,  False, ),
     'IEM_MC_SET_RIP_U16_AND_FINISH':                             (McBlock.parseMcGeneric,           True,  True,  False, ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp

@@ -646 +646 @@
         if ((a_fBit) == X86_EFL_CF)      IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
         else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
-        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
+        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
     } while (0)
 #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \
         if ((a_fBit) == X86_EFL_CF)      IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
         else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
-        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAG_INPUT(); } \
+        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
     } while (0)
 #define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \
         if ((a_fBit) == X86_EFL_CF)      IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \
-        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAG_MODIFY(); } \
+        else { AssertFailed();           IEM_LIVENESS_ALL_EFLAGS_MODIFY(); } \
     } while (0)
 

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

@@ -4144 +4144 @@
 }
 
+
+typedef enum IEMNATIVEMITEFLOP
+{
+    kIemNativeEmitEflOp_Invalid = 0,
+    kIemNativeEmitEflOp_Set,
+    kIemNativeEmitEflOp_Clear,
+    kIemNativeEmitEflOp_Flip
+} IEMNATIVEMITEFLOP;
+
+#define IEM_MC_SET_EFL_BIT(a_fBit) \
+    off = iemNativeEmitModifyEFlagsBit(pReNative, off, a_fBit, kIemNativeEmitEflOp_Set);
+
+#define IEM_MC_CLEAR_EFL_BIT(a_fBit) \
+    off = iemNativeEmitModifyEFlagsBit(pReNative, off, a_fBit, kIemNativeEmitEflOp_Clear);
+
+#define IEM_MC_FLIP_EFL_BIT(a_fBit) \
+    off = iemNativeEmitModifyEFlagsBit(pReNative, off, a_fBit, kIemNativeEmitEflOp_Flip);
+
+/** Handles IEM_MC_SET_EFL_BIT/IEM_MC_CLEAR_EFL_BIT/IEM_MC_FLIP_EFL_BIT. */
+DECL_INLINE_THROW(uint32_t) iemNativeEmitModifyEFlagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fEflBit, IEMNATIVEMITEFLOP enmOp)
+{
+    uint8_t const idxEflReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_EFlags,
+                                                              kIemNativeGstRegUse_ForUpdate, false /*fNoVolatileRegs*/);
+
+    switch (enmOp)
+    {
+        case kIemNativeEmitEflOp_Set:
+            off = iemNativeEmitOrGpr32ByImm(pReNative, off, idxEflReg, fEflBit);
+            break;
+        case kIemNativeEmitEflOp_Clear:
+            off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxEflReg, ~fEflBit);
+            break;
+        case kIemNativeEmitEflOp_Flip:
+            off = iemNativeEmitXorGpr32ByImm(pReNative, off, idxEflReg, fEflBit);
+            break;
+        default:
+            AssertFailed();
+            break;
+    }
+
+    /** @todo No delayed writeback for EFLAGS right now. */
+    off = iemNativeEmitStoreGprToVCpuU32(pReNative, off, idxEflReg, RT_UOFFSETOF(VMCPU, cpum.GstCtx.eflags));
+
+    /* Free but don't flush the EFLAGS register. */
+    iemNativeRegFreeTmp(pReNative, idxEflReg);
+
+    return off;
+}
 
 

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -5435 +5435 @@
 
 
+/**
+ * Emits code for XOR'ing two 32-bit GPRs.
+ */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitXorGpr32ByImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprDst, uint32_t uImm)
+{
+#if defined(RT_ARCH_AMD64)
+    off = iemNativeEmitXorGpr32ByImmEx(iemNativeInstrBufEnsure(pReNative, off, 7), off, iGprDst, uImm);
+#elif defined(RT_ARCH_ARM64)
+    off = iemNativeEmitXorGpr32ByImmEx(iemNativeInstrBufEnsure(pReNative, off, 1), off, iGprDst, uImm);
+#else
+# error "Port me"
+#endif
+    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
+    return off;
+}
+
+
 /*********************************************************************************************************************************
 *   Shifting                                                                                                                     *