- Timestamp:
- Apr 4, 2024 12:05:54 PM (10 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
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VMMAll/IEMAllAImpl.asm (modified) (9 diffs)
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VMMAll/IEMAllAImplC.cpp (modified) (6 diffs)
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VMMAll/IEMAllInstThree0f3a.cpp.h (modified) (9 diffs)
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VMMAll/IEMAllInstTwoByte0f.cpp.h (modified) (10 diffs)
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include/IEMInternal.h (modified) (1 diff)
-
testcase/tstIEMAImpl.cpp (modified) (12 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r104150 r104156 6385 6385 ; CMPPS (SSE) 6386 6386 ; 6387 ; @param A0 Pointer to the MXCSR value (input/output). 6387 ; @return R0_32 The new MXCSR value of the guest. 6388 ; @param A0_32 The guest's MXCSR register value to use (input). 6388 6389 ; @param A1 Pointer to the first media register size operand (output). 6389 6390 ; @param A2 Pointer to the two media register sized inputs - IEMMEDIAF2XMMSRC (input). … … 6393 6394 PROLOGUE_4_ARGS 6394 6395 IEMIMPL_SSE_PROLOGUE 6395 SSE_ LD_FXSTATE_MXCSR_ONLY A06396 SSE_AVX_LD_MXCSR A0_32 6396 6397 6397 6398 movzx A3, A3_8 ; must clear top bits … … 6409 6410 movdqu [A1], xmm0 6410 6411 6411 SSE_ ST_FXSTATE_MXCSR_ONLY_NO_FXSTATE A06412 SSE_AVX_ST_MXCSR R0_32, A0_32 6412 6413 IEMIMPL_SSE_EPILOGUE 6413 6414 EPILOGUE_4_ARGS … … 6431 6432 ; @param 1 The instruction name. 6432 6433 ; 6433 ; @param A0 Pointer to the MXCSR value (input/output). 6434 ; @return R0_32 The new MXCSR value of the guest. 6435 ; @param A0_32 The guest's MXCSR register value to use (input). 6434 6436 ; @param A1 Pointer to the first media register size operand (output). 6435 6437 ; @param A2 Pointer to the two media register sized inputs - IEMMEDIAF2XMMSRC (input). … … 6440 6442 PROLOGUE_4_ARGS 6441 6443 IEMIMPL_SSE_PROLOGUE 6442 SSE_ LD_FXSTATE_MXCSR_ONLY A06444 SSE_AVX_LD_MXCSR A0_32 6443 6445 6444 6446 movzx A3, A3_8 ; must clear top bits … … 6456 6458 movdqu [A1], xmm0 6457 6459 6458 SSE_ ST_FXSTATE_MXCSR_ONLY_NO_FXSTATE A06460 SSE_AVX_ST_MXCSR R0_32, A0_32 6459 6461 IEMIMPL_SSE_EPILOGUE 6460 6462 EPILOGUE_4_ARGS … … 6483 6485 ; @param 1 The instruction name. 6484 6486 ; 6485 ; @param A0 Pointer to the MXCSR value (input/output). 6487 ; @return R0_32 The new MXCSR value of the guest. 6488 ; @param A0_32 The guest's MXCSR register value to use (input). 6486 6489 ; @param A1 Pointer to the first media register size operand (output). 6487 6490 ; @param A2 Pointer to the two media register sized inputs - IEMMEDIAF2XMMSRC (input). … … 6492 6495 PROLOGUE_4_ARGS 6493 6496 IEMIMPL_SSE_PROLOGUE 6494 SSE_ LD_FXSTATE_MXCSR_ONLY A06497 SSE_AVX_LD_MXCSR A0_32 6495 6498 6496 6499 movzx A3, A3_8 ; must clear top bits … … 6508 6511 movdqu [A1], xmm0 6509 6512 6510 SSE_ ST_FXSTATE_MXCSR_ONLY_NO_FXSTATE A06513 SSE_AVX_ST_MXCSR R0_32, A0_32 6511 6514 IEMIMPL_SSE_EPILOGUE 6512 6515 EPILOGUE_4_ARGS -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r104150 r104156 18475 18475 18476 18476 18477 IEM_DECL_IMPL_DEF( void, iemAImpl_cmpps_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil))18477 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_cmpps_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18478 18478 { 18479 18479 for (uint8_t i = 0; i < RT_ELEMENTS(puDst->ar32); i++) 18480 18480 { 18481 if (iemAImpl_cmp_worker_r32( pfMxcsr, &pSrc->uSrc1.ar32[i], &pSrc->uSrc2.ar32[i], bEvil & 0x7))18481 if (iemAImpl_cmp_worker_r32(&uMxCsrIn, &pSrc->uSrc1.ar32[i], &pSrc->uSrc2.ar32[i], bEvil & 0x7)) 18482 18482 puDst->au32[i] = UINT32_MAX; 18483 18483 else 18484 18484 puDst->au32[i] = 0; 18485 18485 } 18486 } 18487 18488 18489 IEM_DECL_IMPL_DEF(void, iemAImpl_cmppd_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18486 18487 return uMxCsrIn; 18488 } 18489 18490 18491 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_cmppd_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18490 18492 { 18491 18493 for (uint8_t i = 0; i < RT_ELEMENTS(puDst->ar64); i++) 18492 18494 { 18493 if (iemAImpl_cmp_worker_r64( pfMxcsr, &pSrc->uSrc1.ar64[i], &pSrc->uSrc2.ar64[i], bEvil & 0x7))18495 if (iemAImpl_cmp_worker_r64(&uMxCsrIn, &pSrc->uSrc1.ar64[i], &pSrc->uSrc2.ar64[i], bEvil & 0x7)) 18494 18496 puDst->au64[i] = UINT64_MAX; 18495 18497 else 18496 18498 puDst->au64[i] = 0; 18497 18499 } 18498 } 18499 18500 18501 IEM_DECL_IMPL_DEF(void, iemAImpl_cmpss_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18502 { 18503 if (iemAImpl_cmp_worker_r32(pfMxcsr, &pSrc->uSrc1.ar32[0], &pSrc->uSrc2.ar32[0], bEvil & 0x7)) 18500 18501 return uMxCsrIn; 18502 } 18503 18504 18505 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_cmpss_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18506 { 18507 if (iemAImpl_cmp_worker_r32(&uMxCsrIn, &pSrc->uSrc1.ar32[0], &pSrc->uSrc2.ar32[0], bEvil & 0x7)) 18504 18508 puDst->au32[0] = UINT32_MAX; 18505 18509 else … … 18508 18512 puDst->au32[1] = pSrc->uSrc1.au32[1]; 18509 18513 puDst->au64[1] = pSrc->uSrc1.au64[1]; 18510 } 18511 18512 18513 IEM_DECL_IMPL_DEF(void, iemAImpl_cmpsd_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18514 { 18515 if (iemAImpl_cmp_worker_r64(pfMxcsr, &pSrc->uSrc1.ar64[0], &pSrc->uSrc2.ar64[0], bEvil & 0x7)) 18514 return uMxCsrIn; 18515 } 18516 18517 18518 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_cmpsd_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bEvil)) 18519 { 18520 if (iemAImpl_cmp_worker_r64(&uMxCsrIn, &pSrc->uSrc1.ar64[0], &pSrc->uSrc2.ar64[0], bEvil & 0x7)) 18516 18521 puDst->au64[0] = UINT64_MAX; 18517 18522 else … … 18519 18524 18520 18525 puDst->au64[1] = pSrc->uSrc1.au64[1]; 18526 return uMxCsrIn; 18521 18527 } 18522 18528 #endif … … 18572 18578 18573 18579 #ifdef IEM_WITHOUT_ASSEMBLY 18574 IEM_DECL_IMPL_DEF( void, iemAImpl_roundss_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm))18575 { 18576 puDst->ar32[0] = iemAImpl_round_worker_r32( pfMxcsr, &pSrc->uSrc2.ar32[0], bImm & X86_SSE_ROUNDXX_IMM_MASK);18580 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_roundss_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18581 { 18582 puDst->ar32[0] = iemAImpl_round_worker_r32(&uMxCsrIn, &pSrc->uSrc2.ar32[0], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18577 18583 puDst->au32[1] = pSrc->uSrc1.au32[1]; 18578 18584 puDst->au64[1] = pSrc->uSrc1.au64[1]; 18579 } 18580 18581 18582 IEM_DECL_IMPL_DEF(void, iemAImpl_roundsd_u128,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18583 { 18584 puDst->ar64[0] = iemAImpl_round_worker_r64(pfMxcsr, &pSrc->uSrc2.ar64[0], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18585 return uMxCsrIn; 18586 } 18587 18588 18589 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_roundsd_u128,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18590 { 18591 puDst->ar64[0] = iemAImpl_round_worker_r64(&uMxCsrIn, &pSrc->uSrc2.ar64[0], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18585 18592 puDst->au64[1] = pSrc->uSrc1.au64[1]; 18586 } 18587 #endif 18588 18589 IEM_DECL_IMPL_DEF(void, iemAImpl_roundps_u128_fallback,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18593 return uMxCsrIn; 18594 } 18595 #endif 18596 18597 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_roundps_u128_fallback,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18590 18598 { 18591 18599 for (uint8_t i = 0; i < RT_ELEMENTS(puDst->ar32); i++) 18592 18600 { 18593 puDst->ar32[i] = iemAImpl_round_worker_r32(pfMxcsr, &pSrc->uSrc2.ar32[i], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18594 } 18595 } 18596 18597 18598 IEM_DECL_IMPL_DEF(void, iemAImpl_roundpd_u128_fallback,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18601 puDst->ar32[i] = iemAImpl_round_worker_r32(&uMxCsrIn, &pSrc->uSrc2.ar32[i], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18602 } 18603 18604 return uMxCsrIn; 18605 } 18606 18607 18608 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_roundpd_u128_fallback,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 18599 18609 { 18600 18610 for (uint8_t i = 0; i < RT_ELEMENTS(puDst->ar64); i++) 18601 18611 { 18602 puDst->ar64[i] = iemAImpl_round_worker_r64(pfMxcsr, &pSrc->uSrc2.ar64[i], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18603 } 18612 puDst->ar64[i] = iemAImpl_round_worker_r64(&uMxCsrIn, &pSrc->uSrc2.ar64[i], bImm & X86_SSE_ROUNDXX_IMM_MASK); 18613 } 18614 18615 return uMxCsrIn; 18604 18616 } 18605 18617 … … 19248 19260 * DPPS 19249 19261 */ 19250 IEM_DECL_IMPL_DEF( void, iemAImpl_dpps_u128_fallback,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm))19251 { 19252 RT_NOREF(p fMxcsr, puDst, pSrc, bImm);19262 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_dpps_u128_fallback,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 19263 { 19264 RT_NOREF(puDst, pSrc, bImm); 19253 19265 AssertReleaseFailed(); 19266 return uMxCsrIn; 19254 19267 } 19255 19268 … … 19258 19271 * DPPD 19259 19272 */ 19260 IEM_DECL_IMPL_DEF( void, iemAImpl_dppd_u128_fallback,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm))19261 { 19262 RT_NOREF(p fMxcsr, puDst, pSrc, bImm);19273 IEM_DECL_IMPL_DEF(uint32_t, iemAImpl_dppd_u128_fallback,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC pSrc, uint8_t bImm)) 19274 { 19275 RT_NOREF(puDst, pSrc, bImm); 19263 19276 AssertReleaseFailed(); 19264 } 19277 return uMxCsrIn; 19278 } -
trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f3a.cpp.h
r104018 r104156 175 175 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 176 176 IEM_MC_LOCAL(X86XMMREG, Dst); 177 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 178 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 179 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 180 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 181 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 182 IEM_MC_PREPARE_SSE_USAGE(); 183 IEM_MC_REF_MXCSR(pfMxcsr); 177 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 178 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 179 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 180 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 181 IEM_MC_PREPARE_SSE_USAGE(); 184 182 185 183 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 186 IEM_MC_CALL_ VOID_AIMPL_4(pfnU128, pfMxcsr, pDst, pSrc, bImmArg);184 IEM_MC_CALL_SSE_AIMPL_3(pfnU128, pDst, pSrc, bImmArg); 187 185 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 188 186 IEM_MC_STORE_XREG_XMM(IEM_GET_MODRM_REG(pVCpu, bRm), Dst); … … 199 197 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 200 198 IEM_MC_LOCAL(X86XMMREG, Dst); 201 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 202 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 203 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 199 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 200 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 204 201 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 205 202 206 203 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 207 204 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 208 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);205 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 209 206 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 210 207 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); … … 212 209 213 210 IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 214 IEM_MC_REF_MXCSR(pfMxcsr); 215 IEM_MC_CALL_VOID_AIMPL_4(pfnU128, pfMxcsr, pDst, pSrc, bImmArg); 211 IEM_MC_CALL_SSE_AIMPL_3(pfnU128, pDst, pSrc, bImmArg); 216 212 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 217 213 IEM_MC_STORE_XREG_XMM(IEM_GET_MODRM_REG(pVCpu, bRm), Dst); … … 326 322 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 327 323 IEM_MC_LOCAL(X86XMMREG, Dst); 328 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 329 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 330 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 331 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 332 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 333 IEM_MC_PREPARE_SSE_USAGE(); 334 IEM_MC_REF_MXCSR(pfMxcsr); 324 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 325 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 326 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 327 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 328 IEM_MC_PREPARE_SSE_USAGE(); 335 329 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 336 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_roundss_u128, pfMxcsr, pDst, pSrc, bImmArg);330 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundss_u128, pDst, pSrc, bImmArg); 337 331 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 338 332 IEM_MC_STORE_XREG_XMM_U32(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDword*/, Dst); … … 349 343 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 350 344 IEM_MC_LOCAL(X86XMMREG, Dst); 351 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 352 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 353 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 345 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 346 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 354 347 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 355 348 356 349 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 357 350 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 358 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);351 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 359 352 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 360 353 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); … … 363 356 IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 364 357 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 365 IEM_MC_REF_MXCSR(pfMxcsr); 366 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_roundss_u128, pfMxcsr, pDst, pSrc, bImmArg); 358 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundss_u128, pDst, pSrc, bImmArg); 367 359 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 368 360 IEM_MC_STORE_XREG_XMM_U32(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iDword*/, Dst); … … 390 382 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 391 383 IEM_MC_LOCAL(X86XMMREG, Dst); 392 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 393 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 394 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 395 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 396 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 397 IEM_MC_PREPARE_SSE_USAGE(); 398 IEM_MC_REF_MXCSR(pfMxcsr); 384 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 385 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 386 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 387 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 388 IEM_MC_PREPARE_SSE_USAGE(); 399 389 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 400 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_roundsd_u128, pfMxcsr, pDst, pSrc, bImmArg);390 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundsd_u128, pDst, pSrc, bImmArg); 401 391 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 402 392 IEM_MC_STORE_XREG_XMM_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQword*/, Dst); … … 413 403 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 414 404 IEM_MC_LOCAL(X86XMMREG, Dst); 415 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 416 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 417 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 405 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 406 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 418 407 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 419 408 420 409 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 421 410 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 422 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);411 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 423 412 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 424 413 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); … … 427 416 IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 428 417 0 /*a_iQword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 429 IEM_MC_REF_MXCSR(pfMxcsr); 430 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_roundsd_u128, pfMxcsr, pDst, pSrc, bImmArg); 418 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_roundsd_u128, pDst, pSrc, bImmArg); 431 419 IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); 432 420 IEM_MC_STORE_XREG_XMM_U64(IEM_GET_MODRM_REG(pVCpu, bRm), 0 /*a_iQword*/, Dst); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
r104150 r104156 11811 11811 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11812 11812 IEM_MC_LOCAL(X86XMMREG, Dst); 11813 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11814 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11815 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11816 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 11813 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11814 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11815 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11817 11816 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 11818 11817 IEM_MC_PREPARE_SSE_USAGE(); 11819 IEM_MC_REF_MXCSR(pfMxcsr);11820 11818 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 11821 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmpps_u128, pfMxcsr, pDst, pSrc, bImmArg);11819 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpps_u128, pDst, pSrc, bImmArg); 11822 11820 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11823 11821 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 11837 11835 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11838 11836 IEM_MC_LOCAL(X86XMMREG, Dst); 11839 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11840 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11841 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11837 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11838 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11842 11839 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 11843 11840 11844 11841 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 11845 11842 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11846 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);11843 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11847 11844 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse); 11848 11845 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); … … 11850 11847 11851 11848 IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11852 IEM_MC_REF_MXCSR(pfMxcsr); 11853 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpps_u128, pfMxcsr, pDst, pSrc, bImmArg); 11849 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpps_u128, pDst, pSrc, bImmArg); 11854 11850 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11855 11851 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 11880 11876 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11881 11877 IEM_MC_LOCAL(X86XMMREG, Dst); 11882 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11883 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11884 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11885 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 11878 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11879 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11880 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11886 11881 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 11887 11882 IEM_MC_PREPARE_SSE_USAGE(); 11888 IEM_MC_REF_MXCSR(pfMxcsr);11889 11883 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 11890 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmppd_u128, pfMxcsr, pDst, pSrc, bImmArg);11884 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmppd_u128, pDst, pSrc, bImmArg); 11891 11885 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11892 11886 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 11906 11900 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11907 11901 IEM_MC_LOCAL(X86XMMREG, Dst); 11908 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11909 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11910 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11902 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11903 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11911 11904 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 11912 11905 11913 11906 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 11914 11907 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11915 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);11908 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11916 11909 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 11917 11910 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 11918 11911 IEM_MC_PREPARE_SSE_USAGE(); 11919 11912 11920 IEM_MC_REF_MXCSR(pfMxcsr);11921 11913 IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11922 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmppd_u128, pfMxcsr, pDst, pSrc, bImmArg);11914 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmppd_u128, pDst, pSrc, bImmArg); 11923 11915 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11924 11916 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 11949 11941 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11950 11942 IEM_MC_LOCAL(X86XMMREG, Dst); 11951 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11952 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11953 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11954 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 11943 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11944 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11945 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11955 11946 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 11956 11947 IEM_MC_PREPARE_SSE_USAGE(); 11957 IEM_MC_REF_MXCSR(pfMxcsr);11958 11948 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 11959 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmpss_u128, pfMxcsr, pDst, pSrc, bImmArg);11949 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpss_u128, pDst, pSrc, bImmArg); 11960 11950 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11961 11951 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 11975 11965 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 11976 11966 IEM_MC_LOCAL(X86XMMREG, Dst); 11977 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 11978 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 11979 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 11967 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 11968 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 11980 11969 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 11981 11970 11982 11971 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 11983 11972 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11984 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);11973 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11985 11974 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 11986 11975 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); … … 11989 11978 IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 11990 11979 0 /*a_iDword*/, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 11991 IEM_MC_REF_MXCSR(pfMxcsr); 11992 IEM_MC_CALL_VOID_AIMPL_4(iemAImpl_cmpss_u128, pfMxcsr, pDst, pSrc, bImmArg); 11980 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpss_u128, pDst, pSrc, bImmArg); 11993 11981 IEM_MC_IF_MXCSR_XCPT_PENDING() { 11994 11982 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 12019 12007 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 12020 12008 IEM_MC_LOCAL(X86XMMREG, Dst); 12021 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 12022 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 12023 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 12024 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 12009 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 12010 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 12011 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 12025 12012 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 12026 12013 IEM_MC_PREPARE_SSE_USAGE(); 12027 IEM_MC_REF_MXCSR(pfMxcsr);12028 12014 IEM_MC_FETCH_XREG_PAIR_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_MODRM_RM(pVCpu, bRm)); 12029 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmpsd_u128, pfMxcsr, pDst, pSrc, bImmArg);12015 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpsd_u128, pDst, pSrc, bImmArg); 12030 12016 IEM_MC_IF_MXCSR_XCPT_PENDING() { 12031 12017 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); … … 12045 12031 IEM_MC_LOCAL(IEMMEDIAF2XMMSRC, Src); 12046 12032 IEM_MC_LOCAL(X86XMMREG, Dst); 12047 IEM_MC_ARG(uint32_t *, pfMxcsr, 0); 12048 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 1); 12049 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 12033 IEM_MC_ARG_LOCAL_REF(PX86XMMREG, pDst, Dst, 0); 12034 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 1); 12050 12035 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 12051 12036 12052 12037 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1); 12053 12038 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 12054 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3);12039 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 12055 12040 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 12056 12041 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 12057 12042 IEM_MC_PREPARE_SSE_USAGE(); 12058 12043 12059 IEM_MC_REF_MXCSR(pfMxcsr);12060 12044 IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(Src, IEM_GET_MODRM_REG(pVCpu, bRm), 12061 12045 0 /*a_iQword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 12062 IEM_MC_CALL_ VOID_AIMPL_4(iemAImpl_cmpsd_u128, pfMxcsr, pDst, pSrc, bImmArg);12046 IEM_MC_CALL_SSE_AIMPL_3(iemAImpl_cmpsd_u128, pDst, pSrc, bImmArg); 12063 12047 IEM_MC_IF_MXCSR_XCPT_PENDING() { 12064 12048 IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT(); -
trunk/src/VBox/VMM/include/IEMInternal.h
r104151 r104156 3911 3911 typedef const IEMMEDIAF2XMMSRC *PCIEMMEDIAF2XMMSRC; 3912 3912 3913 typedef IEM_DECL_IMPL_TYPE( void, FNIEMAIMPLMXCSRF2XMMIMM8,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC puSrc, uint8_t bEvil));3913 typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLMXCSRF2XMMIMM8,(uint32_t uMxCsrIn, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC puSrc, uint8_t bEvil)); 3914 3914 typedef FNIEMAIMPLMXCSRF2XMMIMM8 *PFNIEMAIMPLMXCSRF2XMMIMM8; 3915 3915 -
trunk/src/VBox/VMM/testcase/tstIEMAImpl.cpp
r104150 r104156 7918 7918 | (iFz ? X86_MXCSR_FZ : 0) 7919 7919 | X86_MXCSR_XCPT_MASK; 7920 uint32_t fMxcsrM = fMxcsrIn;7921 7920 X86XMMREG ResM; 7922 pfn(&fMxcsrM, &ResM, &Src, bImm);7921 uint32_t fMxcsrM = pfn(fMxcsrIn, &ResM, &Src, bImm); 7923 7922 TestData.fMxcsrIn = fMxcsrIn; 7924 7923 TestData.fMxcsrOut = fMxcsrM; … … 7928 7927 7929 7928 fMxcsrIn &= ~X86_MXCSR_XCPT_MASK; 7930 uint32_t fMxcsrU = fMxcsrIn;7931 7929 X86XMMREG ResU; 7932 pfn(&fMxcsrU, &ResU, &Src, bImm);7930 uint32_t fMxcsrU = pfn(fMxcsrIn, &ResU, &Src, bImm); 7933 7931 TestData.fMxcsrIn = fMxcsrIn; 7934 7932 TestData.fMxcsrOut = fMxcsrU; … … 7941 7939 { 7942 7940 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | fXcpt; 7943 uint32_t fMxcsr1 = fMxcsrIn;7944 7941 X86XMMREG Res1; 7945 pfn(&fMxcsr1, &Res1, &Src, bImm);7942 uint32_t fMxcsr1 = pfn(fMxcsrIn, &Res1, &Src, bImm); 7946 7943 TestData.fMxcsrIn = fMxcsrIn; 7947 7944 TestData.fMxcsrOut = fMxcsr1; … … 7954 7951 fXcpt |= fMxcsr1 & X86_MXCSR_XCPT_FLAGS; 7955 7952 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | (fXcpt << X86_MXCSR_XCPT_MASK_SHIFT); 7956 uint32_t fMxcsr2 = fMxcsrIn;7957 7953 X86XMMREG Res2; 7958 pfn(&fMxcsr2, &Res2, &Src, bImm);7954 uint32_t fMxcsr2 = pfn(fMxcsrIn, &Res2, &Src, bImm); 7959 7955 TestData.fMxcsrIn = fMxcsrIn; 7960 7956 TestData.fMxcsrOut = fMxcsr2; … … 7968 7964 { 7969 7965 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | ((fXcpt & ~fUnmasked) << X86_MXCSR_XCPT_MASK_SHIFT); 7970 uint32_t fMxcsr3 = fMxcsrIn;7971 7966 X86XMMREG Res3; 7972 pfn(&fMxcsr3, &Res3, &Src, bImm);7967 uint32_t fMxcsr3 = pfn(fMxcsrIn, &Res3, &Src, bImm); 7973 7968 TestData.fMxcsrIn = fMxcsrIn; 7974 7969 TestData.fMxcsrOut = fMxcsr3; … … 8008 8003 Src.uSrc1 = paTests[iTest].InVal1; 8009 8004 Src.uSrc2 = paTests[iTest].InVal2; 8010 uint32_t fMxcsr = paTests[iTest].fMxcsrIn; 8011 pfn(&fMxcsr, &ValOut, &Src, paTests[iTest].bImm); 8005 uint32_t fMxcsr = pfn(paTests[iTest].fMxcsrIn, &ValOut, &Src, paTests[iTest].bImm); 8012 8006 if ( fMxcsr != paTests[iTest].fMxcsrOut 8013 8007 || ValOut.au32[0] != paTests[iTest].OutVal.au32[0] … … 8115 8109 | (iFz ? X86_MXCSR_FZ : 0) 8116 8110 | X86_MXCSR_XCPT_MASK; 8117 uint32_t fMxcsrM = fMxcsrIn;8118 8111 X86XMMREG ResM; 8119 pfn(&fMxcsrM, &ResM, &Src, bImm);8112 uint32_t fMxcsrM = pfn(fMxcsrIn, &ResM, &Src, bImm); 8120 8113 TestData.fMxcsrIn = fMxcsrIn; 8121 8114 TestData.fMxcsrOut = fMxcsrM; … … 8125 8118 8126 8119 fMxcsrIn &= ~X86_MXCSR_XCPT_MASK; 8127 uint32_t fMxcsrU = fMxcsrIn;8128 8120 X86XMMREG ResU; 8129 pfn(&fMxcsrU, &ResU, &Src, bImm);8121 uint32_t fMxcsrU = pfn(fMxcsrIn, &ResU, &Src, bImm); 8130 8122 TestData.fMxcsrIn = fMxcsrIn; 8131 8123 TestData.fMxcsrOut = fMxcsrU; … … 8138 8130 { 8139 8131 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | fXcpt; 8140 uint32_t fMxcsr1 = fMxcsrIn;8141 8132 X86XMMREG Res1; 8142 pfn(&fMxcsr1, &Res1, &Src, bImm);8133 uint32_t fMxcsr1 = pfn(fMxcsrIn, &Res1, &Src, bImm); 8143 8134 TestData.fMxcsrIn = fMxcsrIn; 8144 8135 TestData.fMxcsrOut = fMxcsr1; … … 8151 8142 fXcpt |= fMxcsr1 & X86_MXCSR_XCPT_FLAGS; 8152 8143 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | (fXcpt << X86_MXCSR_XCPT_MASK_SHIFT); 8153 uint32_t fMxcsr2 = fMxcsrIn;8154 8144 X86XMMREG Res2; 8155 pfn(&fMxcsr2, &Res2, &Src, bImm);8145 uint32_t fMxcsr2 = pfn(fMxcsrIn, &Res2, &Src, bImm); 8156 8146 TestData.fMxcsrIn = fMxcsrIn; 8157 8147 TestData.fMxcsrOut = fMxcsr2; … … 8165 8155 { 8166 8156 fMxcsrIn = (fMxcsrIn & ~X86_MXCSR_XCPT_MASK) | ((fXcpt & ~fUnmasked) << X86_MXCSR_XCPT_MASK_SHIFT); 8167 uint32_t fMxcsr3 = fMxcsrIn;8168 8157 X86XMMREG Res3; 8169 pfn(&fMxcsr3, &Res3, &Src, bImm);8158 uint32_t fMxcsr3 = pfn(fMxcsrIn, &Res3, &Src, bImm); 8170 8159 TestData.fMxcsrIn = fMxcsrIn; 8171 8160 TestData.fMxcsrOut = fMxcsr3; … … 8205 8194 Src.uSrc1 = paTests[iTest].InVal1; 8206 8195 Src.uSrc2 = paTests[iTest].InVal2; 8207 uint32_t fMxcsr = paTests[iTest].fMxcsrIn; 8208 pfn(&fMxcsr, &ValOut, &Src, paTests[iTest].bImm); 8196 uint32_t fMxcsr = pfn(paTests[iTest].fMxcsrIn, &ValOut, &Src, paTests[iTest].bImm); 8209 8197 if ( fMxcsr != paTests[iTest].fMxcsrOut 8210 8198 || ValOut.au64[0] != paTests[iTest].OutVal.au64[0]
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