Index: trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 104267)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 104268)
@@ -5073,5 +5073,5 @@
 ; @param    A2      Pointer to the EFLAGS register.
 ;
-%macro IEMIMPL_VTESTP_SD 1
+%macro IEMIMPL_VTESTP_S_D 1
 BEGINPROC_FASTCALL  iemAImpl_ %+ %1 %+ _u128, 12
         PROLOGUE_3_ARGS
@@ -5101,6 +5101,6 @@
 %endmacro
 
-IEMIMPL_VTESTP_SD vtestps
-IEMIMPL_VTESTP_SD vtestpd
+IEMIMPL_VTESTP_S_D vtestps
+IEMIMPL_VTESTP_S_D vtestpd
 
 
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h	(revision 104267)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h	(revision 104268)
@@ -213,100 +213,101 @@
  * Exceptions type 4. AVX cpuid check for both 128-bit and 256-bit operation.
  */
-FNIEMOP_DEF_1(iemOpCommonAvxAvx_Vx_Wx_Efl_Opt, PCIEMOPMEDIAF2EFL, pImpl)
-{
-    Assert(pVCpu->iem.s.uVexLength <= 1);
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
-    if (IEM_IS_MODRM_REG_MODE(bRm))
-    {
-        /*
-         * Register, register.
-         */
-        if (pVCpu->iem.s.uVexLength)
-        {
-            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
-            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
-            IEM_MC_LOCAL(RTUINT256U,            uSrc1);
-            IEM_MC_LOCAL(RTUINT256U,            uSrc2);
-            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc1, uSrc1, 0);
-            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc2, uSrc2, 1);
-            IEM_MC_ARG(uint32_t *,              pEFlags,       2);
-            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
-            IEM_MC_PREPARE_AVX_USAGE();
-            IEM_MC_FETCH_YREG_U256(uSrc1,   IEM_GET_MODRM_REG(pVCpu, bRm));
-            IEM_MC_FETCH_YREG_U256(uSrc2,   IEM_GET_MODRM_RM(pVCpu, bRm));
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU256, puSrc1, puSrc2, pEFlags);
-            IEM_MC_ADVANCE_RIP_AND_FINISH();
-            IEM_MC_END();
-        }
-        else
-        {
-            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
-            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
-            IEM_MC_ARG(PCRTUINT128U,            puSrc1,  0);
-            IEM_MC_ARG(PCRTUINT128U,            puSrc2,  1);
-            IEM_MC_ARG(uint32_t *,              pEFlags, 2);
-            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
-            IEM_MC_PREPARE_AVX_USAGE();
-            IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
-            IEM_MC_REF_XREG_U128_CONST(puSrc2, IEM_GET_MODRM_RM(pVCpu, bRm));
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU128, puSrc1, puSrc2, pEFlags);
-            IEM_MC_ADVANCE_RIP_AND_FINISH();
-            IEM_MC_END();
-        }
-    }
-    else
-    {
-        /*
-         * Register, memory.
-         */
-        if (pVCpu->iem.s.uVexLength)
-        {
-            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
-            IEM_MC_LOCAL(RTUINT256U,            uSrc1);
-            IEM_MC_LOCAL(RTUINT256U,            uSrc2);
-            IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
-            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc1, uSrc1, 0);
-            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc2, uSrc2, 1);
-            IEM_MC_ARG(uint32_t *,              pEFlags,       2);
-
-            IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
-            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
-            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
-            IEM_MC_PREPARE_AVX_USAGE();
-
-            IEM_MC_FETCH_MEM_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
-            IEM_MC_FETCH_YREG_U256(uSrc1,      IEM_GET_MODRM_REG(pVCpu, bRm));
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU256, puSrc1, puSrc2, pEFlags);
-
-            IEM_MC_ADVANCE_RIP_AND_FINISH();
-            IEM_MC_END();
-        }
-        else
-        {
-            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);
-            IEM_MC_LOCAL(RTUINT128U,            uSrc2);
-            IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc);
-            IEM_MC_ARG(PCRTUINT128U,            puSrc1,        0);
-            IEM_MC_ARG_LOCAL_REF(PCRTUINT128U,  puSrc2, uSrc2, 1);
-            IEM_MC_ARG(uint32_t *,              pEFlags,       2);
-
-            IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
-            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx);
-            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT();
-            IEM_MC_PREPARE_AVX_USAGE();
-
-            IEM_MC_FETCH_MEM_U128_NO_AC(uSrc2,  pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
-            IEM_MC_REF_XREG_U128_CONST(puSrc1,  IEM_GET_MODRM_REG(pVCpu, bRm));
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_3(pImpl->pfnU128, puSrc1, puSrc2, pEFlags);
-
-            IEM_MC_ADVANCE_RIP_AND_FINISH();
-            IEM_MC_END();
-        }
-    }
-}
+#define IEMOP_BODY_VTESTP_S_D(a_Instr) \
+    Assert(pVCpu->iem.s.uVexLength <= 1); \
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \
+    if (IEM_IS_MODRM_REG_MODE(bRm)) \
+    { \
+        /* \
+         * Register, register. \
+         */ \
+        if (pVCpu->iem.s.uVexLength) \
+        { \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \
+            IEM_MC_LOCAL(RTUINT256U,            uSrc1); \
+            IEM_MC_LOCAL(RTUINT256U,            uSrc2); \
+            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc1, uSrc1, 0); \
+            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc2, uSrc2, 1); \
+            IEM_MC_ARG(uint32_t *,              pEFlags,       2); \
+            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \
+            IEM_MC_PREPARE_AVX_USAGE(); \
+            IEM_MC_FETCH_YREG_U256(uSrc1,   IEM_GET_MODRM_REG(pVCpu, bRm)); \
+            IEM_MC_FETCH_YREG_U256(uSrc2,   IEM_GET_MODRM_RM(pVCpu, bRm)); \
+            IEM_MC_REF_EFLAGS(pEFlags); \
+            IEM_MC_CALL_VOID_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_ ## a_Instr ## _u256, \
+                                                                       iemAImpl_ ## a_Instr ## _u256_fallback), \
+                                     puSrc1, puSrc2, pEFlags); \
+            IEM_MC_ADVANCE_RIP_AND_FINISH(); \
+            IEM_MC_END(); \
+        } \
+        else \
+        { \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \
+            IEM_MC_ARG(PCRTUINT128U,            puSrc1,  0); \
+            IEM_MC_ARG(PCRTUINT128U,            puSrc2,  1); \
+            IEM_MC_ARG(uint32_t *,              pEFlags, 2); \
+            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \
+            IEM_MC_PREPARE_AVX_USAGE(); \
+            IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); \
+            IEM_MC_REF_XREG_U128_CONST(puSrc2, IEM_GET_MODRM_RM(pVCpu, bRm)); \
+            IEM_MC_REF_EFLAGS(pEFlags); \
+                IEM_MC_CALL_VOID_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_ ## a_Instr ## _u128, \
+                                                                           iemAImpl_ ## a_Instr ## _u128_fallback), \
+                                         puSrc1, puSrc2, pEFlags); \
+            IEM_MC_ADVANCE_RIP_AND_FINISH(); \
+            IEM_MC_END(); \
+        } \
+    } \
+    else \
+    { \
+        /* \
+         * Register, memory. \
+         */ \
+        if (pVCpu->iem.s.uVexLength) \
+        { \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_LOCAL(RTUINT256U,            uSrc1); \
+            IEM_MC_LOCAL(RTUINT256U,            uSrc2); \
+            IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc); \
+            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc1, uSrc1, 0); \
+            IEM_MC_ARG_LOCAL_REF(PCRTUINT256U,  puSrc2, uSrc2, 1); \
+            IEM_MC_ARG(uint32_t *,              pEFlags,       2); \
+            IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \
+            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \
+            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \
+            IEM_MC_PREPARE_AVX_USAGE(); \
+            IEM_MC_FETCH_MEM_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \
+            IEM_MC_FETCH_YREG_U256(uSrc1,      IEM_GET_MODRM_REG(pVCpu, bRm)); \
+            IEM_MC_REF_EFLAGS(pEFlags); \
+            IEM_MC_CALL_VOID_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_ ## a_Instr ## _u256, \
+                                                                       iemAImpl_ ## a_Instr ## _u256_fallback), \
+                                     puSrc1, puSrc2, pEFlags); \
+            IEM_MC_ADVANCE_RIP_AND_FINISH(); \
+            IEM_MC_END(); \
+        } \
+        else \
+        { \
+            IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); \
+            IEM_MC_LOCAL(RTUINT128U,            uSrc2); \
+            IEM_MC_LOCAL(RTGCPTR,               GCPtrEffSrc); \
+            IEM_MC_ARG(PCRTUINT128U,            puSrc1,        0); \
+            IEM_MC_ARG_LOCAL_REF(PCRTUINT128U,  puSrc2, uSrc2, 1); \
+            IEM_MC_ARG(uint32_t *,              pEFlags,       2); \
+            IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \
+            IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \
+            IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \
+            IEM_MC_PREPARE_AVX_USAGE(); \
+            IEM_MC_FETCH_MEM_U128_NO_AC(uSrc2,  pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \
+            IEM_MC_REF_XREG_U128_CONST(puSrc1,  IEM_GET_MODRM_REG(pVCpu, bRm)); \
+            IEM_MC_REF_EFLAGS(pEFlags); \
+                IEM_MC_CALL_VOID_AIMPL_3(IEM_SELECT_HOST_OR_FALLBACK(fAvx, iemAImpl_ ## a_Instr ## _u128, \
+                                                                           iemAImpl_ ## a_Instr ## _u128_fallback), \
+                                         puSrc1, puSrc2, pEFlags); \
+            IEM_MC_ADVANCE_RIP_AND_FINISH(); \
+            IEM_MC_END(); \
+        } \
+    } \
+    (void)0
 
 
@@ -314,6 +315,10 @@
 
 
-/**  Opcode VEX.66.0F38 0x0e.
- * AVX,AVX */
+/**
+ * @opcode      0x0e
+ * @oppfx       0x66
+ * @opflmodify  cf,zf,pf,af,sf,of
+ * @opflclear   pf,af,sf,of
+ */
 FNIEMOP_DEF(iemOp_vtestps_Vx_Wx)
 {
@@ -321,6 +326,5 @@
      *        CPU modes. */
     IEMOP_MNEMONIC2(VEX_RM, VTESTPS, vtestps, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_W_ZERO);
-    IEMOPMEDIAF2EFL_INIT_VARS(vtestps);
-    return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Wx_Efl_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback));
+    IEMOP_BODY_VTESTP_S_D(vtestps);
 }
 
@@ -329,6 +333,10 @@
 
 
-/**  Opcode VEX.66.0F38 0x0f.
- * AVX,AVX */
+/**
+ * @opcode      0x0f
+ * @oppfx       0x66
+ * @opflmodify  cf,zf,pf,af,sf,of
+ * @opflclear   pf,af,sf,of
+ */
 FNIEMOP_DEF(iemOp_vtestpd_Vx_Wx)
 {
@@ -336,6 +344,5 @@
      *        CPU modes. */
     IEMOP_MNEMONIC2(VEX_RM, VTESTPD, vtestpd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_AVX, IEMOPHINT_IGNORES_OP_SIZES | IEMOPHINT_VEX_W_ZERO);
-    IEMOPMEDIAF2EFL_INIT_VARS(vtestpd);
-    return FNIEMOP_CALL_1(iemOpCommonAvxAvx_Vx_Wx_Efl_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx, &s_Host, &s_Fallback));
+    IEMOP_BODY_VTESTP_S_D(vtestpd);
 }
 
Index: trunk/src/VBox/VMM/include/IEMInternal.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMInternal.h	(revision 104267)
+++ trunk/src/VBox/VMM/include/IEMInternal.h	(revision 104268)
@@ -3858,39 +3858,4 @@
 FNIEMAIMPLF2EFL128 iemAImpl_vtestpd_u128, iemAImpl_vtestpd_u128_fallback;
 FNIEMAIMPLF2EFL256 iemAImpl_vtestpd_u256, iemAImpl_vtestpd_u256_fallback;
-
-/**
- * Function table for media instruction taking two full sized media source
- * registers, and updating EFLAGS but no additional state (AVX).
- */
-typedef struct IEMOPMEDIAF2EFL
-{
-    PFNIEMAIMPLF2EFL128 pfnU128;
-    PFNIEMAIMPLF2EFL256 pfnU256;
-} IEMOPMEDIAF2EFL;
-/** Pointer to a media operation function table for 3 full sized ops (AVX). */
-typedef IEMOPMEDIAF2EFL const *PCIEMOPMEDIAF2EFL;
-
-/** @def IEMOPMEDIAF2EFL_INIT_VARS_EX
- * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
- * given functions as initializers.  For use in AVX functions where a pair of
- * functions are only used once and the function table need not be public. */
-#ifndef TST_IEM_CHECK_MC
-# if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
-#  define IEMOPMEDIAF2EFL_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
-    static IEMOPMEDIAF2EFL const s_Host     = { a_pfnHostU128,     a_pfnHostU256 }; \
-    static IEMOPMEDIAF2EFL const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
-# else
-#  define IEMOPMEDIAF2EFL_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
-    static IEMOPMEDIAF2EFL const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
-# endif
-#else
-# define IEMOPMEDIAF2EFL_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
-#endif
-/** @def IEMOPMEDIAF2EFL_INIT_VARS
- * Generate AVX function tables for the @a a_InstrNm instruction.
- * @sa IEMOPMEDIAF2EFL_INIT_VARS_EX */
-#define IEMOPMEDIAF2EFL_INIT_VARS(a_InstrNm) \
-    IEMOPMEDIAF2EFL_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128),           RT_CONCAT3(iemAImpl_,a_InstrNm,_u256), \
-                                 RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback),  RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
 
 typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLSSEF2I32U64,(uint32_t uMxCsrIn, int32_t *pi32Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
