Changeset 104270 in vbox for trunk/src

Timestamp:

Apr 10, 2024 10:25:04 AM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement native emitter for IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() (enables wait instruction recompilation), bugref:10371

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllInstPython.py (modified) (1 diff)
• IEMAllN8veLiveness.cpp (modified) (1 diff)
• IEMAllN8veRecompFuncs.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

@@ -3194 +3194 @@
     'IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT':             (McBlock.parseMcGeneric,           True,  True,  g_fNativeSimd),
     'IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT':                       (McBlock.parseMcGeneric,           True,  True,  True,  ),
-    'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE':              (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE':              (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC':                        (McBlock.parseMcGeneric,           True,  True,  True,  ),
     'IEM_MC_MEM_COMMIT_AND_UNMAP_RW':                            (McBlock.parseMcGeneric,           True,  True,  True,  ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp

@@ -453 +453 @@
 #define IEM_MC_RAISE_DIVIDE_ERROR()                                 IEM_LIVENESS_MARK_XCPT_OR_CALL()
 #define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE()                   IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
-#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() \            IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
+#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE()              IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
 #define IEM_MC_MAYBE_RAISE_FPU_XCPT()                               IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_FSW_INPUT()
 #define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

@@ -894 +894 @@
     else
         STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativeMaybeDeviceNotAvailXcptCheckOmitted);
+#endif
+
+    return off;
+}
+
+
+#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() \
+    off = iemNativeEmitMaybeRaiseWaitDeviceNotAvailable(pReNative, off, pCallEntry->idxInstr)
+
+/**
+ * Emits code to check if a \#NM exception should be raised.
+ *
+ * @returns New code buffer offset, UINT32_MAX on failure.
+ * @param   pReNative       The native recompile state.
+ * @param   off             The code buffer offset.
+ * @param   idxInstr        The current instruction.
+ */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitMaybeRaiseWaitDeviceNotAvailable(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr)
+{
+#ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR
+    STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativeMaybeWaitDeviceNotAvailXcptCheckPotential);
+
+    if (!(pReNative->fSimdRaiseXcptChecksEmitted & IEMNATIVE_SIMD_RAISE_XCPT_CHECKS_EMITTED_MAYBE_WAIT_DEVICE_NOT_AVAILABLE))
+    {
+#endif
+        /*
+         * Make sure we don't have any outstanding guest register writes as we may
+         * raise an #NM and all guest register must be up to date in CPUMCTX.
+         */
+        /** @todo r=aeichner Can we postpone this to the RaiseNm path? */
+        off = iemNativeRegFlushPendingWrites(pReNative, off);
+
+#ifdef IEMNATIVE_WITH_INSTRUCTION_COUNTING
+        off = iemNativeEmitStoreImmToVCpuU8(pReNative, off, idxInstr, RT_UOFFSETOF(VMCPUCC, iem.s.idxTbCurInstr));
+#else
+        RT_NOREF(idxInstr);
+#endif
+
+        /* Allocate a temporary CR0 register. */
+        uint8_t const idxCr0Reg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_Cr0, kIemNativeGstRegUse_Calculation);
+
+        /*
+         * if (cr0 & (X86_CR0_MP | X86_CR0_TS) == (X86_CR0_MP | X86_CR0_TS))
+         *     return raisexcpt();
+         */
+        off = iemNativeEmitAndGpr32ByImm(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS);
+        /* Test and jump. */
+        off = iemNativeEmitTestIfGpr32EqualsImmAndJmpToNewLabel(pReNative, off, idxCr0Reg, X86_CR0_MP | X86_CR0_TS, kIemNativeLabelType_RaiseNm);
+
+        /* Free the CR0 register. */
+        iemNativeRegFreeTmp(pReNative, idxCr0Reg);
+
+#ifdef IEMNATIVE_WITH_SIMD_REG_ALLOCATOR
+        pReNative->fSimdRaiseXcptChecksEmitted |= IEMNATIVE_SIMD_RAISE_XCPT_CHECKS_EMITTED_MAYBE_WAIT_DEVICE_NOT_AVAILABLE;
+    }
+    else
+        STAM_COUNTER_INC(&pReNative->pVCpu->iem.s.StatNativeMaybeWaitDeviceNotAvailXcptCheckOmitted);
 #endif