Changeset 104372 in vbox

Timestamp:

Apr 19, 2024 8:28:40 AM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Bugfixes in iemNativeEmitSimdLoadGprFromVecRegU64() and iemNativeEmitSimdZeroVecRegElemU32Ex(), bugref:10614

File:

• trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h (modified) (2 diffs)

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -8392 +8392 @@
 
 #ifdef RT_ARCH_AMD64
-    off = iemNativeEmitSimdLoadGprFromVecRegU64Ex(iemNativeInstrBufEnsure(pReNative, off, 7), off, iGprDst, iVecRegSrc, iQWord);
+    off = iemNativeEmitSimdLoadGprFromVecRegU64Ex(iemNativeInstrBufEnsure(pReNative, off, 13), off, iGprDst, iVecRegSrc, iQWord);
 #elif defined(RT_ARCH_ARM64)
     /* ASSUMES that there are two adjacent 128-bit registers available for the 256-bit value. */
@@ -8905 +8905 @@
     pCodeBuf[off++] = 0x33;
     pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, IEMNATIVE_REG_FIXED_TMP0 & 7, IEMNATIVE_REG_FIXED_TMP0 & 7);
-    off = iemNativeEmitSimdStoreGprToVecRegU32Ex(&pCodeBuf[off], off, iVecReg, IEMNATIVE_REG_FIXED_TMP0, iDWord);
+    off = iemNativeEmitSimdStoreGprToVecRegU32Ex(pCodeBuf, off, iVecReg, IEMNATIVE_REG_FIXED_TMP0, iDWord);
 #elif defined(RT_ARCH_ARM64)
     /* ASSUMES that there are two adjacent 128-bit registers available for the 256-bit value. */