Changeset 104405 in vbox for trunk/src

Timestamp:

Apr 23, 2024 9:47:11 PM (13 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

162900

Message:

VMM/IEM: Move the opcode checking of the first range from iemTbExec to the TB itself, so that we don't have to replicate this when jumping directly from one TB to the next one. bugref:10656

File:

• trunk/src/VBox/VMM/VMMAll/IEMAllThrdRecompiler.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllThrdRecompiler.cpp

@@ -1898 +1898 @@
         pVCpu->iem.s.rcPassUp               = VINF_SUCCESS;
         pVCpu->iem.s.fEndTb                 = false;
-        pVCpu->iem.s.fTbCheckOpcodes        = false;
+        pVCpu->iem.s.fTbCheckOpcodes        = true; /* (check opcodes for before executing the first instruction) */
         pVCpu->iem.s.fTbBranched            = IEMBRANCHED_F_NO;
         pVCpu->iem.s.fTbCrossedPage         = false;
@@ -2825 +2825 @@
 {
     /*
-     * Check the opcodes in the first page before starting execution.
-     */
-/** @todo this test should take IEMTB_F_CS_LIM_CHECKS into account or something.
- * The 'near jmp+call' test in bs3-cpu-basic-2 triggers the 2nd assertion here by
- * altering the CS limit such that only one or the two instruction bytes are valid.
- * Since it's a CS_LIMT problem, the pbInstrBuf is good for the full length, and
- * the test succeeds if skipped, but we assert in debug builds. */
-    Assert(!(pVCpu->iem.s.GCPhysInstrBuf & (RTGCPHYS)GUEST_PAGE_OFFSET_MASK));
-    Assert(pTb->aRanges[0].cbOpcodes <= pVCpu->iem.s.cbInstrBufTotal - pVCpu->iem.s.offInstrNextByte);
-    if (memcmp(pTb->pabOpcodes, &pVCpu->iem.s.pbInstrBuf[pTb->aRanges[0].offPhysPage], pTb->aRanges[0].cbOpcodes) == 0)
-    { /* likely */ }
-    else
-    {
-        Log7(("TB obsolete: %p GCPhys=%RGp\n", pTb, pTb->GCPhysPc));
-        iemThreadedTbObsolete(pVCpu, pTb, true /*fSafeToFree*/);
-        return VINF_SUCCESS;
-    }
-
-    /*
      * Set the current TB so CIMPL functions may get at it.
      */