VirtualBox

Changeset 104516 in vbox for trunk/include


Ignore:
Timestamp:
May 4, 2024 1:53:42 AM (9 months ago)
Author:
vboxsync
Message:

VMM/GCM,IEM,HM: Integrate GCM with IEM, extending it to cover the mesa drv situation and valid ring-0 IN instructions to same port. Untested. TODO: NEM. bugref:9735 bugref:10683

Location:
trunk/include/VBox
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/err.h

    r104407 r104516  
    32723272/** @} */
    32733273
     3274/** @name Guest Compatibility Manage Status Codes.
     3275 * @{
     3276 */
     3277/** The intercepted situation was completely handled, continue execution. */
     3278#define VINF_GCM_HANDLED                            (7600)
     3279/** The intercepted instruction handled, advance RIP and continue execution. */
     3280#define VINF_GCM_HANDLED_ADVANCE_RIP                (7601)
     3281/** The intercepted operation was not handled, take default action. */
     3282#define VERR_GCM_NOT_HANDLED                        (-7602)
     3283/** @} */
     3284
    32743285/* SED-END */
    32753286
  • trunk/include/VBox/vmm/cpum-common.h

    r98970 r104516  
    124124    } while (0)
    125125
     126/** @def CPUM_IMPORT_EXTRN_WITH_CTX_RET
     127 * Macro for making sure the state specified by @a fExtrnImport is present,
     128 * calling CPUMImportGuestStateOnDemand() to get it if necessary.
     129 *
     130 * Will return if CPUMImportGuestStateOnDemand() fails.
     131 *
     132 * @param   a_pVCpu         The cross context virtual CPU structure of the calling EMT.
     133 * @param   a_pCtx          Pointer to the CPU context (CPUMCTX).
     134 * @param   a_fExtrnImport  Mask of CPUMCTX_EXTRN_XXX bits to get.
     135 * @thread  EMT(a_pVCpu)
     136 */
     137#define CPUM_IMPORT_EXTRN_WITH_CTX_RET(a_pVCpu, a_pCtx, a_fExtrnImport) \
     138    do { \
     139        if (!((a_pCtx)->fExtrn & (a_fExtrnImport))) \
     140        { /* already present, consider this likely */ } \
     141        else \
     142        { \
     143            int rcCpumImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
     144            AssertRCReturn(rcCpumImport, rcCpumImport); \
     145        } \
     146    } while (0)
     147
    126148VMM_INT_DECL(int) CPUMImportGuestStateOnDemand(PVMCPUCC pVCpu, uint64_t fExtrnImport);
    127149/** @} */
  • trunk/include/VBox/vmm/gcm.h

    r104511 r104516  
    6161VMM_INT_DECL(bool)          GCMIsInterceptingXcptDE(PVMCPUCC pVCpu);
    6262VMM_INT_DECL(int)           GCMXcptDE(PVMCPUCC pVCpu, PCPUMCTX pCtx);
     63
     64VMM_INT_DECL(bool)          GCMIsInterceptingXcptGP(PVMCPUCC pVCpu);
     65VMM_INT_DECL(int)           GCMXcptGP(PVMCPUCC pVCpu, PCPUMCTX pCtx);
     66
     67VMM_INT_DECL(VBOXSTRICTRC)  GCMInterceptedIOPortRead(PVMCPUCC pVCpu, PCPUMCTX pCtx, uint16_t u16Port, uint8_t cbReg);
     68VMM_INT_DECL(bool)          GCMIsInterceptingIOPortReadSlow(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg);
     69
     70/**
     71 * Checks if the given IN instruction is intercepted.
     72 */
     73DECLINLINE(bool) GCMIsInterceptingIOPortRead(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg)
     74{
     75    return u16Port == 0x5658 /* vmware hypervisor port */
     76        && cbReg == 4
     77        && GCMIsInterceptingIOPortReadSlow(pVCpu, u16Port, cbReg);
     78}
     79
     80#if 0 /* If we need to deal with high speed vmware hypervisor calls */
     81VMM_INT_DECL(bool)          GCMIsInterceptingIOPortReadStringSlow(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg);
     82VMM_INT_DECL(bool)          GCMIsInterceptingIOPortWriteStringSlow(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg);
     83
     84/**
     85 * Checks if the given INS instruction is intercepted.
     86 */
     87DECLINLINE(bool) GCMIsInterceptingIOPortReadString(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg)
     88{
     89    return u16Port == 0x5659 /* new vmware hypervisor port */
     90        && cbReg == 1
     91        && GCMIsInterceptingIOPortReadStringSlow(pVCpu, u16Port, cbReg);
     92}
     93
     94/**
     95 * Checks if the given OUTS instruction is intercepted.
     96 */
     97DECLINLINE(bool) GCMIsInterceptingIOPortWriteString(PVMCPUCC pVCpu, uint16_t u16Port, uint8_t cbReg)
     98{
     99    return u16Port == 0x5659 /* new vmware hypervisor port */
     100        && cbReg == 1
     101        && GCMIsInterceptingIOPortWriteStringSlow(pVCpu, u16Port, cbReg);
     102}
     103#endif
     104
    63105/** @} */
    64106
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