Changeset 104756 in vbox for trunk/src

Timestamp:

May 22, 2024 11:53:58 AM (11 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

163319

Message:

ValidationKit/bootsectors: bugref:10658 SIMD FP testcase: [V]ADDPD and nits.

File:

• trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32 (modified) (3 diffs)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32

@@ -71 +71 @@
 #define BS3_FP64_QNAN(a_Sign)                 RTFLOAT64U_INIT_QNAN(a_Sign)
 #define BS3_FP64_SNAN(a_Sign)                 RTFLOAT64U_INIT_SNAN(a_Sign)
+
+/*
+ * 64-bit floating normals.
+ * Fraction - 52 bits, all usable.
+ * Exponent - 11 bits, least significant bit MBZ.
+ */
+#define BS3_FP64_NORMAL_VAL_1(a_Sign)         RTFLOAT64U_INIT_C(a_Sign, 0xf10a7ab1ec01a, 0x4bc)
+#define BS3_FP64_NORMAL_VAL_2(a_Sign)         RTFLOAT64U_INIT_C(a_Sign, 0xca5cadea1b1ed, 0x3ae)
+#define BS3_FP64_NORMAL_VAL_3(a_Sign)         RTFLOAT64U_INIT_C(a_Sign, 0xb5b5b5b5b5b5b, 0xffe)
 
 
@@ -1231 +1240 @@
               /*daz,fz,rc*/ 0, 0, X86_MXCSR_RC_NEAREST,
               /*flags    */ 0 },
-    /* 5*/{ { /*src2     */ { BS3_FP64_VAL(0, 0,               0x409)/*1024*/, BS3_FP64_VAL(0, 0xb800000000000, 0x404)/*55*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
+    /* 5*/{ { /*src2     */ { BS3_FP64_NORMAL_MAX(0), BS3_FP64_NORMAL_VAL_1(0), BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
+            { /*src1     */ { BS3_FP64_NORMAL_MAX(0), BS3_FP64_NORMAL_VAL_2(0), BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
+            { /* =>      */ { BS3_FP64_INF(0),        BS3_FP64_NORMAL_VAL_1(0), BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
+              /*mask     */ ~X86_MXCSR_OE,
+              /*daz,fz,rc*/ 0, 0, X86_MXCSR_RC_NEAREST,
+              /*flags    */ X86_MXCSR_OE | X86_MXCSR_PE },
+    /* 6*/{ { /*src2     */ { BS3_FP64_VAL(0, 0,               0x409)/*1024*/, BS3_FP64_VAL(0, 0xb800000000000, 0x404)/*55*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
             { /*src1     */ { BS3_FP64_VAL(0, 0,               0x408)/* 512*/, BS3_FP64_VAL(0, 0xc000000000000, 0x401)/* 7*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
             { /* =>      */ { BS3_FP64_VAL(0, 0x8000000000000, 0x409)/*1536*/, BS3_FP64_VAL(0, 0xf000000000000, 0x404)/*62*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
@@ -1237 +1252 @@
               /*daz,fz,rc*/ 0, 0, X86_MXCSR_RC_NEAREST,
               /*flags    */ 0 },
-    /* 6*/{ { /*src2     */ { BS3_FP64_VAL(0, 0x26580b4800000, 0x41d)/* 1234567890*/, BS3_FP64_VAL(0, 0xd6f3458800000, 0x41c)/*987654321*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
+    /* 7*/{ { /*src2     */ { BS3_FP64_VAL(0, 0x26580b4800000, 0x41d)/* 1234567890*/, BS3_FP64_VAL(0, 0xd6f3458800000, 0x41c)/*987654321*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
             { /*src1     */ { BS3_FP64_VAL(1, 0x26580b4800000, 0x41d)/*-1234567890*/, BS3_FP64_VAL(1, 0x9000000000000, 0x405)/*     -100*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },
             { /* =>      */ { BS3_FP64_ZERO(0),                                       BS3_FP64_VAL(0, 0xd6f3426800000, 0x41c)/*987654221*/, BS3_FP64_ZERO(0), BS3_FP64_ZERO(0) } },