Changeset 104842 in vbox

Timestamp:

Jun 5, 2024 1:02:34 AM (11 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

163435

Message:

DevVGA,DevPCI,Main: Increased the max VRAM size to 1GB. Experimental. bugref:10687

Location:

trunk

Files:

• include/VBox/graphics.h (modified) (1 diff)
• src/VBox/Devices/Bus/DevPCI.cpp (modified) (2 diffs)
• src/VBox/Main/src-client/ConsoleImplConfigX86.cpp (modified) (1 diff)

trunk/include/VBox/graphics.h

@@ -42 +42 @@
 
 /** The default amount of VGA VRAM (in bytes). */
-# define VGA_VRAM_DEFAULT           (_4M)
+#define VGA_VRAM_DEFAULT            (_4M)
 /** The minimum amount of VGA VRAM (in bytes). */
-# define VGA_VRAM_MIN               (_1M)
-/** The maximum amount of VGA VRAM (in bytes). Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
-# define VGA_VRAM_MAX               (256 * _1M)
+#define VGA_VRAM_MIN                (_1M)
+/** The maximum amount of VGA VRAM (in bytes).  */
+#define VGA_VRAM_MAX                (_1G)
 
 /** The minimum amount of SVGA VRAM (in bytes). */

trunk/src/VBox/Devices/Bus/DevPCI.cpp

@@ -682 +682 @@
                                      * needed for legacy guest drivers. */
                                     if (fPrefetch)
+                                    {
                                         paddr = &uPciBiosSpecialVRAM;
+
+                                        /* Hack alert! Workaround for VRAM sizes higher than 256MB (absolute max is 1GB). */
+                                        if (   u32Size > 0x10000000  /* 256MB (what we can stuff at 0xe0000000) */
+                                            && uPciBiosSpecialVRAM == 0xe0000000)
+                                            uPciBiosSpecialVRAM = u32Size > 0x20000000 /*512MB*/ ? 0x80000000 : 0xc0000000;
+                                    }
                                 }
                             }
@@ -694 +701 @@
                             || uNew + u32Size - 1 >= UINT32_C(0xfec00000))
                         {
-                            LogRel(("PCI: no space left for BAR%u of device %u/%u/%u (vendor=%#06x device=%#06x)\n",
-                                    i, pBus->iBus, pPciDev->uDevFn >> 3, pPciDev->uDevFn & 7, vendor_id, device_id)); /** @todo make this a VM start failure later. */
+                            LogRel(("PCI: no space left for BAR%u (type=%#x size=%#RX32) of device %u/%u/%u (vendor=%#06x device=%#06x) - uNew=%#RX32 (*paddr=%#RX32)\n",
+                                    i, u8ResourceType, u32Size, pBus->iBus, pPciDev->uDevFn >> 3, pPciDev->uDevFn & 7,
+                                    vendor_id, device_id, uNew, *paddr)); /** @todo make this a VM start failure later. */
                             /* Undo the mapping mess caused by the size probing. */
                             devpciR3SetDWord(pDevIns, pPciDev, u32Address, UINT32_C(0));

trunk/src/VBox/Main/src-client/ConsoleImplConfigX86.cpp

@@ -433 +433 @@
     ComPtr<IPlatform> platform;
     pMachine->COMGETTER(Platform)(platform.asOutParam());                                   H();
+
+    /* We have to increase the RAM hole if lots of VRAM is assigned. We stupidly
+       have to do this before the MCFG region is subtracted, even if there
+       should be ample space for it after the VRAM due to alignment. See
+       assumptions in ich9pciFakePCIBIOS(). */
+    ComPtr<IGraphicsAdapter> ptrGraphicsAdapter;
+    hrc = pMachine->COMGETTER(GraphicsAdapter)(ptrGraphicsAdapter.asOutParam());            H();
+    ULONG cVRamMBs = 0;
+    hrc = ptrGraphicsAdapter->COMGETTER(VRAMSize)(&cVRamMBs);                               H();
+    if (cVRamMBs > 256)
+    {
+        uint32_t cVRamMBsPowerOfTwo = RT_MIN(cVRamMBs, 1024); /* 1GB is the absolute max given PCI alignment. */
+        if (!RT_IS_POWER_OF_TWO(cVRamMBsPowerOfTwo))
+            cVRamMBsPowerOfTwo = RT_BIT_32(ASMBitFirstSetU32(cVRamMBsPowerOfTwo)); /* returns [1..32] */
+        if (cbRamHole / _1M < cVRamMBsPowerOfTwo * 2)
+        {
+            cbRamHole = cVRamMBsPowerOfTwo * 2 * _1M; /* We must double the VRAM size due to PCI alignment. */
+/** @todo sort out the MCFG placement to better use available physical memory. */
+            //if (uMcfgBase)
+            //    uMcfgBase = _4G - cbRamHole + cVRamMBsPowerOfTwo * _1M;
+        }
+    }
 
     ChipsetType_T chipsetType;