Changeset 104859 in vbox for trunk/src

Timestamp:

Jun 5, 2024 8:33:10 PM (8 months ago)

Author:

vboxsync

Message:

VMM/PGM: Moved the apRamRangesTlbR0 out of the shared PGM structure and into the ring-0 only one; double the RAM range TLB size (from 8 to 16 entries). bugref:10687 bugref:10093

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/PGMAllPhys.cpp (modified) (7 diffs)
• VMMR3/PGMPhys.cpp (modified) (3 diffs)
• include/PGMInline.h (modified) (6 diffs)
• include/PGMInternal.h (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -589 +589 @@
 {
     PGM_LOCK_VOID(pVM);
-    RT_ZERO(pVM->pgm.s.apRamRangesTlbR3);
-    RT_ZERO(pVM->pgm.s.apRamRangesTlbR0);
+    /* This is technically only required when freeing the PCNet MMIO2 range
+       during ancient saved state loading.  The code freeing the RAM range
+       will make sure this function is called in both rings. */
+    RT_ZERO(pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb);
     PGM_UNLOCK(pVM);
 }
@@ -630 +632 @@
             PPGMRAMRANGE const pRamRange  = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRanges[idRamRange];
             Assert(pRamRange);
-            pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
+            pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
             return pRamRange;
         }
@@ -677 +679 @@
             PPGMRAMRANGE const pRamRange  = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRanges[idRamRange];
             Assert(pRamRange);
-            pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
+            pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
             return pRamRange;
         }
@@ -731 +733 @@
             PPGMRAMRANGE const pRamRange  = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRanges[idRamRange];
             AssertReturn(pRamRange, NULL);
-            pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
+            pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
 
             /* Get the page. */
@@ -784 +786 @@
             PPGMRAMRANGE const pRamRange  = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRanges[idRamRange];
             AssertReturn(pRamRange, VERR_PGM_PHYS_RAM_LOOKUP_IPE);
-            pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
+            pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
 
             /* Get the page. */
@@ -840 +842 @@
             PPGMRAMRANGE const pRamRange  = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRanges[idRamRange];
             AssertReturn(pRamRange, VERR_PGM_PHYS_RAM_LOOKUP_IPE);
-            pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
+            pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)] = pRamRange;
 
             /* Get the page. */
@@ -1103 +1105 @@
     }
 
+    /*
+     * Make sure the RAM range TLB does not contain any stale pointers to this range.
+     */
+    pgmPhysInvalidRamRangeTlbs(pVM);
     return rc;
 }

trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp

@@ -2852 +2852 @@
 
     pgmPhysInvalidatePageMapTLB(pVM);
-    pgmPhysInvalidRamRangeTlbs(pVM);
+    /*pgmPhysInvalidRamRangeTlbs(pVM); - not necessary */
 
     return rc;
@@ -3403 +3403 @@
                                      rc2, idx, cChunks, pszDesc),
                                     rc = RT_SUCCESS(rc) ? rc2 : rc);
+                pgmPhysInvalidRamRangeTlbs(pVM); /* Ensure no stale pointers in the ring-3 RAM range TLB. */
             }
             if (RT_FAILURE(rc2))
@@ -3905 +3906 @@
 
     pgmPhysInvalidatePageMapTLB(pVM);
-    pgmPhysInvalidRamRangeTlbs(pVM);
+    /* pgmPhysInvalidRamRangeTlbs(pVM); - not necessary */
 
     return rcRet;

trunk/src/VBox/VMM/include/PGMInline.h

@@ -71 +71 @@
 DECLINLINE(PPGMRAMRANGE) pgmPhysGetRange(PVMCC pVM, RTGCPHYS GCPhys)
 {
-    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+    PPGMRAMRANGE pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
     if (!pRam || GCPhys - pRam->GCPhys >= pRam->cb)
         return pgmPhysGetRangeSlow(pVM, GCPhys);
@@ -91 +91 @@
 DECLINLINE(PPGMRAMRANGE) pgmPhysGetRangeAtOrAbove(PVMCC pVM, RTGCPHYS GCPhys)
 {
-    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+    PPGMRAMRANGE pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
     if (   !pRam
         || (GCPhys - pRam->GCPhys) >= pRam->cb)
@@ -111 +111 @@
 DECLINLINE(PPGMPAGE) pgmPhysGetPage(PVMCC pVM, RTGCPHYS GCPhys)
 {
-    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+    PPGMRAMRANGE pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
     RTGCPHYS off;
     if (   pRam
@@ -138 +138 @@
 DECLINLINE(int) pgmPhysGetPageEx(PVMCC pVM, RTGCPHYS GCPhys, PPPGMPAGE ppPage)
 {
-    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+    PPGMRAMRANGE pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
     RTGCPHYS off;
     if (   !pRam
@@ -171 +171 @@
         ||  RT_UNLIKELY((off = GCPhys - pRam->GCPhys) >= pRam->cb))
     {
-        pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+        pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
         if (   !pRam
             || (off = GCPhys - pRam->GCPhys) >= pRam->cb)
@@ -197 +197 @@
 DECLINLINE(int) pgmPhysGetPageAndRangeEx(PVMCC pVM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
 {
-    PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(apRamRangesTlb)[PGM_RAMRANGE_TLB_IDX(GCPhys)];
+    PPGMRAMRANGE pRam = pVM->CTX_EXPR(pgm, pgmr0, pgm).s.apRamRangesTlb[PGM_RAMRANGE_TLB_IDX(GCPhys)];
     RTGCPHYS off;
     if (   !pRam

trunk/src/VBox/VMM/include/PGMInternal.h

@@ -1413 +1413 @@
 /** The number of entries in the RAM range TLBs (there is one for each
  *  context).  Must be a power of two. */
-#define PGM_RAMRANGE_TLB_ENTRIES            8
+#define PGM_RAMRANGE_TLB_ENTRIES            16
 
 /**
@@ -3112 +3112 @@
 
     /** RAM range TLB for R3. */
-    R3PTRTYPE(PPGMRAMRANGE)         apRamRangesTlbR3[PGM_RAMRANGE_TLB_ENTRIES];
+    R3PTRTYPE(PPGMRAMRANGE)         apRamRangesTlb[PGM_RAMRANGE_TLB_ENTRIES];
     /** Shadow Page Pool - R3 Ptr. */
     R3PTRTYPE(PPGMPOOL)             pPoolR3;
-    /** Pointer to the list of ROM ranges - for R3.
-     * This is sorted by physical address and contains no overlapping ranges. */
-    R3PTRTYPE(PPGMROMRANGE)         pRomRangesR3;
-
-    /** RAM range TLB for R0. */
-    R0PTRTYPE(PPGMRAMRANGE)         apRamRangesTlbR0[PGM_RAMRANGE_TLB_ENTRIES];
+
     /** Shadow Page Pool - R0 Ptr. */
     R0PTRTYPE(PPGMPOOL)             pPoolR0;
-    /** R0 pointer corresponding to PGM::pRomRangesR3. */
-    R0PTRTYPE(PPGMROMRANGE)         pRomRangesR0;
 
     /** Hack: Number of deprecated page mapping locks taken by the current lock
@@ -3146 +3139 @@
     uint32_t                        idxLastPhysHandler;
 
-    uint32_t                        au64Padding3[5];
+    uint32_t                        au64Padding3[9];
 
     /** PGM critical section.
@@ -3763 +3756 @@
     uint32_t                        idRamRangeMax;
     uint8_t                         abAlignment1[64 - sizeof(uint32_t)];
+    /** RAM range TLB for R0. */
+    R0PTRTYPE(PPGMRAMRANGE)         apRamRangesTlb[PGM_RAMRANGE_TLB_ENTRIES];
     /** @} */