Changeset 104886 in vbox

Timestamp:

Jun 11, 2024 2:29:28 PM (9 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

163488

Message:

VMM/PGM: Tweaked the RAM range TLB hashing and quadrupled the size to improve the hit rate. bugref:10687

Location:

trunk

Files:

• include/VBox/vmm/gvm.h (modified) (3 diffs)
• include/VBox/vmm/gvm.mac (modified) (2 diffs)
• src/VBox/VMM/VMMR0/PGMR0.cpp (modified) (1 diff)
• src/VBox/VMM/include/PGMInternal.h (modified) (2 diffs)

trunk/include/VBox/vmm/gvm.h

@@ -138 +138 @@
         struct PGMR0PERVCPU s;
 #endif
-        uint8_t             padding[192];
+        uint8_t             padding[576];
     } pgmr0;
 
     /** Padding the structure size to page boundrary. */
 #ifdef VBOX_WITH_NEM_R0
-    uint8_t                 abPadding3[16384 - 64*2 - 256 - 1024 - 64 - 896 - 192];
+    uint8_t                 abPadding3[16384 - 64*2 - 256 - 1024 - 64 - 896 - 576];
 #else
-    uint8_t                 abPadding3[16384 - 64*2 - 256 - 1024      - 896 - 192];
+    uint8_t                 abPadding3[16384 - 64*2 - 256 - 1024      - 896 - 576];
 #endif
 } GVMCPU;
@@ -265 +265 @@
         struct PGMR0PERVM   s;
 #endif
-        uint8_t             padding[89728];
+        uint8_t             padding[90112];
     } pgmr0;
 
@@ -310 +310 @@
     /** Padding so aCpus starts on a page boundrary.  */
 #ifdef VBOX_WITH_NEM_R0
-    uint8_t         abPadding2[16384*7 - 64 - 4352 - 1024 - 256 - 256 - 64 - 3008 - 89728 - 512 - 64 - 1024 - 192 - 704 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
+    uint8_t         abPadding2[16384*7 - 64 - 4352 - 1024 - 256 - 256 - 64 - 3008 - 90112 - 512 - 64 - 1024 - 192 - 704 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
 #else
-    uint8_t         abPadding2[16384*7 - 64 - 4352 - 1024 - 256 -       64 - 3008 - 89728 - 512 - 64 - 1024 - 192 - 704 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
+    uint8_t         abPadding2[16384*7 - 64 - 4352 - 1024 - 256 -       64 - 3008 - 90112 - 512 - 64 - 1024 - 192 - 704 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];
 #endif
 

trunk/include/VBox/vmm/gvm.mac

@@ -64 +64 @@
         .vmmr0              resb 896
         alignb 64
-        .pgmr0              resb 192
+        .pgmr0              resb 576
         alignb 16384
 endstruc
@@ -95 +95 @@
         .pdmr0              resb 3008
         alignb 64
-        .pgmr0              resb 89728
+        .pgmr0              resb 90112
         alignb 64
         .iomr0              resb 512

trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

@@ -87 +87 @@
     AssertCompile(sizeof(pGVM->pgm.s) <= sizeof(pGVM->pgm.padding));
     AssertCompile(sizeof(pGVM->pgmr0.s) <= sizeof(pGVM->pgmr0.padding));
+    AssertCompile(sizeof(pGVM->aCpus[0].pgm.s) <= sizeof(pGVM->aCpus[0].pgm.padding));
+    AssertCompile(sizeof(pGVM->aCpus[0].pgmr0.s) <= sizeof(pGVM->aCpus[0].pgmr0.padding));
 
     /* Set the RAM range memory handles to NIL. */

trunk/src/VBox/VMM/include/PGMInternal.h

@@ -1413 +1413 @@
 /** The number of entries in the RAM range TLBs (there is one for each
  *  context).  Must be a power of two. */
-#define PGM_RAMRANGE_TLB_ENTRIES            16
+#define PGM_RAMRANGE_TLB_ENTRIES            64
 
 /**
@@ -1421 +1421 @@
  * @param   a_GCPhys    The guest physical address.
  */
-#define PGM_RAMRANGE_TLB_IDX(a_GCPhys)      ( ((a_GCPhys) >> 20) & (PGM_RAMRANGE_TLB_ENTRIES - 1) )
+#define PGM_RAMRANGE_TLB_IDX(a_GCPhys)      ( ((a_GCPhys) >> 19) & (PGM_RAMRANGE_TLB_ENTRIES - 1) )
 
 /**