Changeset 105093 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Jul 2, 2024 9:02:55 AM (7 months ago)
- File:
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- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
r105091 r105093 493 493 494 494 495 DECL_FORCE_INLINE(bool) bs3CpuInstr4IsSse(uint8_t enmType) 496 { 497 return enmType >= T_SSE && enmType < T_AVX_128; 498 } 499 500 501 DECL_FORCE_INLINE(bool) bs3CpuInstr4IsAvx(uint8_t enmType) 502 { 503 return enmType >= T_AVX_128; 504 } 505 506 507 DECL_FORCE_INLINE(uint8_t) bs3CpuInstr4GetOperandSize(uint8_t enmType) 508 { 509 return enmType < T_128BITS ? 64/8 510 : enmType < T_256BITS ? 128/8 : 256/8; 511 } 512 513 495 514 /** 496 515 * Gets the names of floating-point exception flags that are set for a given MXCSR. … … 1062 1081 uint8_t cbInstr; /**< Size of the instruction opcode. */ 1063 1082 uint8_t bXcptExpect; /**< The expected exception while/after executing the instruction. */ 1064 bool fSseInstr; /**< Whether this is an SSE instruction. */1065 bool fAvxInstr; /**< Whether this is an AVX instruction. */1066 1083 uint16_t idTestStep; /**< The test iteration step. */ 1067 1084 } BS3CPUINSTR4_TEST1_CTX_T; … … 1093 1110 bool const fFpFlagsExpect = RT_BOOL( (fExpectedMxCsrFlags 1094 1111 & (~pValues->fMxCsrMask >> X86_MXCSR_XCPT_MASK_SHIFT)) & X86_MXCSR_XCPT_FLAGS); 1112 bool const fSseInstr = bs3CpuInstr4IsSse(pTest->enmType); 1095 1113 uint32_t uMxCsr; 1096 1114 X86YMMREG MemOpExpect; … … 1118 1136 Bs3MemCpy(puMemOpAlias, &pValues->uSrc1, cbMemOp); 1119 1137 if (pTest->iRegDst == UINT8_MAX) 1120 BS3_ASSERT( pTestCtx->fSseInstr);1138 BS3_ASSERT(fSseInstr); 1121 1139 else 1122 1140 MemOpExpect.ymm = pValues->uSrc1.ymm; 1123 1141 } 1124 else if ( pTestCtx->fSseInstr)1142 else if (fSseInstr) 1125 1143 Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegSrc1, &pValues->uSrc1.ymm.DQWords.dqw0); 1126 1144 else … … 1135 1153 MemOpExpect.ymm = pValues->uSrc2.ymm; 1136 1154 } 1137 else if ( pTestCtx->fSseInstr)1155 else if (fSseInstr) 1138 1156 Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegSrc2, &pValues->uSrc2.ymm.DQWords.dqw0); 1139 1157 else … … 1181 1199 && pTest->iRegDst != UINT8_MAX) 1182 1200 { 1183 if ( pTestCtx->fSseInstr)1201 if (fSseInstr) 1184 1202 Bs3ExtCtxSetXmm(pExtCtx, pTest->iRegDst, &pValues->uDstOut.ymm.DQWords.dqw0); 1185 1203 else … … 1312 1330 BS3CPUINSTR4_TEST1_T const BS3_FAR *pTest = &paTests[iTest]; 1313 1331 unsigned const cValues = pTest->cValues; 1314 bool const fSseInstr = pTest->enmType >= T_SSE && pTest->enmType < T_AVX_128; 1315 bool const fAvxInstr = pTest->enmType >= T_AVX_128; 1316 uint8_t const cbOperand = pTest->enmType < T_128BITS ? 64/8 1317 : pTest->enmType < T_256BITS ? 128/8 : 256/8; 1332 bool const fSseInstr = bs3CpuInstr4IsSse(pTest->enmType); 1333 bool const fAvxInstr = bs3CpuInstr4IsAvx(pTest->enmType); 1334 uint8_t const cbOperand = bs3CpuInstr4GetOperandSize(pTest->enmType); 1318 1335 uint8_t const cbMemOp = bs3CpuInstrXMemOpSize(cbOperand, pTest->enmRm); 1319 1336 uint8_t const cbAlign = cbMemOp; … … 1393 1410 TestCtx.cbOperand = cbOperand; 1394 1411 TestCtx.bXcptExpect = bXcptExpect; 1395 TestCtx.fSseInstr = fSseInstr;1396 TestCtx.fAvxInstr = fAvxInstr;1397 1412 TestCtx.idTestStep = idTestStep; 1398 1413 cErrors = bs3CpuInstr4_WorkerTestType1_Inner(bMode, &TestCtx, &SavedCfg);
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