Changeset 105112 in vbox
- Timestamp:
- Jul 3, 2024 10:12:26 AM (8 months ago)
- svn:sync-xref-src-repo-rev:
- 163742
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-4.c32
r105106 r105112 2234 2234 /*daz,fz,rc*/ X86_MXCSR_DAZ, X86_MXCSR_FZ, X86_MXCSR_RC_DOWN, 2235 2235 /*flags */ 0, 0 }, 2236 /** @todo Infinity; Overflow, precision; Denormals; Normals; etc. */ 2236 /* 2237 * Infinity. 2238 */ 2239 /* 6*/{ { /*src2 */ { BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(1) } }, 2240 { /*src1 */ { BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0) } }, 2241 { /* => */ { BS3_FP32_QNAN(1), BS3_FP32_ZERO(0), BS3_FP32_QNAN(1), BS3_FP32_QNAN(1), BS3_FP32_QNAN(1), BS3_FP32_ZERO(0), BS3_FP32_QNAN(1), BS3_FP32_QNAN(1) } }, 2242 /*mask */ X86_MXCSR_IM, 2243 /*daz,fz,rc*/ 0, 0, X86_MXCSR_RC_NEAREST, 2244 /*flags */ X86_MXCSR_IE, X86_MXCSR_IE }, 2245 { { /*src2 */ { BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0) } }, 2246 { /*src1 */ { BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(0), BS3_FP32_INF(0) } }, 2247 { /* => */ { BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_QNAN(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_ZERO(0) } }, 2248 /*mask */ X86_MXCSR_XCPT_MASK, 2249 /*daz,fz,rc*/ 0, 0, X86_MXCSR_RC_NEAREST, 2250 /*flags */ 0, X86_MXCSR_IE }, 2251 { { /*src2 */ { BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0) } }, 2252 { /*src1 */ { BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_INF(0), BS3_FP32_INF(0) } }, 2253 { /* => */ { BS3_FP32_QNAN(1), BS3_FP32_ZERO(0), BS3_FP32_QNAN(1), BS3_FP32_QNAN(1), BS3_FP32_QNAN(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_ZERO(0) } }, 2254 /*mask */ ~X86_MXCSR_XCPT_MASK, 2255 /*daz,fz,rc*/ 0, X86_MXCSR_FZ, X86_MXCSR_RC_NEAREST, 2256 /*flags */ X86_MXCSR_IE, X86_MXCSR_IE }, 2257 { { /*src2 */ { BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_ZERO(0), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_ZERO(0) } }, 2258 { /*src1 */ { BS3_FP32_INF(0), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0) } }, 2259 { /* => */ { BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_INF(0), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0), BS3_FP32_INF(1), BS3_FP32_INF(0) } }, 2260 /*mask */ ~X86_MXCSR_XCPT_MASK, 2261 /*daz,fz,rc*/ 0, X86_MXCSR_FZ, X86_MXCSR_RC_NEAREST, 2262 /*flags */ 0, 0 }, 2263 { { /*src2 */ { BS3_FP32_INF(0), BS3_FP32_QNAN(1), BS3_FP32_INF(1), BS3_FP32_QNAN(0), BS3_FP32_INF(1), BS3_FP32_INF(1), BS3_FP32_ZERO(0), BS3_FP32_ZERO(0) } }, 2264 { /*src1 */ { BS3_FP32_INF(0), BS3_FP32_QNAN(0), BS3_FP32_INF(1), BS3_FP32_QNAN(0), BS3_FP32_INF(1), BS3_FP32_QNAN(1), BS3_FP32_INF(0), BS3_FP32_INF(0) } }, 2265 { /* => */ { BS3_FP32_QNAN(0), BS3_FP32_QNAN(0), BS3_FP32_QNAN(1), BS3_FP32_QNAN(0), BS3_FP32_QNAN(1), BS3_FP32_INF(0), BS3_FP32_INF(1), BS3_FP32_ZERO(0) } }, 2266 /*mask */ X86_MXCSR_XCPT_MASK, 2267 /*daz,fz,rc*/ 0, X86_MXCSR_FZ, X86_MXCSR_RC_ZERO, 2268 /*flags */ 0, 0 }, 2269 /** @todo Overflow, precision; Denormals; Normals; Rounding, FZ etc. */ 2237 2270 }; 2238 2271
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